Hi,
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index bbfe8a3..f0cb760 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -173,8 +173,6 @@ static int mmc_core_init(struct mmc *mmc)
/* Reset controller */
writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl);
udelay(1000);
- /* Always read / write data through the CPU */
- writel(SUNXI_MMC_GCTRL_ACCESS_BY_AHB, &mmchost->reg->gctrl);
return 0;
}
@@ -189,6 +187,13 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct
mmc_data *data)
unsigned byte_cnt = data->blocksize * data->blocks;
unsigned timeout_msecs = 2000;
unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
+ unsigned int gctrl;
+
+ /* Always read / write data through the CPU */
+ gctrl = readl(&mmchost->reg->gctrl);
+ gctrl &= ~SUNXI_MMC_GCTRL_ACCESS_BY_AHB;
The above line seems redundant / unnecessary.
These lines are based on read-modify-write principle, the mmc hardware
on sunxi have no detail document, we don't know what happen when operate
this register in actually.
+ gctrl |= SUNXI_MMC_GCTRL_ACCESS_BY_AHB;
+ writel(gctrl, &mmchost->reg->gctrl);
And why is it necessary to move this call at all ? The only reason I
can think of why you need this is because of the
writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl);
Done in mmc_send_cmd on error, that call really should also include
a delay and as such should probably just be replaced with a call
to mmc_core_init(). Can you try to build u-boot with your fix
reverted and with the above line in mmc_send_cmd replaced with
a call to mmc_core_init(), and see if that also fixes things ?
I have tried, but failed.
Best Regards
Wills
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