On Mon, 2014-07-21 at 22:39 +0200, Jeroen Hofstee wrote:
> Hello Ian,
> 
> On 21-07-14 22:07, Ian Campbell wrote:
> > On Fri, 2014-07-18 at 20:47 +0200, Jeroen Hofstee wrote:
> >> Hello Siarhei,
> >>
> >> On 18-07-14 19:09, Siarhei Siamashka wrote:
> >>> This is needed to have feature parity with the normal boot mode,
> >>> where the L2EN bit in the CP15 Auxiliary Control Register is set
> >>> by the BROM code right from the start.
> >>>
> >>> If this is not done, the Linux system ends up booted with the L2 cache
> >>> disabled.
> >>>
> >> I don't know a single about the sunxi, but shouldn't linux
> >> be patched instead. The commit message seems to indicate
> >> it is not an u-boot issue.
> > The ACTLR may not be writeable from NS mode so it has to be setup in the
> > bootloader before dropping to NS mode.
> mmm, I guess there is something wrong with the boot sequence
> if the kernel itself can't access raw hw.

Do you know what ARM Secure and Non-Secure worlds are?

The kernel expects to be launched in NS mode and simply cannot access
this register. This is a feature not a bug.

Ian.

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