Hi Jon, Thanks for you reply, my i2c is working fin(i2c read and write working fine). here my register configuration from codec side. I am able to create 2khz beep by running amixer commands. can you look at my codec configuration and processor both , if any mismatch is there kindly let me know.
Here will be the register configuration from processor side. register SUN7I_IISCTL=0x00 reg_val=0x105 register SUN7I_IISFAT0=0x04 reg_val=0x0 register SUN7I_IISFAT1=0x08 reg_val=0x4030 register SUN7I_IISFCTL=0x14 reg_val=0x400f5 register SUN7I_IISCLKD=0x24 reg_val=0x92 register SUN7I_IISFAT0=0x30 reg_val=0x1 register SUN7I_TXCHMAP=0x34 reg_val=0x76543210 [i2s_para] i2s_used = 1 i2s_channel = 2 i2s_master = 4 i2s_select = 1 audio_format = 1 signal_inversion = 1 over_sample_rate = 256 sample_resolution = 16 word_select_size = 32 pcm_sync_period = 256 msb_lsb_first = 0 sign_extend = 0 slot_index = 0 slot_width = 16 frame_width = 1 tx_data_mode = 0 rx_data_mode = 0 i2s_mclk = port:PB05<2><1><default><default> i2s_bclk = port:PB06<2><1><default><default> i2s_lrclk = port:PB07<2><1><default><default> i2s_dout0 = port:PB08<2><1><default><default> i2s_dout1 = i2s_dout2 = i2s_dout3 = i2s_din = port:PB12<2><1><default><default> Regards Punith -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
### Page 0 Regs from 0 to 95 reg = 0 val = 0 reg = 1 val = 0 reg = 2 val = 1 reg = 3 val = 66 reg = 4 val = 3 reg = 5 val = 93 reg = 6 val = 5 reg = 7 val = 0 reg = 8 val = 0 reg = 9 val = 0 reg = 10 val = 0 reg = 11 val = 85 reg = 12 val = 83 reg = 13 val = 0 reg = 14 val = 80 reg = 15 val = 80 reg = 16 val = 8 reg = 17 val = 0 reg = 18 val = 85 reg = 19 val = 83 reg = 20 val = 80 reg = 21 val = 80 reg = 22 val = 4 reg = 23 val = 0 reg = 24 val = 0 reg = 25 val = 3 reg = 26 val = 81 reg = 27 val = 30 reg = 28 val = 1 reg = 29 val = 5 reg = 30 val = 80 reg = 31 val = 0 reg = 32 val = 0 reg = 33 val = 0 reg = 34 val = 0 reg = 35 val = 0 reg = 36 val = 80 reg = 37 val = ba reg = 38 val = 11 reg = 39 val = e0 reg = 40 val = 0 reg = 41 val = 0 reg = 42 val = 0 reg = 43 val = 0 reg = 44 val = 10 reg = 45 val = 0 reg = 46 val = 10 reg = 47 val = 0 reg = 48 val = c0 reg = 49 val = 0 reg = 50 val = 0 reg = 51 val = 12 reg = 52 val = 32 reg = 53 val = 12 reg = 54 val = 3 reg = 55 val = 2 reg = 56 val = 2 reg = 57 val = 11 reg = 58 val = 10 reg = 59 val = 0 reg = 60 val = 19 reg = 61 val = 4 reg = 62 val = 0 reg = 63 val = d4 reg = 64 val = 0 reg = 65 val = 0 reg = 66 val = 0 reg = 67 val = a7 reg = 68 val = 6f reg = 69 val = 38 reg = 70 val = 0 reg = 71 val = 80 reg = 72 val = 0 reg = 73 val = 0 reg = 74 val = aa reg = 75 val = 0 reg = 76 val = 23 reg = 77 val = fb reg = 78 val = 7a reg = 79 val = d7 reg = 80 val = 0 reg = 81 val = 0 reg = 82 val = 80 reg = 83 val = 0 reg = 84 val = 0 reg = 85 val = 0 reg = 86 val = 0 reg = 87 val = 0 reg = 88 val = 7f reg = 89 val = 0 reg = 90 val = 0 reg = 91 val = 0 reg = 92 val = 0 reg = 93 val = 0 reg = 94 val = 0 ------------------------------------------- ### Page 1 Regs from 30 to 52 puneet@TLV320AIC3100 aic31xx_change_page reg = 30 val = 3 reg = 31 val = c4 reg = 32 val = 86 reg = 33 val = af reg = 34 val = 70 reg = 35 val = 44 reg = 36 val = 80 reg = 37 val = 80 reg = 38 val = 92 reg = 39 val = 7f reg = 40 val = 1f reg = 41 val = 1f reg = 42 val = 1d reg = 43 val = 0 reg = 44 val = 0 reg = 45 val = 86 reg = 46 val = 0 reg = 47 val = 80 reg = 48 val = 0 reg = 49 val = 0 reg = 50 val = 0 reg = 51 val = 0 ####SPL_DRIVER_GAIN 29 ##### L_ANALOG_VOL_2_SPL 146 R_ANLOG_VOL_2_SPR 127 puneet@TLV320AIC3100 aic31xx_change_page #### LDAC_VOL 0 RDAC_VOL 0 ###OVER Temperature STATUS ( Page 0 Reg 3) 66 ###SHORT CIRCUIT STATUS (Page 0 Reg 44) 0 ###INTR_FLAG: SHORT_CKT(Page 0 Reg 46) 10 puneet@TLV320AIC3100 aic31xx_change_page ###Speaker_Driver_Short_Circuit ( Page 1 Reg 32)86 @@@ MIC_PGA (P1 R47) = 0x80 puneet@TLV320AIC3100 aic31xx_change_page @@@ ADC_FGA (P0 R82) = 0x80 @@@ ADC_CGA (P0 R83) = 0x0 ##-aic31xx_mute_codec 0
