On Wed, 2014-10-22 at 16:47 +0800, Chen-Yu Tsai wrote: > From: Hans de Goede <hdego...@redhat.com> > > The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO > or R_PIO, which handles pin banks L and beyond. > > Also add a clear description about SUNXI_GPIO_BANKS, stating it only > counts the number of pin banks in the _main_ pin controller. > > Signed-off-by: Hans de Goede <hdego...@redhat.com> > [w...@csie.org: expanded commit message] > [w...@csie.org: add pin bank M and expand comments] > [w...@csie.org: add comment on SUNXI_GPIO_BANKS macro] > Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Ian Campbell <i...@hellion.org.uk> -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
