Hello.
I have a cobieboard a10 with 4GB nand K9GBG08U0A.
I tried the kenel 3:18 nand.
I also followed the indications described by XXXX.
I still have many errors "Bad eraseblock ... No space left to write bad
block table".
(flash_erase with kernel & a10 dts modified does not reduce them).
I try a series combination changing nand_ids.c
The proposed configuration for a 32 GB K9GBG08U0A not work for 4GB.
How can I fix it?
ids for 32G
{"K9GBG08U0A 32G 3.3V 8-bit"
.id = {{0xec, 0xd7, 0x94, 0x7a, 0x54, 0x43}},
SZ_8K, SZ_4K, SZ_1M, 0, 6, 640, NAND_ECC_INFO (40,
SZ_1K), 0},
ids for 4G?
the kernel SunXi for this chip contains a number of parameters that I have
difficulty in translating:
NAND_CHIP_ID = {0xec, 0xd7, 0x94, 0x7A, 0xff, 0xff, 0xff, 0xff} (OK)
DieCnt = 1
SecCnt = 16
PagCnt = 128
BlkCnt = 4096
OpOpt = 0x0088
DatBlk = 974
Freq = 30
EccMode = 3
ReadRetry = 0
DDRType = 0
& PhysicArchiPara3 =
static struct __OptionalPhyOpPar_t PhysicArchiPara3 =
{
{0x60, 0x60}, // multi-plane read command
{0x11, 0x81}, // multi-plane program command
{0x60, 0x60, 0x35}, // multi-plane page copy-back read command
{0x85, 0x11, 0x81}, // multi-plane page copy-back program command
0x70, // multi-plane operation status read command
0xf1, // inter-leave bank0 operation status read command
0xf2, // inter-leave bank1 operation status read command
0x02, // bad block flag position, in the last page
1 // multi-plane block address offset
};
Thank You .
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