Signed-off-by: Paul Kocialkowski <cont...@paulk.fr> --- drivers/block/sunxi_nand/src/format/nand_format.c | 16 ++--- .../block/sunxi_nand/src/include/nand_drv_cfg.h | 4 +- drivers/block/sunxi_nand/src/include/nand_logic.h | 4 +- drivers/block/sunxi_nand/src/include/nand_physic.h | 4 +- drivers/block/sunxi_nand/src/include/nand_simple.h | 8 +-- drivers/block/sunxi_nand/src/include/nand_type.h | 70 ++++++++++---------- drivers/block/sunxi_nand/src/logic/logic_cache.c | 56 +++++++++------- drivers/block/sunxi_nand/src/logic/logic_ctl.c | 50 ++++++++------ drivers/block/sunxi_nand/src/logic/mapping.c | 4 +- drivers/block/sunxi_nand/src/physic/nand_phy.c | 16 ++--- .../block/sunxi_nand/src/physic/nand_simple_r.c | 2 +- .../block/sunxi_nand/src/physic/nand_simple_w.c | 6 +- 12 files changed, 127 insertions(+), 113 deletions(-)
diff --git a/drivers/block/sunxi_nand/src/format/nand_format.c b/drivers/block/sunxi_nand/src/format/nand_format.c index fe485b5..1c6db8e 100644 --- a/drivers/block/sunxi_nand/src/format/nand_format.c +++ b/drivers/block/sunxi_nand/src/format/nand_format.c @@ -220,7 +220,7 @@ __s32 _CalculatePhyOpPar(struct __PhysicOpPara_t *pPhyPar, __u32 nZone, __u32 nB * < 0 read page data failed. ************************************************************************************************************************ */ -static __s32 _VirtualPageRead(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 SectBitmap, void *pBuf, void *pSpare) +static __s32 _VirtualPageRead(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u64 SectBitmap, void *pBuf, void *pSpare) { __s32 i, result; __u8 *tmpSrcData, *tmpDstData, *tmpSrcPtr[4], *tmpDstPtr[4]; @@ -239,7 +239,7 @@ static __s32 _VirtualPageRead(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 S //process the pointer to spare area data for(i=0; i<2; i++) { - if(SectBitmap & (1<<i)) + if(SectBitmap & ((__u64)1<<i)) { tmpSrcPtr[i] = FORMAT_SPARE_BUF + 4 * i; tmpDstPtr[i] = (__u8 *)pSpare + 4 * i; @@ -252,7 +252,7 @@ static __s32 _VirtualPageRead(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 S for(i=0; i<2; i++) { - if(SectBitmap & (1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) + if(SectBitmap & ((__u64)1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) { tmpSrcPtr[i+2] = LML_SPARE_BUF + 4 * (i + SECTOR_CNT_OF_SINGLE_PAGE); tmpDstPtr[i+2] = (__u8 *)pSpare + 8 + 4 * i; @@ -330,7 +330,7 @@ static __s32 _VirtualPageRead(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 S * < 0 write page data failed. ************************************************************************************************************************ */ -static __s32 _VirtualPageWrite(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 SectBitmap, void *pBuf, void *pSpare) +static __s32 _VirtualPageWrite(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u64 SectBitmap, void *pBuf, void *pSpare) { __s32 i, result; __u8 *tmpSrcData, *tmpDstData, *tmpSrcPtr[4], *tmpDstPtr[4]; @@ -350,7 +350,7 @@ static __s32 _VirtualPageWrite(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 //process the pointer to spare area data for(i=0; i<2; i++) { - if(SectBitmap & (1<<i)) + if(SectBitmap & ((__u64)1<<i)) { tmpSrcPtr[i] = (__u8 *)pSpare + 4 * i; tmpDstPtr[i] = FORMAT_SPARE_BUF + 4 * i; @@ -363,7 +363,7 @@ static __s32 _VirtualPageWrite(__u32 nDieNum, __u32 nBlkNum, __u32 nPage, __u32 for(i=0; i<2; i++) { - if(SectBitmap & (1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) + if(SectBitmap & ((__u64)1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) { tmpSrcPtr[i+2] = (__u8 *)pSpare + 8 + 4 * i; tmpDstPtr[i+2] = LML_SPARE_BUF + 4 * (i + SECTOR_CNT_OF_SINGLE_PAGE); @@ -923,7 +923,7 @@ static __s32 _GetBlkLogicInfo(struct __ScanDieInfo_t *pDieInfo) __s32 i; __s16 tmpPageNum[4]; __u16 tmpLogicInfo; - __u32 spare_bitmap; + __u64 spare_bitmap; struct __NandUserData_t tmpSpare[2]; @@ -980,7 +980,7 @@ static __s32 _GetBlkLogicInfo(struct __ScanDieInfo_t *pDieInfo) //calculate the number of the page in the super block to get spare data tmpPage = tmpPageNum[i] * INTERLEAVE_BANK_CNT + tmpBnkNum; //_VirtualPageRead(pDieInfo->nDie, tmpBlkNum, tmpPage, LOGIC_INFO_BITMAP, FORMAT_PAGE_BUF, (void *)&tmpSpare); - spare_bitmap = (SUPPORT_MULTI_PROGRAM ? (0x3 | (0x3 << SECTOR_CNT_OF_SINGLE_PAGE)) : 0x3); + spare_bitmap = (SUPPORT_MULTI_PROGRAM ? ((__u64)0x3 | ((__u64)0x3 << SECTOR_CNT_OF_SINGLE_PAGE)) : (__u64)0x3); _VirtualPageRead(pDieInfo->nDie, tmpBlkNum, tmpPage, spare_bitmap, FORMAT_PAGE_BUF, (void *)&tmpSpare); //check if the block is a bad block diff --git a/drivers/block/sunxi_nand/src/include/nand_drv_cfg.h b/drivers/block/sunxi_nand/src/include/nand_drv_cfg.h index dff1d77..d331409 100644 --- a/drivers/block/sunxi_nand/src/include/nand_drv_cfg.h +++ b/drivers/block/sunxi_nand/src/include/nand_drv_cfg.h @@ -46,10 +46,10 @@ #define MAX_LOG_BLK_CNT (16) //define the value of the count of the block mapping table cache -#define BLOCK_MAP_TBL_CACHE_CNT (MAX_ZONE_CNT) +#define BLOCK_MAP_TBL_CACHE_CNT (4) //define the max value of the count of the page mapping table cache -#define PAGE_MAP_TBL_CACHE_CNT (MAX_LOG_BLK_CNT * MAX_ZONE_CNT) +#define PAGE_MAP_TBL_CACHE_CNT (4) //check if block mapping table cache is valid #if (BLOCK_MAP_TBL_CACHE_CNT < 1) diff --git a/drivers/block/sunxi_nand/src/include/nand_logic.h b/drivers/block/sunxi_nand/src/include/nand_logic.h index e5413ea..abb1c57 100644 --- a/drivers/block/sunxi_nand/src/include/nand_logic.h +++ b/drivers/block/sunxi_nand/src/include/nand_logic.h @@ -232,7 +232,7 @@ __s32 LML_FlushPageCache(void); * < 0 read failed. ************************************************************************************************************************ */ -__s32 LML_PageRead(__u32 nPage, __u32 nBitmap, void* pBuf); +__s32 LML_PageRead(__u32 nPage, __u64 nBitmap, void* pBuf); /* @@ -251,7 +251,7 @@ __s32 LML_PageRead(__u32 nPage, __u32 nBitmap, void* pBuf); * < 0 write failed. ************************************************************************************************************************ */ -__s32 LML_PageWrite(__u32 nPage, __u32 nBitmap, void* pBuf); +__s32 LML_PageWrite(__u32 nPage, __u64 nBitmap, void* pBuf); /* diff --git a/drivers/block/sunxi_nand/src/include/nand_physic.h b/drivers/block/sunxi_nand/src/include/nand_physic.h index 08dbdf3..58fa9ad 100644 --- a/drivers/block/sunxi_nand/src/include/nand_physic.h +++ b/drivers/block/sunxi_nand/src/include/nand_physic.h @@ -49,10 +49,10 @@ extern struct __NandPageCachePool_t PageCachePool; #define SECTOR_CNT_OF_SUPER_PAGE (NandStorageInfo.SectorCntPerPage * NandStorageInfo.PlaneCntPerDie) //define the sector bitmap for a single page -#define FULL_BITMAP_OF_SINGLE_PAGE ((__u32)((1<<SECTOR_CNT_OF_SINGLE_PAGE) - 1)) +#define FULL_BITMAP_OF_SINGLE_PAGE ((__u64)(((__u64)1<<(SECTOR_CNT_OF_SINGLE_PAGE - 1)) | (((__u64)1<<(SECTOR_CNT_OF_SINGLE_PAGE - 1)) - 1))) //define the sector bitmap for a super page, the sector count of a super page may be equal to 32 -#define FULL_BITMAP_OF_SUPER_PAGE ((__u32)((1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) | ((1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) - 1))) +#define FULL_BITMAP_OF_SUPER_PAGE ((__u64)(((__u64)1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) | (((__u64)1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) - 1))) //define the block number offset for the multi-plane operation #define MULTI_PLANE_BLOCK_OFFSET (NandStorageInfo.OptPhyOpPar.MultiPlaneBlockOffset) diff --git a/drivers/block/sunxi_nand/src/include/nand_simple.h b/drivers/block/sunxi_nand/src/include/nand_simple.h index 9adcd33..4804fa0 100644 --- a/drivers/block/sunxi_nand/src/include/nand_simple.h +++ b/drivers/block/sunxi_nand/src/include/nand_simple.h @@ -30,10 +30,10 @@ #define BADBLOCK -2 struct boot_physical_param{ - __u8 chip; //chip no - __u16 block; // block no within chip - __u16 page; // apge no within block - __u16 sectorbitmap; //done't care + __u32 chip; //chip no + __u32 block; // block no within chip + __u32 page; // apge no within block + __u64 sectorbitmap; //done't care void *mainbuf; //data buf void *oobbuf; //oob buf }; diff --git a/drivers/block/sunxi_nand/src/include/nand_type.h b/drivers/block/sunxi_nand/src/include/nand_type.h index 0c0fd24..4c851e4 100644 --- a/drivers/block/sunxi_nand/src/include/nand_type.h +++ b/drivers/block/sunxi_nand/src/include/nand_type.h @@ -45,26 +45,26 @@ struct __OptionalPhyOpPar_t typedef struct { - __u8 ChipCnt; //the count of the total nand flash chips are currently connecting on the CE pin - __u16 ChipConnectInfo; //chip connect information, bit == 1 means there is a chip connecting on the CE pin - __u8 RbCnt; - __u8 RbConnectInfo; //the connect information of the all rb chips are connected - __u8 RbConnectMode; //the rb connect mode - __u8 BankCntPerChip; //the count of the banks in one nand chip, multiple banks can support Inter-Leave - __u8 DieCntPerChip; //the count of the dies in one nand chip, block management is based on Die - __u8 PlaneCntPerDie; //the count of planes in one die, multiple planes can support multi-plane operation - __u8 SectorCntPerPage; //the count of sectors in one single physic page, one sector is 0.5k - __u16 PageCntPerPhyBlk; //the count of physic pages in one physic block - __u16 BlkCntPerDie; //the count of the physic blocks in one die, include valid block and invalid block - __u16 OperationOpt; //the mask of the operation types which current nand flash can support support - __u8 FrequencePar; //the parameter of the hardware access clock, based on 'MHz' - __u8 EccMode; //the Ecc Mode for the nand flash chip, 0: bch-16, 1:bch-28, 2:bch_32 + __u32 ChipCnt; //the count of the total nand flash chips are currently connecting on the CE pin + __u32 ChipConnectInfo; //chip connect information, bit == 1 means there is a chip connecting on the CE pin + __u32 RbCnt; + __u32 RbConnectInfo; //the connect information of the all rb chips are connected + __u32 RbConnectMode; //the rb connect mode + __u32 BankCntPerChip; //the count of the banks in one nand chip, multiple banks can support Inter-Leave + __u32 DieCntPerChip; //the count of the dies in one nand chip, block management is based on Die + __u32 PlaneCntPerDie; //the count of planes in one die, multiple planes can support multi-plane operation + __u32 SectorCntPerPage; //the count of sectors in one single physic page, one sector is 0.5k + __u32 PageCntPerPhyBlk; //the count of physic pages in one physic block + __u32 BlkCntPerDie; //the count of the physic blocks in one die, include valid block and invalid block + __u32 OperationOpt; //the mask of the operation types which current nand flash can support support + __u32 FrequencePar; //the parameter of the hardware access clock, based on 'MHz' + __u32 EccMode; //the Ecc Mode for the nand flash chip, 0: bch-16, 1:bch-28, 2:bch_32 __u8 NandChipId[8]; //the nand chip id of current connecting nand chip - __u16 ValidBlkRatio; //the ratio of the valid physical blocks, based on 1024 + __u32 ValidBlkRatio; //the ratio of the valid physical blocks, based on 1024 __u32 good_block_ratio; //good block ratio get from hwscan __u32 ReadRetryType; //the read retry type __u32 DDRType; - __u32 Reserved[32]; + __u32 Reserved[23]; }boot_nand_para_t; typedef struct boot_flash_info{ @@ -78,22 +78,22 @@ typedef struct boot_flash_info{ //define the nand flash storage system information struct __NandStorageInfo_t { - __u8 ChipCnt; //the count of the total nand flash chips are currently connecting on the CE pin - __u16 ChipConnectInfo; //chip connect information, bit == 1 means there is a chip connecting on the CE pin - __u8 RbCnt; - __u8 RbConnectInfo; //the connect information of the all rb chips are connected - __u8 RbConnectMode; //the rb connect mode - __u8 BankCntPerChip; //the count of the banks in one nand chip, multiple banks can support Inter-Leave - __u8 DieCntPerChip; //the count of the dies in one nand chip, block management is based on Die - __u8 PlaneCntPerDie; //the count of planes in one die, multiple planes can support multi-plane operation - __u8 SectorCntPerPage; //the count of sectors in one single physic page, one sector is 0.5k - __u16 PageCntPerPhyBlk; //the count of physic pages in one physic block - __u16 BlkCntPerDie; //the count of the physic blocks in one die, include valid block and invalid block - __u16 OperationOpt; //the mask of the operation types which current nand flash can support support - __u8 FrequencePar; //the parameter of the hardware access clock, based on 'MHz' - __u8 EccMode; //the Ecc Mode for the nand flash chip, 0: bch-16, 1:bch-28, 2:bch_32 + __u32 ChipCnt; //the count of the total nand flash chips are currently connecting on the CE pin + __u32 ChipConnectInfo; //chip connect information, bit == 1 means there is a chip connecting on the CE pin + __u32 RbCnt; + __u32 RbConnectInfo; //the connect information of the all rb chips are connected + __u32 RbConnectMode; //the rb connect mode + __u32 BankCntPerChip; //the count of the banks in one nand chip, multiple banks can support Inter-Leave + __u32 DieCntPerChip; //the count of the dies in one nand chip, block management is based on Die + __u32 PlaneCntPerDie; //the count of planes in one die, multiple planes can support multi-plane operation + __u32 SectorCntPerPage; //the count of sectors in one single physic page, one sector is 0.5k + __u32 PageCntPerPhyBlk; //the count of physic pages in one physic block + __u32 BlkCntPerDie; //the count of the physic blocks in one die, include valid block and invalid block + __u32 OperationOpt; //the mask of the operation types which current nand flash can support support + __u32 FrequencePar; //the parameter of the hardware access clock, based on 'MHz' + __u32 EccMode; //the Ecc Mode for the nand flash chip, 0: bch-16, 1:bch-28, 2:bch_32 __u8 NandChipId[8]; //the nand chip id of current connecting nand chip - __u16 ValidBlkRatio; //the ratio of the valid physical blocks, based on 1024 + __u32 ValidBlkRatio; //the ratio of the valid physical blocks, based on 1024 __u32 ReadRetryType; //the read retry type __u32 DDRType; struct __OptionalPhyOpPar_t OptPhyOpPar; //the parameters for some optional operation @@ -130,7 +130,7 @@ struct __PhysicOpPara_t __u8 BankNum; //the number of the bank current accessed, bank NO. is different of chip NO. __u8 PageNum; //the number of the page current accessed, the page is based on single-plane or multi-plane __u16 BlkNum; //the number of the physic block, the block is based on single-plane or multi-plane - __u32 SectBitmap; //the bitmap of the sector in the page which need access data + __u64 SectBitmap; //the bitmap of the sector in the page which need access data void *MDataPtr; //the pointer to main data buffer, it is the start address of a page size based buffer void *SDataPtr; //the pointer to spare data buffer, it will be set to NULL if needn't access spare data }; @@ -228,14 +228,14 @@ struct __PageMapTblCachePool_t struct __GlobalLogicPageType_t { __u32 LogicPageNum; //the global page number of the logic page, it is based on super page size - __u32 SectorBitmap; //the bitmap of the sector in the logic page which data need access + __u64 SectorBitmap; //the bitmap of the sector in the logic page which data need access }; //define the global logcial page based on zone and block parameter type struct __LogicPageType_t { - __u32 SectBitmap; //the bitmap marks which sectors' data in the logical page need access + __u64 SectBitmap; //the bitmap marks which sectors' data in the logical page need access __u16 BlockNum; //the value of the number of the logical block which the page is belonged to __u16 PageNum; //the value of the number of the page in the logical block __u8 ZoneNum; //the value of the number of the zone, which the page is belonged to @@ -265,7 +265,7 @@ struct __NandPhyInfoPar_t __u8 SectCntPerPage; //the count of the sectors in one single physical page __u16 PageCntPerBlk; //the count of the pages in one single physical block __u16 BlkCntPerDie; //the count fo the physical blocks in one nand flash Die - __u16 OperationOpt; //the bitmap that marks which optional operation that the nand flash can support + __u32 OperationOpt; //the bitmap that marks which optional operation that the nand flash can support __u16 ValidBlkRatio; //the valid block ratio, based on 1024 blocks __u16 AccessFreq; //the highest access frequence of the nand flash chip, based on MHz __u16 EccMode; //the Ecc Mode for the nand flash chip, 0: bch-16, 1:bch-28, 2:bch_32 diff --git a/drivers/block/sunxi_nand/src/logic/logic_cache.c b/drivers/block/sunxi_nand/src/logic/logic_cache.c index 7ca2a9c..c2ebe0c 100644 --- a/drivers/block/sunxi_nand/src/logic/logic_cache.c +++ b/drivers/block/sunxi_nand/src/logic/logic_cache.c @@ -35,23 +35,23 @@ typedef struct __u32 size; __u32 hit_page; - __u32 secbitmap; + __u64 secbitmap; __u32 access_count; }__nand_cache_t; -__u32 g_w_access_cnt; +__u32 g_w_access_cnt=0; -__nand_cache_t nand_w_cache[N_NAND_W_CACHE]; -__nand_cache_t nand_r_cache; +__nand_cache_t nand_w_cache[N_NAND_W_CACHE]={0}; +__nand_cache_t nand_r_cache={0}; -__u32 _get_valid_bits(__u32 secbitmap) +__u32 _get_valid_bits(__u64 secbitmap) { __u32 validbit = 0; while(secbitmap) { - if(secbitmap & 0x1) + if(secbitmap & (__u64)0x1) validbit++; secbitmap >>= 1; } @@ -59,11 +59,11 @@ __u32 _get_valid_bits(__u32 secbitmap) return validbit; } -__u32 _get_first_valid_bit(__u32 secbitmap) +__u32 _get_first_valid_bit(__u64 secbitmap) { __u32 firstbit = 0; - while(!(secbitmap & 0x1)) + while(!(secbitmap & (__u64)0x1)) { secbitmap >>= 1; firstbit++; @@ -84,9 +84,7 @@ __s32 _flush_w_cache(void) LML_PageRead(nand_w_cache[i].hit_page,(nand_w_cache[i].secbitmap ^ FULL_BITMAP_OF_LOGIC_PAGE)&FULL_BITMAP_OF_LOGIC_PAGE,nand_w_cache[i].data); LML_PageWrite(nand_w_cache[i].hit_page,FULL_BITMAP_OF_LOGIC_PAGE,nand_w_cache[i].data); - nand_w_cache[i].hit_page = 0xffffffff; - nand_w_cache[i].secbitmap = 0; - nand_w_cache[i].access_count = 0; + /*disable read cache with current page*/ if (nand_r_cache.hit_page == nand_w_cache[i].hit_page){ @@ -94,6 +92,11 @@ __s32 _flush_w_cache(void) nand_r_cache.secbitmap = 0; } + + nand_w_cache[i].hit_page = 0xffffffff; + nand_w_cache[i].secbitmap = 0; + nand_w_cache[i].access_count = 0; + } } @@ -110,9 +113,7 @@ __s32 _flush_w_cache_simple(__u32 i) LML_PageRead(nand_w_cache[i].hit_page,(nand_w_cache[i].secbitmap ^ FULL_BITMAP_OF_LOGIC_PAGE)&FULL_BITMAP_OF_LOGIC_PAGE,nand_w_cache[i].data); LML_PageWrite(nand_w_cache[i].hit_page,FULL_BITMAP_OF_LOGIC_PAGE,nand_w_cache[i].data); - nand_w_cache[i].hit_page = 0xffffffff; - nand_w_cache[i].secbitmap = 0; - nand_w_cache[i].access_count = 0; + /*disable read cache with current page*/ if (nand_r_cache.hit_page == nand_w_cache[i].hit_page){ @@ -120,6 +121,10 @@ __s32 _flush_w_cache_simple(__u32 i) nand_r_cache.secbitmap = 0; } + nand_w_cache[i].hit_page = 0xffffffff; + nand_w_cache[i].secbitmap = 0; + nand_w_cache[i].access_count = 0; + } return 0; @@ -141,12 +146,13 @@ void _get_data_from_cache(__u32 blk, __u32 nblk, void *buf) { __u32 i; __u32 sec; - __u32 page,SecBitmap,SecWithinPage; + __u32 page,SecWithinPage; + __u64 SecBitmap; for(sec = blk; sec < blk + nblk; sec++) { SecWithinPage = sec % SECTOR_CNT_OF_LOGIC_PAGE; - SecBitmap = (1 << SecWithinPage); + SecBitmap = ((__u64)1 << SecWithinPage); page = sec / SECTOR_CNT_OF_LOGIC_PAGE; for (i = 0; i < N_NAND_W_CACHE; i++) { @@ -159,7 +165,7 @@ void _get_data_from_cache(__u32 blk, __u32 nblk, void *buf) } } -void _get_one_page(__u32 page,__u32 SecBitmap,__u8 *data) +void _get_one_page(__u32 page,__u64 SecBitmap,__u8 *data) { __u32 i; __u8 *tmp = data; @@ -169,7 +175,7 @@ void _get_one_page(__u32 page,__u32 SecBitmap,__u8 *data) { for(i = 0;i < SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(SecBitmap & (1<<i)) + if(SecBitmap & ((__u64)1<<i)) { MEMCPY(tmp + (i<<9),nand_r_cache.data + (i<<9),512); } @@ -190,7 +196,7 @@ void _get_one_page(__u32 page,__u32 SecBitmap,__u8 *data) for(i = 0;i < SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(SecBitmap & (1<<i)) + if(SecBitmap & ((__u64)1<<i)) { MEMCPY(tmp + (i<<9),nand_r_cache.data + (i<<9),512); } @@ -205,7 +211,8 @@ __s32 NAND_CacheRead(__u32 blk, __u32 nblk, void *buf) { __u32 nSector,StartSec; __u32 page; - __u32 SecBitmap,SecWithinPage; + __u32 SecWithinPage; + __u64 SecBitmap; __u8 *pdata; nSector = nblk; @@ -218,7 +225,7 @@ __s32 NAND_CacheRead(__u32 blk, __u32 nblk, void *buf) while(nSector) { SecWithinPage = StartSec % SECTOR_CNT_OF_LOGIC_PAGE; - SecBitmap |= (1 << SecWithinPage); + SecBitmap |= ((__u64)1 << SecWithinPage); page = StartSec / SECTOR_CNT_OF_LOGIC_PAGE; /*close page if last sector*/ @@ -250,7 +257,7 @@ __s32 NAND_CacheRead(__u32 blk, __u32 nblk, void *buf) } -__s32 _fill_nand_cache(__u32 page, __u32 secbitmap, __u8 *pdata) +__s32 _fill_nand_cache(__u32 page, __u64 secbitmap, __u8 *pdata) { __u8 hit; __u8 i; @@ -344,7 +351,8 @@ __s32 NAND_CacheWrite(__u32 blk, __u32 nblk, void *buf) { __u32 nSector,StartSec; __u32 page; - __u32 SecBitmap,SecWithinPage; + __u32 SecWithinPage; + __u64 SecBitmap; __u32 i; __u8 *pdata; //__u32 hit = 0; @@ -359,7 +367,7 @@ __s32 NAND_CacheWrite(__u32 blk, __u32 nblk, void *buf) while(nSector) { SecWithinPage = StartSec % SECTOR_CNT_OF_LOGIC_PAGE; - SecBitmap |= (1 << SecWithinPage); + SecBitmap |= ((__u64)1 << SecWithinPage); page = StartSec / SECTOR_CNT_OF_LOGIC_PAGE; diff --git a/drivers/block/sunxi_nand/src/logic/logic_ctl.c b/drivers/block/sunxi_nand/src/logic/logic_ctl.c index af57d59..c9c2d91 100644 --- a/drivers/block/sunxi_nand/src/logic/logic_ctl.c +++ b/drivers/block/sunxi_nand/src/logic/logic_ctl.c @@ -23,9 +23,9 @@ #include <linux/module.h> #include "../include/nand_logic.h" -struct __NandDriverGlobal_t NandDriverInfo; -struct __LogicArchitecture_t LogicArchiPar; -struct __ZoneTblPstInfo_t ZoneTblPstInfo[MAX_ZONE_CNT]; +struct __NandDriverGlobal_t NandDriverInfo={0}; +struct __LogicArchitecture_t LogicArchiPar={0}; +struct __ZoneTblPstInfo_t ZoneTblPstInfo[MAX_ZONE_CNT]={0}; //define the parameter for manage the cached page static struct __GlobalLogicPageType_t CachePage; @@ -55,7 +55,8 @@ static struct __LogicCtlPar_t LogicalCtl; static __s32 _CalculateSectPar(__u32 nSectNum, __u32 nSectCnt, struct __GlobalLogicPageType_t *pHeadPage, __u32 *pMidPageCnt, struct __GlobalLogicPageType_t *pTailPage) { - __u32 tmpSectCnt, tmpBitmap; + __u32 tmpSectCnt; + __u64 tmpBitmap; LOGICCTL_DBG("[LOGICCTL_DBG]: Calculate logical sectors parameter, Lba:0x%x, Cnt:0x%x\n", nSectNum, nSectCnt); @@ -122,7 +123,7 @@ static __s32 _CalculateSectPar(__u32 nSectNum, __u32 nSectCnt, struct __GlobalLo * < 0 calcualte page parameter failed. ************************************************************************************************************************ */ -static __s32 _CalculateLogicPagePar(struct __LogicPageType_t *pLogicPage, __u32 nPage, __u32 nBitmap) +static __s32 _CalculateLogicPagePar(struct __LogicPageType_t *pLogicPage, __u32 nPage, __u64 nBitmap) { __u32 tmpPage, tmpBlk, tmpZone; @@ -158,14 +159,14 @@ static __s32 _CalculateLogicPagePar(struct __LogicPageType_t *pLogicPage, __u32 * < 0 update page data failed. ************************************************************************************************************************ */ -static __s32 _UpdateReadPageData(__u32 nSectBitmap, void * pBuf) +static __s32 _UpdateReadPageData(__u64 nSectBitmap, void * pBuf) { __s32 i; __u8 *tmpSrc = LML_WRITE_PAGE_CACHE, *tmpDst = pBuf; for(i=0; i<SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(nSectBitmap & CachePage.SectorBitmap & (1<<i)) + if(nSectBitmap & CachePage.SectorBitmap & ((__u64)1<<i)) { MEMCPY(tmpDst, tmpSrc, SECTOR_SIZE); } @@ -193,7 +194,7 @@ static __s32 _UpdateReadPageData(__u32 nSectBitmap, void * pBuf) * < 0 merge page data failed. ************************************************************************************************************************ */ -static __s32 _MergeCachePageData(__u32 nPage, __u32 nBitmap, __u8 *pBuf) +static __s32 _MergeCachePageData(__u32 nPage, __u64 nBitmap, __u8 *pBuf) { __s32 i; __u8 *tmpSrc = pBuf, *tmpDst = LML_WRITE_PAGE_CACHE; @@ -208,7 +209,7 @@ static __s32 _MergeCachePageData(__u32 nPage, __u32 nBitmap, __u8 *pBuf) for(i=0; i<SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(nBitmap & (1<<i)) + if(nBitmap & ((__u64)1<<i)) { //the sector of the write page is valid, copy data to the page cache MEMCPY(tmpDst, tmpSrc, SECTOR_SIZE); @@ -241,7 +242,8 @@ static __s32 _MergeCachePageData(__u32 nPage, __u32 nBitmap, __u8 *pBuf) static __s32 _WritePageCacheToNand(void) { __s32 result = 0; - __u32 tmpPage, tmpBitmap; + __u32 tmpPage; + __u64 tmpBitmap; __u8 *tmpBuf; tmpPage = CachePage.LogicPageNum; @@ -452,7 +454,7 @@ __s32 LML_CalculatePhyOpPar(struct __PhysicOpPara_t *pPhyPar, __u32 nZone, __u32 __s32 LML_VirtualPageRead(struct __PhysicOpPara_t *pVirtualPage) { __s32 i, result; - __u32 tmpBitmap; + __u64 tmpBitmap; __u8 *tmpSpare, *tmpSrcData, *tmpDstData, *tmpSrcPtr[4], *tmpDstPtr[4]; struct __PhysicOpPara_t tmpPhyPage; @@ -467,7 +469,7 @@ __s32 LML_VirtualPageRead(struct __PhysicOpPara_t *pVirtualPage) //process the pointer to spare area data for(i=0; i<2; i++) { - if(tmpBitmap & (1<<i)) + if(tmpBitmap & ((__u64)1<<i)) { tmpSrcPtr[i] = LML_SPARE_BUF + 4 * i; tmpDstPtr[i] = tmpSpare + 4 * i; @@ -480,7 +482,7 @@ __s32 LML_VirtualPageRead(struct __PhysicOpPara_t *pVirtualPage) for(i=0; i<2; i++) { - if(tmpBitmap & (1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) + if(tmpBitmap & ((__u64)1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) { tmpSrcPtr[i+2] = LML_SPARE_BUF + 4 * (i + SECTOR_CNT_OF_SINGLE_PAGE); tmpDstPtr[i+2] = tmpSpare + 8 + 4 * i; @@ -542,7 +544,7 @@ __s32 LML_VirtualPageRead(struct __PhysicOpPara_t *pVirtualPage) __s32 LML_VirtualPageWrite( struct __PhysicOpPara_t *pVirtualPage) { __s32 i, result; - __u32 tmpBitmap; + __u64 tmpBitmap; __u8 *tmpSpare, *tmpSrcData, *tmpDstData, *tmpSrcPtr[4], *tmpDstPtr[4]; struct __PhysicOpPara_t tmpPhyPage; @@ -558,7 +560,7 @@ __s32 LML_VirtualPageWrite( struct __PhysicOpPara_t *pVirtualPage) //process the pointer to spare area data for(i=0; i<2; i++) { - if(tmpBitmap & (1<<i)) + if(tmpBitmap & ((__u64)1<<i)) { tmpSrcPtr[i] = tmpSpare + 4 * i; tmpDstPtr[i] = LML_SPARE_BUF + 4 * i; @@ -571,7 +573,7 @@ __s32 LML_VirtualPageWrite( struct __PhysicOpPara_t *pVirtualPage) for(i=0; i<2; i++) { - if(tmpBitmap & (1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) + if(tmpBitmap & ((__u64)1<<(i + SECTOR_CNT_OF_SINGLE_PAGE))) { tmpSrcPtr[i+2] = tmpSpare + 8 + 4 * i; tmpDstPtr[i+2] = LML_SPARE_BUF + 4 * (i + SECTOR_CNT_OF_SINGLE_PAGE); @@ -733,7 +735,7 @@ static __s32 _CloseWritePage(void) * < 0 read failed. ************************************************************************************************************************ */ -__s32 LML_PageRead(__u32 nPage, __u32 nBitmap, void* pBuf) +__s32 LML_PageRead(__u32 nPage, __u64 nBitmap, void* pBuf) { __s32 result; __u32 tmpSuperBlk, tmpSuperPage; @@ -851,7 +853,7 @@ __s32 LML_PageRead(__u32 nPage, __u32 nBitmap, void* pBuf) * < 0 write failed. ************************************************************************************************************************ */ -__s32 LML_PageWrite(__u32 nPage, __u32 nBitmap, void* pBuf) +__s32 LML_PageWrite(__u32 nPage, __u64 nBitmap, void* pBuf) { __s32 result; struct __LogicPageType_t tmpLogicPage; @@ -1101,7 +1103,8 @@ __s32 LML_FlushPageCache(void) __s32 LML_Read(__u32 nSectNum, __u32 nSectorCnt, void* pBuf) { __s32 i, result; - __u32 tmpMidPageCnt, tmpPageNum, tmpBitmap, tmpPageCnt; + __u32 tmpMidPageCnt, tmpPageNum, tmpPageCnt; + __u64 tmpBitmap; __u8 *tmpBuf; struct __GlobalLogicPageType_t tmpHeadPage, tmpTailPage; @@ -1133,7 +1136,7 @@ __s32 LML_Read(__u32 nSectNum, __u32 nSectorCnt, void* pBuf) //calculate the buffer address for page align for(i=0; i<SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(tmpHeadPage.SectorBitmap & (1<<i)) + if(tmpHeadPage.SectorBitmap & ((__u64)1<<i)) { break; } @@ -1231,7 +1234,8 @@ void echo_write_data (__u32 nSectNum, __u32 nSectorCnt, void* pBuf) __s32 LML_Write(__u32 nSectNum, __u32 nSectorCnt, void* pBuf) { __s32 i, result; - __u32 tmpMidPageCnt, tmpPageNum, tmpBitmap, tmpPageCnt; + __u32 tmpMidPageCnt, tmpPageNum, tmpPageCnt; + __u64 tmpBitmap; __u8 *tmpBuf; struct __GlobalLogicPageType_t tmpHeadPage, tmpTailPage; @@ -1260,7 +1264,7 @@ __s32 LML_Write(__u32 nSectNum, __u32 nSectorCnt, void* pBuf) //calculate the buffer address for page align for(i=0; i<SECTOR_CNT_OF_LOGIC_PAGE; i++) { - if(tmpHeadPage.SectorBitmap & (1<<i)) + if(tmpHeadPage.SectorBitmap & ((__u64)1<<i)) { break; } @@ -1440,6 +1444,8 @@ __u32 NAND_GetDiskSize(void) disksize = (SECTOR_CNT_OF_SINGLE_PAGE * PAGE_CNT_OF_PHY_BLK * BLOCK_CNT_OF_DIE * \ DIE_CNT_OF_CHIP * NandStorageInfo.ChipCnt / 1024 * DATA_BLK_CNT_OF_ZONE); + printk(KERN_ERR "%s: disksize=%d\n", __func__, disksize); + return disksize; } diff --git a/drivers/block/sunxi_nand/src/logic/mapping.c b/drivers/block/sunxi_nand/src/logic/mapping.c index 6a441d8..aaed2b8 100644 --- a/drivers/block/sunxi_nand/src/logic/mapping.c +++ b/drivers/block/sunxi_nand/src/logic/mapping.c @@ -24,8 +24,8 @@ extern struct __NandDriverGlobal_t NandDriverInfo; -struct __BlkMapTblCachePool_t BlkMapTblCachePool; -struct __PageMapTblCachePool_t PageMapTblCachePool; +struct __BlkMapTblCachePool_t BlkMapTblCachePool={0}; +struct __PageMapTblCachePool_t PageMapTblCachePool={0}; void dump(void *buf, __u32 len , __u8 nbyte,__u8 linelen) { diff --git a/drivers/block/sunxi_nand/src/physic/nand_phy.c b/drivers/block/sunxi_nand/src/physic/nand_phy.c index 287209d..341f8ff 100644 --- a/drivers/block/sunxi_nand/src/physic/nand_phy.c +++ b/drivers/block/sunxi_nand/src/physic/nand_phy.c @@ -88,7 +88,7 @@ __s32 _read_single_page_seq(struct boot_physical_param *readop,__u8 dma_wait_mod __u32 random_seed; //__u8 *sparebuf; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; __u32 list_len,i; @@ -162,7 +162,7 @@ __s32 _read_single_page_1K(struct boot_physical_param *readop,__u8 dma_wait_mode __s32 ret; __u32 rb; __u32 random_seed; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; __u32 list_len,i; @@ -238,7 +238,7 @@ __s32 _read_single_page_spare(struct boot_physical_param *readop,__u8 dma_wait_m __u32 k = 0; __u32 rb; __u32 random_seed; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 default_value[16]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; @@ -557,7 +557,7 @@ __s32 _read_sectors(struct boot_physical_param *readop,__u8 dma_wait_mode) __u32 k; __u32 rb; __u32 random_seed; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 default_value[16]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; @@ -774,7 +774,7 @@ __s32 _two_plane_read(struct __PhysicOpPara_t *pPageAdr,__u8 dma_wait_mode) __u32 chip; __u32 rb; __u32 list_len,i,plane_cnt; - __u32 bitmap_in_single_page; + __u64 bitmap_in_single_page; __u32 block_in_chip; NFC_CMD_LIST cmd_list[8]; @@ -854,7 +854,7 @@ __s32 PHY_PageRead(struct __PhysicOpPara_t *pPageAdr) __u32 chip; __u32 block_in_chip; __u32 plane_cnt,i; - __u32 bitmap_in_single_page; + __u64 bitmap_in_single_page; struct __NandUserData_t *sparebuf; struct __NandUserData_t oob_buf; struct boot_physical_param readop; @@ -1064,7 +1064,7 @@ __s32 _read_sectors_for_spare(struct boot_physical_param *readop,__u8 dma_wait_m /*send 05 + 2addr- e0 get 512 byte data*/ list_len = 4; for (i = 0; i < 2; i++){ - if (readop->sectorbitmap & (1 << i)){ + if (readop->sectorbitmap & ((__u64)1 << i)){ /*get main data addr*/ _cal_addr_in_chip_for_spare(0,0,i<<1,addr1,2); @@ -1289,7 +1289,7 @@ __s32 PHY_PageReadSpare(struct __PhysicOpPara_t *pPageAdr) __u32 chip; __u32 block_in_chip; __u32 plane_cnt,i; - __u32 bitmap_in_single_page; + __u64 bitmap_in_single_page; struct __NandUserData_t *sparebuf; struct __NandUserData_t oob_buf; struct boot_physical_param readop; diff --git a/drivers/block/sunxi_nand/src/physic/nand_simple_r.c b/drivers/block/sunxi_nand/src/physic/nand_simple_r.c index 88051e6..f8e0fa6 100644 --- a/drivers/block/sunxi_nand/src/physic/nand_simple_r.c +++ b/drivers/block/sunxi_nand/src/physic/nand_simple_r.c @@ -372,7 +372,7 @@ __s32 _read_single_page(struct boot_physical_param *readop,__u8 dma_wait_mode) __u32 k = 0; __u32 rb; __u32 random_seed; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 default_value[16]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; diff --git a/drivers/block/sunxi_nand/src/physic/nand_simple_w.c b/drivers/block/sunxi_nand/src/physic/nand_simple_w.c index 0ad0700..0aa038f 100644 --- a/drivers/block/sunxi_nand/src/physic/nand_simple_w.c +++ b/drivers/block/sunxi_nand/src/physic/nand_simple_w.c @@ -46,7 +46,7 @@ __s32 _write_signle_page (struct boot_physical_param *writeop,__u32 program1,__u __u32 rb; __u32 random_seed; //__u8 *sparebuf; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; __u32 list_len,i,addr_cycle; @@ -101,7 +101,7 @@ __s32 _write_signle_page_seq (struct boot_physical_param *writeop,__u32 program1 __u32 rb; __u32 random_seed; //__u8 *sparebuf; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; __u32 list_len,i,addr_cycle; @@ -157,7 +157,7 @@ __s32 _write_signle_page_1K (struct boot_physical_param *writeop,__u32 program1, __u32 rb; __u32 random_seed; //__u8 *sparebuf; - __u8 sparebuf[4*16]; + __u8 sparebuf[4*32]; __u8 addr[5]; NFC_CMD_LIST cmd_list[4]; __u32 list_len,i,addr_cycle; -- 1.7.9.5 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.