On 10 August 2015 at 15:44, Olliver Schinagl <oliver+l...@schinagl.nl> wrote:
> Hey Michal,
>
>
> On 10-08-15 13:07, Michal Suchanek wrote:
>>
>> Hello,
>>
>>> On 08-08-15 20:45, Olliver Schinagl wrote:
>>>>
>>>> Hey all,
>>>>
>>>> Alexandru Gagniuc <mr.nuke.me@...> writes:
>>>>
>>>>> SPI transfers were limited to one FIFO depth, which is 64 bytes.
>>>>> This was an artificial limitation, however, as the hardware can handle
>>>>> much larger bursts. To accommodate this, we enable the interrupt when
>>>>> the Rx FIFO is 3/4 full, and drain the FIFO within the interrupt
>>>>> handler. The 3/4 ratio was chosen arbitrarily, with the intention to
>>>>> reduce the potential number of interrupts.
>>>>>
>>>>> Since the SUN4I_CTL_TP bit is set, the hardware will pause
>>>>> transmission whenever the FIFO is full, so there is no risk of losing
>>>>> data if we can't service the interrupt in time.
>>>>>
>>>>> For the Tx side, enable and use the Tx FIFO 3/4 empty interrupt to
>>>>> replenish the FIFO on large SPI bursts. This requires more care in
>>>>> when the interrupt is left enabled, as this interrupt will continually
>>>>> trigger when the FIFO is less than 1/4 full, even though we
>>>>> acknowledge it.
>>>>>
>>>>> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@...>
>>>>> Acked-by: Maxime Ripard <maxime.ripard@...>
>>>>
>>>> This patch was posted more then a year ago and I think several tree's
>>>> carry it.
>>>>
>>>> I've used this patch in combination with the mmc-spi driver and found no
>>>> problems with it in the past year.
>>>>
>>>> So have my Tested-by: Olliver Schinagl <oli...@schinagl.nl>
>>>>
>>>> and lets get this patch merged!
>>>>
>>>> P.S. I have the original patch and can resend it if needed.
>>>> <snip>
>>
>> There are basically two issues with this
>>
>> 1) it conflicts with DMA support. Do we want this when there is DMA
>> support almost complete?
>
> Well this would affect PIO mode in all cases, so do we want this? I would
> think yet in case DMA is not available/disabled?

When will that happen?

>
> As without this patch, we cannot use something like mmc-spi due to the
> restriction of packet size iirc.

With DMA we can. And since DMA will be enabled most of the time the
non-DMA code will receive little or no testing.

>>
>>
>> 2) it adds support on sun4i but not sun6i. Unfortunately, I do not
>> have any sun6i hardware. sun6i has dmaengine in mainline but not the
>> dma support in spi.
>
> Well yeah, I don't have sun6i either so we can't merge something nobody has
> tested yet ;)
>>
>>
>> That aside,
>>
>> have you tested this for small transfers that would not trigger the
>> fifo 3/4 full interrupt?
>
> Well the mmc-spi would also have small transfers, no? I mean it's a little
> bit of everything I imagine?

I have no idea about mmc spi tbh. I have some mmc sockets lying around
but did not try using them and did not look at the protocol.

Thanks

Michal

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