Hello,

On Thu, Nov 12, 2015 at 7:03 PM, Julian Calaby <julian.cal...@gmail.com>
wrote:

> Hi Stefan,
>
> On Thu, Nov 12, 2015 at 12:20 AM, Stefan Monnier
> <monn...@iro.umontreal.ca> wrote:
> >> When the CPU clock speed is set to 480 MHz by the U-Boot SPL,
> >            ^^^
> > You mean MBUS?
> >
> >> the performance improvement for 'sunxi-fel write' transfers
> >> to DRAM is ~95 KB/s -> ~510 KB/s.
> >
> >> When the CPU clock speed is set to 1008 MHz by the U-Boot SPL,
> >> the performance improvement for 'sunxi-fel write' transfers
> >> to DRAM is ~180 KB/s -> ~510 KB/s.
> >
> > I don't understand the relation between the above 2 improvements.
> > What change causes the speed to go from 95KB/s to 180KB/s?
>
> My interpretation of this was that before this change, the transfer
> speed was somehow limited by the clock speed. With the MMU enabled, it
> appears that the clock speed is no-longer the limiting factor.
>
> (I'm _guessing_ that the transfer has to bounce through the CPU and
> this was slow without the MMU for some reason. I'm also guessing that
> enabling the MMU has moved the bottleneck elsewhere - possibly the USB
> hardware.)
>

On A83T board, after enabling MMU, sunxi-fel write speed is similar 510KB/s
(peripheral clock is at  600MHz).

If I increase the PLL6(peripheral clock), performance is improving.

after changing the PLL6 to 1200MHz, transfer speed to DDR3 is : 920.2 KB/s

Though, it is mentioned in datasheet that it's value should be 600.
However, allwinner u-boot code make it to 1200MHz.



>
> Thanks,
>
> --
> Julian Calaby
>
> Email: julian.cal...@gmail.com
> Profile: http://www.google.com/profiles/julian.calaby/
>
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