Hi

About H3 internal phy, i seeing that in H3 datasheet, maybe it 's help someone 
to make it work : 

EMAC Clock Register defaut value (H3 datasheet V1.1 page 153)
0b1011000000000000000 --- 0x58000
CLK_SEL 24mhz = 1
led POL high active = 0
shutdown = 1 (bit 16)
Internal PHY = 1

In my pepito opinion (no skill in kernel driver dev), it's look like emac from 
A31 is the same H3 but with an option for internal PHY. I see stmmac-dwmac 
working in log openwrt for A31 but with external phy. So for H3 I look for like 
this way and i propose some "add" in dtsi for testing :

//ADD
        aliases {
                ethernet0 = &gmac;
        };

//ADD
        ahb1_rst: reset@01c202c4 {
                #reset-cells = <1>;
                compatible = "allwinner,sun6i-a31-ahb1-reset";
                reg = <0x01c202c4 0x4>;
        };
//ADD
        ahb2_rst: reset@01c202c8 {
                #reset-cells = <1>;
                compatible = "allwinner,sun6i-a31-ahb1-reset";
                reg = <0x01c202c8 0x4>;
                };
//ADD - EMAC Clock Register defaut value 0x58000 - need reset bit 16 (power up)
        emac_clk_reg_rst: reset@01c30000 {
                #reset-cells = <1>;
                compatible = "allwinner,sun6i-a31-ahb1-reset";
                reg = <0x01c30000 0x4>;
        };

        //ADD
        gmac: ethernet@01c30000 {
                compatible = "allwinner,sun7i-a20-gmac", "snps,dwmac";
                reg = <0x01c30000 0x1054>;
                interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "macirq";
                clocks = <&bus_gates 17>;
                clock-names = "stmmaceth";
                //Maybe init phy at 25mhz after reset? (defaut CLK_SEL 24mhz = 
1)
                //resets = <&ahb_rst 17>, <&ahb2_rst 2>, <&emac_clk_reg_rst 
16>, <&emac_clk_reg_rst 18>;
                //reset-names = "stmmaceth", "ephyrst", "pwrup", 
"clk_sel_25mhz";
                resets = <&ahb_rst 17>, <&ahb2_rst 2>, <&emac_clk_reg_rst 16>;
                reset-names = "stmmaceth", "ephyrst", "pwrup";
                snps,pbl = <2>;
                snps,fixed-burst;
                snps,force_sf_dma_mode;
                status = "disabled";
                #address-cells = <1>;
                #size-cells = <0>;
        };

        

What do you think about that, already tried? I don't understand how phy is 
handled by driver (internal or external, i look at src sunxi_geth.c linux 3.4 
but i m a pepito in kernel dev!).
I haven't receive my oppc for now so i can' t try mysefl. Hope ethernet will 
work soon in mainline ;)
And a lot of respect for your hardwork already done! 

Pepito         


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