Hello all, >> This patch not introduce new features, just prepare code for >> adding sun6i PWM driver in next commits. >> >> A31 SoC have a different map of PWM registers than others ASoCs, >> but register bits purposes are very similar. >> >> This patch introduce set of register access routines, which >> are common for existing in driver ASoCs: >> - ctl_rdy - checks the ready bit of specified PWM channel, >> - ctl_read - reads value from control register of specified PWM channel, >> - ctl_write - writes significant bits to control register of specified PWM channel, >> - prd_read - reads value from period register of specified PWM channel, >> - prd_write - writes value to period register of specified PWM channel. >> Driver code redesigned to use the new routines. > > Why don't you use regmap for that?
First of all, i'm newbie and its my first patchset. I just remake what i see in the driver. I even don't suspect about use regmap here. Second thing - i can't test these driver on all existing sunxi SoCs, i have only A31 and A20 based boards where only pwm0 is accessible. Huge redesign cause bigger chance to make a mistake. If you think regmap solution is a must, then i will do that. This will be a good experience for me. Thanks, Siarhei -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
