The clock gate must stay on when disabling to ensure proper turning off.
After one period it will still be disabled anyway.
Signed-off-by: Pascal Roeleven <d...@pascalroeleven.nl>
---
drivers/pwm/pwm-sun4i.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 5c677c563..56942036b 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -292,13 +292,12 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct
pwm_device *pwm,
else
ctrl |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
- ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
-
if (state->enabled) {
ctrl |= BIT_CH(PWM_EN, pwm->hwpwm);
+ ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
} else {
+ /* Turn gate off after delay to ensure proper turning off */
ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm);
- ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
}
sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
--
2.20.1
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