Hi,
I am using mainline kernel on my A20 board and can not get GPIO working for
some ports.
I tested them through standard sysfs and for pin number id i used next :
(position of letter in alphabet - 1) * 32 + pin number
I tried with PE0, PE1, PE2, and PE4, i think that whole PE port does not
work. Pin is exported in /sys/class/gpioX and direction is set to 'out' but
when i write 1 or 0 to value nothing happens (actually it changed value for
0.2~0.4V between logical 0 and 1). Pin numbers for that port was
(5-1)*32+pinNumber => 128 + pinNumber.
In dtsi for A20 port E is by default intendent for CSI0 but CSI0 is not
enabled in my case and i also tried to completly remove SCI0 from linux
kernel and comment pin confiruration for CSI0 in dtsi file but it still
does not works.
I noticed this issue because i use LVDS display and my display standby pin
is connected to PE2.
After system is started i can login normally. After ~10 seconds i can see
only this message in dmesg:
[ 27.180481] random: crng init done
[ 31.896048] vcc3v0: disabling
[ 31.899038] vcc5v0: disabling
[ 31.902015] ldo3: disabling
[ 31.905150] ldo4: disabling
[ 31.908346] ahci-5v: disabling
[ 31.911416] usb0-vbus: disabling
[ 31.914644] usb1-vbus: disabling
After this message PE2 goes to LOW and never come back to HIGH level.
I also tried to completelly remove my LVDS display and i got the same
behavior for all pins on PE port.
I also tried to connect PE2 to pull-up 3V3 through 10k resistor but without
success. After ~30 seconds after i turn on device PE2 goes LOW forever.
Interesting part is that when it is HIGH it is 2.8, not 3.3V. Maybe i
missed some configuration in dts file.
Also tried PG1 and does not works.
Tried PH18, PH21 and it works.
Tried PB14 and it works.
Another ports i did not tried.
Interesting part is that because i enegled gpio debug in kernel setup i
always get message "gpio gpiochip0: Persistence not supported for GPIO XXX"
does not matter if if it is PE port which does not work or PH port which
works.
Can someone check this issue or check my dts files?
Thank you,
Milos Ladicorbic
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/*
* Copyright 2015 Chen-Yu Tsai
*
* Chen-Yu Tsai <w...@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* AXP202/209 Integrated Power Management Chip
* http://www.x-powers.com/product/AXP20X.php
* http://dl.linux-sunxi.org/AXP/AXP209%20Datasheet%20v1.0_cn.pdf
*/
&axp209 {
compatible = "x-powers,axp209";
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp202-ac-power-supply";
status = "disabled";
};
axp_adc: adc {
compatible = "x-powers,axp209-adc";
#io-channel-cells = <1>;
};
axp_gpio: gpio {
compatible = "x-powers,axp209-gpio";
gpio-controller;
#gpio-cells = <2>;
};
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp209-battery-power-supply";
status = "disabled";
};
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <1500>;
reg_dcdc2: dcdc2 {
regulator-name = "dcdc2";
};
reg_dcdc3: dcdc3 {
regulator-name = "dcdc3";
};
reg_ldo1: ldo1 {
/* LDO1 is a fixed output regulator */
regulator-always-on;
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
regulator-name = "ldo1";
};
reg_ldo2: ldo2 {
regulator-name = "ldo2";
};
reg_ldo3: ldo3 {
regulator-name = "ldo3";
};
reg_ldo4: ldo4 {
regulator-name = "ldo4";
};
reg_ldo5: ldo5 {
regulator-name = "ldo5";
status = "disabled";
};
};
usb_power_supply: usb-power-supply {
compatible = "x-powers,axp202-usb-power-supply";
status = "disabled";
};
};
/*
* Copyright 2013 Maxime Ripard
*
* Maxime Ripard <maxime.rip...@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/clock/sun7i-a20-ccu.h>
#include <dt-bindings/reset/sun4i-a10-ccu.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &gmac;
};
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer-lcd0-hdmi {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
<&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
<&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
<&ccu CLK_HDMI>;
status = "disabled";
};
framebuffer-lcd0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
<&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
<&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
framebuffer-lcd0-tve0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
<&ccu CLK_AHB_DE_BE0>,
<&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
<&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
/* kHz uV */
960000 1400000
912000 1400000
864000 1300000
720000 1200000
528000 1100000
312000 1000000
144000 1000000
>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
/* kHz uV */
960000 1400000
912000 1400000
864000 1300000
720000 1200000
528000 1100000
312000 1000000
144000 1000000
>;
#cooling-cells = <2>;
};
};
thermal-zones {
cpu_thermal {
/* milliseconds */
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&rtp>;
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device = <&cpu0
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
default-pool {
compatible = "shared-dma-pool";
size = <0x6000000>;
alloc-ranges = <0x4a000000 0x6000000>;
reusable;
linux,cma-default;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc24M: clk-24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: clk-32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
/*
* The following two are dummy clocks, placeholders
* used in the gmac_tx clock. The gmac driver will
* choose one parent depending on the PHY interface
* mode, using clk_set_rate auto-reparenting.
*
* The actual TX clock rate is not controlled by the
* gmac_tx clock.
*/
mii_phy_tx_clk: clk-mii-phy-tx {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "mii_phy_tx";
};
gmac_int_tx_clk: clk-gmac-int-tx {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_int_tx";
};
gmac_tx_clk: clk@1c20164 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-gmac-clk";
reg = <0x01c20164 0x4>;
clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
clock-output-names = "gmac_tx";
};
};
de: display-engine {
compatible = "allwinner,sun7i-a20-display-engine";
allwinner,pipelines = <&fe0>, <&fe1>;
status = "disabled";
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
system-control@1c00000 {
compatible = "allwinner,sun7i-a20-system-control",
"allwinner,sun4i-a10-system-control";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_a: sram@0 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00000000 0xc000>;
emac_sram: sram-section@8000 {
compatible =
"allwinner,sun7i-a20-sram-a3-a4",
"allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
status = "disabled";
};
};
sram_d: sram@10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
otg_sram: sram-section@0 {
compatible =
"allwinner,sun7i-a20-sram-d",
"allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
};
};
sram_c: sram@1d00000 {
compatible = "mmio-sram";
reg = <0x01d00000 0xd0000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x01d00000 0xd0000>;
ve_sram: sram-section@0 {
compatible =
"allwinner,sun7i-a20-sram-c1",
"allwinner,sun4i-a10-sram-c1";
reg = <0x000000 0x80000>;
};
};
};
nmi_intc: interrupt-controller@1c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x01c00030 0x0c>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
dma: dma-controller@1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_DMA>;
#dma-cells = <2>;
};
nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi0: spi@1c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
num-cs = <4>;
};
spi1: spi@1c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
};
csi0: csi@1c09000 {
compatible = "allwinner,sun7i-a20-csi0";
reg = <0x01c09000 0x1000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>,
<&ccu CLK_DRAM_CSI0>;
clock-names = "bus", "isp", "ram";
resets = <&ccu RST_CSI0>;
status = "disabled";
};
emac: ethernet@1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
mdio: mdio@1c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun7i-a20-tcon0",
"allwinner,sun7i-a20-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
reset-names = "lcd", "lvds";
clocks = <&ccu CLK_AHB_LCD0>,
<&ccu CLK_TCON0_CH0>,
<&ccu CLK_TCON0_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon0-pixel-clock";
#clock-cells = <0>;
dmas = <&dma SUN4I_DMA_DEDICATED 14>;
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&be0_out_tcon0>;
};
tcon0_in_be1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&be1_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon0_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint =
<&hdmi_in_tcon0>;
allwinner,tcon-channel = <1>;
};
};
};
};
tcon1: lcd-controller@1c0d000 {
compatible = "allwinner,sun7i-a20-tcon1",
"allwinner,sun7i-a20-tcon";
reg = <0x01c0d000 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_TCON1>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB_LCD1>,
<&ccu CLK_TCON1_CH0>,
<&ccu CLK_TCON1_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon1-pixel-clock";
#clock-cells = <0>;
dmas = <&dma SUN4I_DMA_DEDICATED 15>;
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon1_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon1_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&be0_out_tcon1>;
};
tcon1_in_be1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&be1_out_tcon1>;
};
};
tcon1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon1_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint =
<&hdmi_in_tcon1>;
allwinner,tcon-channel = <1>;
};
};
};
};
video-codec@1c0e000 {
compatible = "allwinner,sun7i-a20-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_VE>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_AHB_MMC0>,
<&ccu CLK_MMC0>,
<&ccu CLK_MMC0_OUTPUT>,
<&ccu CLK_MMC0_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc1: mmc@1c10000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_AHB_MMC1>,
<&ccu CLK_MMC1>,
<&ccu CLK_MMC1_OUTPUT>,
<&ccu CLK_MMC1_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc2: mmc@1c11000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_AHB_MMC2>,
<&ccu CLK_MMC2>,
<&ccu CLK_MMC2_OUTPUT>,
<&ccu CLK_MMC2_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc3: mmc@1c12000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c12000 0x1000>;
clocks = <&ccu CLK_AHB_MMC3>,
<&ccu CLK_MMC3>,
<&ccu CLK_MMC3_OUTPUT>,
<&ccu CLK_MMC3_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
usb_otg: usb@1c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
clocks = <&ccu CLK_AHB_OTG>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
allwinner,sram = <&otg_sram 1>;
dr_mode = "otg";
status = "disabled";
};
usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun7i-a20-usb-phy";
reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800
0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";
resets = <&ccu RST_USB_PHY0>,
<&ccu RST_USB_PHY1>,
<&ccu RST_USB_PHY2>;
reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
status = "disabled";
};
ehci0: usb@1c14000 {
compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_EHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@1c14400 {
compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
crypto: crypto-engine@1c15000 {
compatible = "allwinner,sun7i-a20-crypto",
"allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
clock-names = "ahb", "mod";
};
hdmi: hdmi@1c16000 {
compatible = "allwinner,sun7i-a20-hdmi",
"allwinner,sun5i-a10s-hdmi";
reg = <0x01c16000 0x1000>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
<&ccu CLK_PLL_VIDEO0_2X>,
<&ccu CLK_PLL_VIDEO1_2X>;
clock-names = "ahb", "mod", "pll-0", "pll-1";
dmas = <&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_DEDICATED 24>;
dma-names = "ddc-tx", "ddc-rx", "audio-tx";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
hdmi_in_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&tcon0_out_hdmi>;
};
hdmi_in_tcon1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&tcon1_out_hdmi>;
};
};
hdmi_out: port@1 {
reg = <1>;
};
};
};
spi2: spi@1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
};
ahci: sata@1c18000 {
compatible = "allwinner,sun4i-a10-ahci";
reg = <0x01c18000 0x1000>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
status = "disabled";
};
ehci1: usb@1c1c000 {
compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c1c000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_EHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@1c1c400 {
compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
reg = <0x01c1c400 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
csi1: csi@1c1d000 {
compatible = "allwinner,sun7i-a20-csi1",
"allwinner,sun4i-a10-csi1";
reg = <0x01c1d000 0x1000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;
clock-names = "bus", "ram";
resets = <&ccu RST_CSI1>;
status = "disabled";
};
spi3: spi@1c1f000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c1f000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 31>,
<&dma SUN4I_DMA_DEDICATED 30>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
};
ccu: clock@1c20000 {
compatible = "allwinner,sun7i-a20-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
pio: pinctrl@1c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
/omit-if-no-ref/
can_pa_pins: can-pa-pins {
pins = "PA16", "PA17";
function = "can";
};
/omit-if-no-ref/
can_ph_pins: can-ph-pins {
pins = "PH20", "PH21";
function = "can";
};
/omit-if-no-ref/
clk_out_a_pin: clk-out-a-pin {
pins = "PI12";
function = "clk_out_a";
};
/omit-if-no-ref/
clk_out_b_pin: clk-out-b-pin {
pins = "PI13";
function = "clk_out_b";
};
/omit-if-no-ref/
csi0_8bits_pins: csi-8bits-pins {
pins = "PE0", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10",
"PE11";
function = "csi0";
};
/omit-if-no-ref/
csi0_clk_pin: csi-clk-pin {
pins = "PE1";
function = "csi0";
};
/omit-if-no-ref/
csi1_8bits_pg_pins: csi1-8bits-pg-pins {
pins = "PG0", "PG2", "PG3", "PG4", "PG5",
"PG6", "PG7", "PG8", "PG9", "PG10",
"PG11";
function = "csi1";
};
/omit-if-no-ref/
csi1_24bits_ph_pins: csi1-24bits-ph-pins {
pins = "PH0", "PH1", "PH2", "PH3", "PH4",
"PH5", "PH6", "PH7", "PH8", "PH9",
"PH10", "PH11", "PH12", "PH13", "PH14",
"PH15", "PH16", "PH17", "PH18", "PH19",
"PH20", "PH21", "PH22", "PH23", "PH24",
"PH25", "PH26", "PH27";
function = "csi1";
};
/omit-if-no-ref/
csi1_clk_pg_pin: csi1-clk-pg-pin {
pins = "PG1";
function = "csi1";
};
/omit-if-no-ref/
emac_pa_pins: emac-pa-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA9", "PA10",
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
function = "emac";
};
/omit-if-no-ref/
emac_ph_pins: emac-ph-pins {
pins = "PH8", "PH9", "PH10", "PH11",
"PH14", "PH15", "PH16", "PH17",
"PH18", "PH19", "PH20", "PH21",
"PH22", "PH23", "PH24", "PH25",
"PH26";
function = "emac";
};
/omit-if-no-ref/
gmac_mii_pins: gmac-mii-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA9", "PA10",
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
function = "gmac";
};
/omit-if-no-ref/
gmac_rgmii_pins: gmac-rgmii-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA10",
"PA11", "PA12", "PA13",
"PA15", "PA16";
function = "gmac";
/*
* data lines in RGMII mode use DDR mode
* and need a higher signal drive strength
*/
drive-strength = <40>;
};
/omit-if-no-ref/
i2c0_pins: i2c0-pins {
pins = "PB0", "PB1";
function = "i2c0";
};
/omit-if-no-ref/
i2c1_pins: i2c1-pins {
pins = "PB18", "PB19";
function = "i2c1";
};
/omit-if-no-ref/
i2c2_pins: i2c2-pins {
pins = "PB20", "PB21";
function = "i2c2";
};
/omit-if-no-ref/
i2c3_pins: i2c3-pins {
pins = "PI0", "PI1";
function = "i2c3";
};
/omit-if-no-ref/
ir0_rx_pin: ir0-rx-pin {
pins = "PB4";
function = "ir0";
};
/omit-if-no-ref/
ir0_tx_pin: ir0-tx-pin {
pins = "PB3";
function = "ir0";
};
/omit-if-no-ref/
ir1_rx_pin: ir1-rx-pin {
pins = "PB23";
function = "ir1";
};
/omit-if-no-ref/
ir1_tx_pin: ir1-tx-pin {
pins = "PB22";
function = "ir1";
};
/omit-if-no-ref/
lcd_lvds0_pins: lcd-lvds0-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD6", "PD7", "PD8", "PD9";
function = "lvds0";
};
/omit-if-no-ref/
lcd_lvds1_pins: lcd-lvds1-pins {
pins = "PD10", "PD11", "PD12", "PD13", "PD14",
"PD15", "PD16", "PD17", "PD18", "PD19";
function = "lvds1";
};
/omit-if-no-ref/
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
bias-pull-up;
};
/omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC6", "PC7", "PC8",
"PC9", "PC10", "PC11";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
};
/omit-if-no-ref/
mmc3_pins: mmc3-pins {
pins = "PI4", "PI5", "PI6",
"PI7", "PI8", "PI9";
function = "mmc3";
drive-strength = <30>;
bias-pull-up;
};
/omit-if-no-ref/
ps2_0_pins: ps2-0-pins {
pins = "PI20", "PI21";
function = "ps2";
};
/omit-if-no-ref/
ps2_1_ph_pins: ps2-1-ph-pins {
pins = "PH12", "PH13";
function = "ps2";
};
/omit-if-no-ref/
pwm0_pin: pwm0-pin {
pins = "PB2";
function = "pwm";
};
/omit-if-no-ref/
pwm1_pin: pwm1-pin {
pins = "PI3";
function = "pwm";
};
/omit-if-no-ref/
spdif_tx_pin: spdif-tx-pin {
pins = "PB13";
function = "spdif";
bias-pull-up;
};
/omit-if-no-ref/
spi0_pi_pins: spi0-pi-pins {
pins = "PI11", "PI12", "PI13";
function = "spi0";
};
/omit-if-no-ref/
spi0_cs0_pi_pin: spi0-cs0-pi-pin {
pins = "PI10";
function = "spi0";
};
/omit-if-no-ref/
spi0_cs1_pi_pin: spi0-cs1-pi-pin {
pins = "PI14";
function = "spi0";
};
/omit-if-no-ref/
spi1_pi_pins: spi1-pi-pins {
pins = "PI17", "PI18", "PI19";
function = "spi1";
};
/omit-if-no-ref/
spi1_cs0_pi_pin: spi1-cs0-pi-pin {
pins = "PI16";
function = "spi1";
};
/omit-if-no-ref/
spi2_pb_pins: spi2-pb-pins {
pins = "PB15", "PB16", "PB17";
function = "spi2";
};
/omit-if-no-ref/
spi2_cs0_pb_pin: spi2-cs0-pb-pin {
pins = "PB14";
function = "spi2";
};
/omit-if-no-ref/
spi2_pc_pins: spi2-pc-pins {
pins = "PC20", "PC21", "PC22";
function = "spi2";
};
/omit-if-no-ref/
spi2_cs0_pc_pin: spi2-cs0-pc-pin {
pins = "PC19";
function = "spi2";
};
/omit-if-no-ref/
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
};
/omit-if-no-ref/
uart0_pf_pins: uart0-pf-pins {
pins = "PF2", "PF4";
function = "uart0";
};
/omit-if-no-ref/
uart1_pa_pins: uart1-pa-pins {
pins = "PA10", "PA11";
function = "uart1";
};
/omit-if-no-ref/
uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins {
pins = "PA12", "PA13";
function = "uart1";
};
/omit-if-no-ref/
uart2_pa_pins: uart2-pa-pins {
pins = "PA2", "PA3";
function = "uart2";
};
/omit-if-no-ref/
uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins {
pins = "PA0", "PA1";
function = "uart2";
};
/omit-if-no-ref/
uart2_pi_pins: uart2-pi-pins {
pins = "PI18", "PI19";
function = "uart2";
};
/omit-if-no-ref/
uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins {
pins = "PI16", "PI17";
function = "uart2";
};
/omit-if-no-ref/
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
};
/omit-if-no-ref/
uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";
};
/omit-if-no-ref/
uart3_ph_pins: uart3-ph-pins {
pins = "PH0", "PH1";
function = "uart3";
};
/omit-if-no-ref/
uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins {
pins = "PH2", "PH3";
function = "uart3";
};
/omit-if-no-ref/
uart4_pg_pins: uart4-pg-pins {
pins = "PG10", "PG11";
function = "uart4";
};
/omit-if-no-ref/
uart4_ph_pins: uart4-ph-pins {
pins = "PH4", "PH5";
function = "uart4";
};
/omit-if-no-ref/
uart5_ph_pins: uart5-ph-pins {
pins = "PH6", "PH7";
function = "uart5";
};
/omit-if-no-ref/
uart5_pi_pins: uart5-pi-pins {
pins = "PI10", "PI11";
function = "uart5";
};
/omit-if-no-ref/
uart6_pa_pins: uart6-pa-pins {
pins = "PA12", "PA13";
function = "uart6";
};
/omit-if-no-ref/
uart6_pi_pins: uart6-pi-pins {
pins = "PI12", "PI13";
function = "uart6";
};
/omit-if-no-ref/
uart7_pa_pins: uart7-pa-pins {
pins = "PA14", "PA15";
function = "uart7";
};
/omit-if-no-ref/
uart7_pi_pins: uart7-pi-pins {
pins = "PI20", "PI21";
function = "uart7";
};
};
timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
wdt: watchdog@1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
rtc: rtc@1c20d00 {
compatible = "allwinner,sun7i-a20-rtc";
reg = <0x01c20d00 0x20>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
};
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
status = "disabled";
};
spdif: spdif@1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-spdif";
reg = <0x01c21000 0x400>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
dmas = <&dma SUN4I_DMA_NORMAL 2>,
<&dma SUN4I_DMA_NORMAL 2>;
dma-names = "rx", "tx";
status = "disabled";
};
ir0: ir@1c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
clock-names = "apb", "ir";
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
ir1: ir@1c21c00 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
clock-names = "apb", "ir";
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01c21c00 0x40>;
status = "disabled";
};
i2s1: i2s@1c22000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c22000 0x400>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 4>,
<&dma SUN4I_DMA_NORMAL 4>;
dma-names = "rx", "tx";
status = "disabled";
};
i2s0: i2s@1c22400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c22400 0x400>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 3>,
<&dma SUN4I_DMA_NORMAL 3>;
dma-names = "rx", "tx";
status = "disabled";
};
lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun7i-a20-codec";
reg = <0x01c22c00 0x40>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
dma-names = "rx", "tx";
status = "disabled";
};
sid: eeprom@1c23800 {
compatible = "allwinner,sun7i-a20-sid";
reg = <0x01c23800 0x200>;
};
i2s2: i2s@1c24400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c24400 0x400>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 6>,
<&dma SUN4I_DMA_NORMAL 6>;
dma-names = "rx", "tx";
status = "disabled";
};
rtp: rtp@1c25000 {
compatible = "allwinner,sun5i-a13-ts";
reg = <0x01c25000 0x100>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <0>;
};
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
uart1: serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART1>;
status = "disabled";
};
uart2: serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
uart3: serial@1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART3>;
status = "disabled";
};
uart4: serial@1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART4>;
status = "disabled";
};
uart5: serial@1c29400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29400 0x400>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART5>;
status = "disabled";
};
uart6: serial@1c29800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29800 0x400>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART6>;
status = "disabled";
};
uart7: serial@1c29c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29c00 0x400>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART7>;
status = "disabled";
};
ps20: ps2@1c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_PS20>;
status = "disabled";
};
ps21: ps2@1c2a400 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a400 0x400>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_PS21>;
status = "disabled";
};
i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_I2C0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@1c2b000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_I2C1>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@1c2b400 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_I2C2>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c3: i2c@1c2b800 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b800 0x400>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_I2C3>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
can0: can@1c2bc00 {
compatible = "allwinner,sun7i-a20-can",
"allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_CAN>;
status = "disabled";
};
i2c4: i2c@1c2c000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2c000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_I2C4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mali: gpu@1c40000 {
compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
reg = <0x01c40000 0x10000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pmu";
clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
clock-names = "bus", "core";
resets = <&ccu RST_GPU>;
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
gmac: ethernet@1c50000 {
compatible = "allwinner,sun7i-a20-gmac";
reg = <0x01c50000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
clock-names = "stmmaceth", "allwinner_gmac_tx";
snps,pbl = <2>;
snps,fixed-burst;
snps,force_sf_dma_mode;
status = "disabled";
gmac_mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
hstimer@1c60000 {
compatible = "allwinner,sun7i-a20-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_HSTIMER>;
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
};
fe0: display-frontend@1e00000 {
compatible = "allwinner,sun7i-a20-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
<&ccu CLK_DRAM_DE_FE0>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
fe0_out_be1: endpoint@1 {
reg = <1>;
remote-endpoint = <&be1_in_fe0>;
};
};
};
};
fe1: display-frontend@1e20000 {
compatible = "allwinner,sun7i-a20-display-frontend";
reg = <0x01e20000 0x20000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
<&ccu CLK_DRAM_DE_FE1>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
fe1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe1_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe1>;
};
fe1_out_be1: endpoint@1 {
reg = <1>;
remote-endpoint = <&be1_in_fe1>;
};
};
};
};
be1: display-backend@1e40000 {
compatible = "allwinner,sun7i-a20-display-backend";
reg = <0x01e40000 0x10000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
<&ccu CLK_DRAM_DE_BE1>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be1_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be1_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&fe0_out_be1>;
};
be1_in_fe1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&fe1_out_be1>;
};
};
be1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be1_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&tcon0_in_be1>;
};
be1_out_tcon1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&tcon1_in_be1>;
};
};
};
};
be0: display-backend@1e60000 {
compatible = "allwinner,sun7i-a20-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
<&ccu CLK_DRAM_DE_BE0>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&fe0_out_be0>;
};
be0_in_fe1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&fe1_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint =
<&tcon0_in_be0>;
};
be0_out_tcon1: endpoint@1 {
reg = <1>;
remote-endpoint =
<&tcon1_in_be0>;
};
};
};
};
};
};
/*
* Copyright 2013 Maxime Ripard
*
* Maxime Ripard <maxime.rip...@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun7i-a20.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Tcs A20-tcs";
compatible = "tcs,a20-tcs", "allwinner,sun7i-a20";
aliases {
serial0 = &uart0;
serial1 = &uart6;
serial2 = &uart7;
spi0 = &spi1;
spi1 = &spi2;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&codec {
status = "okay";
};
&cpu0 {
cpu-supply = <®_dcdc2>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>;
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
};
&i2c0 {
status = "okay";
axp209: pmic@34 {
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 4 5 GPIO_ACTIVE_LOW>;
/* PE5 */
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&otg_sram {
status = "okay";
};
&pio {
gmac_txerr: gmac-txerr-pin {
pins = "PA17";
function = "gmac";
};
};
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
®_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-int-dll";
};
®_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
®_ahci_5v {
status = "okay";
};
®_usb0_vbus {
status = "okay";
/* USB0-DRV
PB9 */
};
®_usb1_vbus {
gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>;
/* USB1-DRV PB10 */
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pi_pins>,
<&spi1_cs0_pi_pin>;
status = "okay";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pc_pins>,
<&spi2_cs0_pc_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&uart6_pi_pins>;
status = "okay";
};
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7_pi_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /*
PH4 -> TODO this is camera CAMd4 pin */
usb0_vbus_det-gpios = <&pio 4 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
/* PH5 -> PE3 */
usb0_vbus-supply = <®_usb0_vbus>;
/* USB0-DRV PB9 */
usb1_vbus-supply = <®_usb1_vbus>;
/* USB1-DRV PH6 */
usb2_vbus-supply = <®_usb2_vbus>;
/* USB2-DRV PH3 */
status = "okay";
};
®_vcc5v0 {
status = "okay";
};
®_vcc3v0 {
status = "okay";
};
®_ahci_5v {
status = "okay";
};
/*
* Copyright 2020 TCS - TurControlSysteme Ltd.
* Milos Ladicorbic <milos.ladicor...@tcs-germany.com>
*
*/
#include "sun7i-a20-tcs.dts"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "sun7i-a20-tcs-7Zoll";
compatible = "tcs,a20-7Zoll", "allwinner,sun7i-a20";
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
};
backlight: backlight { //
LVDS Backlight Enable line
compatible = "gpio-backlight";
power-supply = <®_lcdctrl5v0>;
gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
/* PH8 */
};
reg_lcdctrl5v0: lcdctrl5v0 {
compatible = "regulator-fixed";
regulator-name = "lcdctrl5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>;
/* PH9 - LCD_CTRL power pupply */
status = "okay";
};
lvds_panel: panel@1c16500 {
compatible = "panel-lvds";
#address-cells = <1>;
#size-cells = <0>;
backlight = <&backlight>;
power-supply = <®_lcdctrl5v0>;
enable-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>;
/* PE2 STBY_DISPL */
reset-gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>;
/* PH17 RESET_DISPL */
status = "okay";
width-mm = <158>;
height-mm = <85>;
data-mapping = "vesa-24";
panel-timing {
// 1024x600 @60Hz
clock-frequency = <51000000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <1>;
hfront-porch = <1>;
hback-porch = <320>;
vfront-porch = <1>;
vback-porch = <35>;
vsync-len = <1>;
};
port {
lvds_panel_input: endpoint {
remote-endpoint = <&tcon0_out_lvds>;
};
};
};
};
&mmc2 {
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&mmc2_pwrseq>;
status = "okay";
emmc: emmc@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};
&i2c2 {
/* PB20 - PB21 */
status = "okay";
gt911: touchscreen@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&pio>;
interrupts = <7 12 IRQ_TYPE_EDGE_FALLING>;
/* EINT12 (PH12) */
irq-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>;
/* INT (PH12) */
reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
/* RST (PH11) */
};
};
/* connect tcon0_out_lvds -> lvds_panel_input */
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_lvds0_pins>;
};
&tcon0_out {
tcon0_out_lvds: endpoint@0 {
reg = <0>;
remote-endpoint = <&lvds_panel_input>;
allwinner,tcon-channel = <0>;
};
};
/*
* sunxi boards common regulator (ahci target power supply, usb-vbus) code
*
* Copyright 2014 - Hans de Goede <hdego...@redhat.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
reg_ahci_5v: ahci-5v {
compatible = "regulator-fixed";
regulator-name = "ahci-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 1 8 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pio 1 9 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
reg_usb2_vbus: usb2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb2-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 7 3 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
reg_vcc3v0: vcc3v0 {
compatible = "regulator-fixed";
regulator-name = "vcc3v0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
root@awsom:~#
root@awsom:~# Try to export PE4:^C^C
root@awsom:~# echo 132 > /sys/class/gpio/export
root@awsom:~# echo out > /sys/class/gpio/gpio132/direction
root@awsom:~# echo 1 > /sys/class/gpio/gpio132/value
root@awsom:~#
root@awsom:~# dmesg
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 5.8.0-rc1-g611ea810f-dirty (milos@debian1064)
(arm-linux-gnueabihf-gcc (Debian 8.3.0-2) 8.3.0, GNU ld (GNU Binutils for
Debian) 2.31.1) #37 SMP Thu Jul 9 14:17:07 CEST 2020
[ 0.000000] CPU: ARMv7 Processor [410fc074] revision 4 (ARMv7), cr=10c5387d
[ 0.000000] CPU: div instructions available: patching division code
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[ 0.000000] OF: fdt: Machine model: sun7i-a20-tcs-7Zoll
[ 0.000000] printk: bootconsole [earlycon0] enabled
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] Reserved memory: created CMA memory pool at 0x4a000000, size 96
MiB
[ 0.000000] OF: reserved mem: initialized node default-pool, compatible id
shared-dma-pool
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000040000000-0x000000005fda7fff]
[ 0.000000] HighMem empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000040000000-0x000000005fda7fff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000005fda7fff]
[ 0.000000] On node 0 totalpages: 130472
[ 0.000000] Normal zone: 1020 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 130472 pages, LIFO batch:31
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: Using PSCI v0.1 Function IDs from DT
[ 0.000000] percpu: Embedded 15 pages/cpu s30732 r8192 d22516 u61440
[ 0.000000] pcpu-alloc: s30732 r8192 d22516 u61440 alloc=15*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 129452
[ 0.000000] Kernel command line: console=ttyS0,115200 earlyprintk
root=/dev/mmcblk1p5 rootfstype=ext4 rootwait panic=10 rw selinux=0
drm.debug=0x03
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes,
linear)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes,
linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 407656K/521888K available (7168K kernel code, 496K
rwdata, 1868K rodata, 1024K init, 245K bss, 15928K reserved, 98304K
cma-reserved, 0K highmem)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU event tracing is enabled.
[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=2.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10
jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] random: get_random_bytes called from start_kernel+0x308/0x494
with crng_init=0
[ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff
max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[ 0.000008] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every
4398046511097ns
[ 0.008002] Switching to timer-based delay loop, resolution 41ns
[ 0.014428] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff,
max_idle_ns: 79635851949 ns
[ 0.023870] clocksource: hstimer: mask: 0xffffffff max_cycles: 0xffffffff,
max_idle_ns: 6370868154 ns
[ 0.033433] Console: colour dummy device 80x30
[ 0.037923] Calibrating delay loop (skipped), value calculated using timer
frequency.. 48.00 BogoMIPS (lpj=240000)
[ 0.048284] pid_max: default: 32768 minimum: 301
[ 0.053077] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes,
linear)
[ 0.060404] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes,
linear)
[ 0.068982] CPU: Testing write buffer coherency: ok
[ 0.074325] /cpus/cpu@0 missing clock-frequency property
[ 0.079650] /cpus/cpu@1 missing clock-frequency property
[ 0.085009] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.091390] Setting up static identity map for 0x40100000 - 0x40100060
[ 0.098142] rcu: Hierarchical SRCU implementation.
[ 0.103606] smp: Bringing up secondary CPUs ...
[ 0.119107] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.119290] smp: Brought up 1 node, 2 CPUs
[ 0.129074] SMP: Total of 2 processors activated (96.00 BogoMIPS).
[ 0.135244] CPU: All CPU(s) started in HYP mode.
[ 0.139868] CPU: Virtualization extensions available.
[ 0.145728] devtmpfs: initialized
[ 0.156002] VFP support v0.3: implementor 41 architecture 2 part 30 variant
7 rev 4
[ 0.164074] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
max_idle_ns: 19112604462750000 ns
[ 0.173949] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[ 0.184544] pinctrl core: initialized pinctrl subsystem
[ 0.190531] thermal_sys: Registered thermal governor 'step_wise'
[ 0.191467] NET: Registered protocol family 16
[ 0.203734] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.212009] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint
registers.
[ 0.220006] hw-breakpoint: maximum watchpoint size is 8 bytes.
[ 0.247071] reg-fixed-voltage ahci-5v: GPIO lookup for consumer (null)
[ 0.247083] reg-fixed-voltage ahci-5v: using device tree for GPIO lookup
[ 0.247121] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/ahci-5v[0]'
[ 0.247146] reg-fixed-voltage ahci-5v: No GPIO consumer (null) found
[ 0.247240] reg-fixed-voltage usb0-vbus: GPIO lookup for consumer (null)
[ 0.247248] reg-fixed-voltage usb0-vbus: using device tree for GPIO lookup
[ 0.247266] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/usb0-vbus[0]'
[ 0.247283] reg-fixed-voltage usb0-vbus: No GPIO consumer (null) found
[ 0.247353] reg-fixed-voltage usb1-vbus: GPIO lookup for consumer (null)
[ 0.247360] reg-fixed-voltage usb1-vbus: using device tree for GPIO lookup
[ 0.247377] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/usb1-vbus[0]'
[ 0.247394] reg-fixed-voltage usb1-vbus: No GPIO consumer (null) found
[ 0.247457] reg-fixed-voltage vcc3v0: GPIO lookup for consumer (null)
[ 0.247464] reg-fixed-voltage vcc3v0: using device tree for GPIO lookup
[ 0.247480] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/vcc3v0[0]'
[ 0.247495] of_get_named_gpiod_flags: can't parse 'gpio' property of node
'/vcc3v0[0]'
[ 0.247504] reg-fixed-voltage vcc3v0: using lookup tables for GPIO lookup
[ 0.247512] reg-fixed-voltage vcc3v0: No GPIO consumer (null) found
[ 0.247852] reg-fixed-voltage vcc3v3: GPIO lookup for consumer (null)
[ 0.247861] reg-fixed-voltage vcc3v3: using device tree for GPIO lookup
[ 0.247880] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/vcc3v3[0]'
[ 0.247896] of_get_named_gpiod_flags: can't parse 'gpio' property of node
'/vcc3v3[0]'
[ 0.247904] reg-fixed-voltage vcc3v3: using lookup tables for GPIO lookup
[ 0.247912] reg-fixed-voltage vcc3v3: No GPIO consumer (null) found
[ 0.248158] reg-fixed-voltage vcc5v0: GPIO lookup for consumer (null)
[ 0.248166] reg-fixed-voltage vcc5v0: using device tree for GPIO lookup
[ 0.248184] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/vcc5v0[0]'
[ 0.248199] of_get_named_gpiod_flags: can't parse 'gpio' property of node
'/vcc5v0[0]'
[ 0.248209] reg-fixed-voltage vcc5v0: using lookup tables for GPIO lookup
[ 0.248217] reg-fixed-voltage vcc5v0: No GPIO consumer (null) found
[ 0.248479] reg-fixed-voltage lcdctrl5v0: GPIO lookup for consumer (null)
[ 0.248486] reg-fixed-voltage lcdctrl5v0: using device tree for GPIO lookup
[ 0.248503] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/lcdctrl5v0[0]'
[ 0.248524] reg-fixed-voltage lcdctrl5v0: No GPIO consumer (null) found
[ 0.249225] SCSI subsystem initialized
[ 0.253345] libata version 3.00 loaded.
[ 0.253595] usbcore: registered new interface driver usbfs
[ 0.259221] usbcore: registered new interface driver hub
[ 0.264615] usbcore: registered new device driver usb
[ 0.270061] pps_core: LinuxPPS API ver. 1 registered
[ 0.275020] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo
Giometti <giome...@linux.it>
[ 0.284189] PTP clock support registered
[ 0.288410] Advanced Linux Sound Architecture Driver Initialized.
[ 0.295908] clocksource: Switched to clocksource arch_sys_counter
[ 0.303053] simple-framebuffer 5fda8000.framebuffer: framebuffer at
0x5fda8000, 0x258000 bytes, mapped to 0x(ptrval)
[ 0.313683] simple-framebuffer 5fda8000.framebuffer: format=x8r8g8b8,
mode=1024x600x32, linelength=4096
[ 0.334475] Console: switching to colour frame buffer device 128x37
[ 0.350253] simple-framebuffer 5fda8000.framebuffer: fb0: simplefb
registered!
[ 0.366172] NET: Registered protocol family 2
[ 0.371181] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144
bytes, linear)
[ 0.379625] TCP established hash table entries: 4096 (order: 2, 16384 bytes,
linear)
[ 0.387422] TCP bind hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.394607] TCP: Hash tables configured (established 4096 bind 4096)
[ 0.401147] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.407748] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.414936] NET: Registered protocol family 1
[ 0.420203] RPC: Registered named UNIX socket transport module.
[ 0.426241] RPC: Registered udp transport module.
[ 0.430938] RPC: Registered tcp transport module.
[ 0.435633] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.442814] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[ 0.450309] hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5
counters available
[ 0.460225] workingset: timestamp_bits=30 max_order=17 bucket_order=0
[ 0.473651] NFS: Registering the id_resolver key type
[ 0.478867] Key type id_resolver registered
[ 0.483046] Key type id_legacy registered
[ 0.487219] Block layer SCSI generic (bsg) driver version 0.4 loaded (major
248)
[ 0.494607] io scheduler mq-deadline registered
[ 0.499175] io scheduler kyber registered
[ 0.504106] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 0.504118] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 0.504159] sun4i-usb-phy 1c13400.phy: No GPIO consumer usb0_id_det found
[ 0.504168] sun4i-usb-phy 1c13400.phy: Couldn't request ID GPIO
[ 0.512565] gpio gpiochip0: (1c20800.pinctrl): added GPIO chardev (254:0)
[ 0.512684] gpio gpiochip0: registered GPIOs 0 to 287 on 1c20800.pinctrl
[ 0.512701] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 0->0 ==>
1c20800.pinctrl PIN 0->0
[ 0.512711] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 1->1 ==>
1c20800.pinctrl PIN 1->1
[ 0.512721] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 2->2 ==>
1c20800.pinctrl PIN 2->2
[ 0.512731] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 3->3 ==>
1c20800.pinctrl PIN 3->3
[ 0.512740] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 4->4 ==>
1c20800.pinctrl PIN 4->4
[ 0.512750] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 5->5 ==>
1c20800.pinctrl PIN 5->5
[ 0.512760] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 6->6 ==>
1c20800.pinctrl PIN 6->6
[ 0.512770] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 7->7 ==>
1c20800.pinctrl PIN 7->7
[ 0.512780] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 8->8 ==>
1c20800.pinctrl PIN 8->8
[ 0.512789] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 9->9 ==>
1c20800.pinctrl PIN 9->9
[ 0.512799] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 10->10 ==>
1c20800.pinctrl PIN 10->10
[ 0.512809] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 11->11 ==>
1c20800.pinctrl PIN 11->11
[ 0.512819] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 12->12 ==>
1c20800.pinctrl PIN 12->12
[ 0.512829] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 13->13 ==>
1c20800.pinctrl PIN 13->13
[ 0.512839] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 14->14 ==>
1c20800.pinctrl PIN 14->14
[ 0.512849] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 15->15 ==>
1c20800.pinctrl PIN 15->15
[ 0.512859] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 16->16 ==>
1c20800.pinctrl PIN 16->16
[ 0.512868] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 17->17 ==>
1c20800.pinctrl PIN 17->17
[ 0.512878] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 32->32 ==>
1c20800.pinctrl PIN 32->32
[ 0.512888] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 33->33 ==>
1c20800.pinctrl PIN 33->33
[ 0.512898] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 34->34 ==>
1c20800.pinctrl PIN 34->34
[ 0.512908] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 35->35 ==>
1c20800.pinctrl PIN 35->35
[ 0.512918] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 36->36 ==>
1c20800.pinctrl PIN 36->36
[ 0.512928] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 37->37 ==>
1c20800.pinctrl PIN 37->37
[ 0.512938] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 38->38 ==>
1c20800.pinctrl PIN 38->38
[ 0.512948] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 39->39 ==>
1c20800.pinctrl PIN 39->39
[ 0.512957] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 40->40 ==>
1c20800.pinctrl PIN 40->40
[ 0.512967] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 41->41 ==>
1c20800.pinctrl PIN 41->41
[ 0.512977] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 42->42 ==>
1c20800.pinctrl PIN 42->42
[ 0.512987] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 43->43 ==>
1c20800.pinctrl PIN 43->43
[ 0.512997] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 44->44 ==>
1c20800.pinctrl PIN 44->44
[ 0.513019] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 45->45 ==>
1c20800.pinctrl PIN 45->45
[ 0.513030] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 46->46 ==>
1c20800.pinctrl PIN 46->46
[ 0.513039] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 47->47 ==>
1c20800.pinctrl PIN 47->47
[ 0.513049] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 48->48 ==>
1c20800.pinctrl PIN 48->48
[ 0.513059] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 49->49 ==>
1c20800.pinctrl PIN 49->49
[ 0.513069] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 50->50 ==>
1c20800.pinctrl PIN 50->50
[ 0.513078] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 51->51 ==>
1c20800.pinctrl PIN 51->51
[ 0.513088] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 52->52 ==>
1c20800.pinctrl PIN 52->52
[ 0.513098] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 53->53 ==>
1c20800.pinctrl PIN 53->53
[ 0.513108] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 54->54 ==>
1c20800.pinctrl PIN 54->54
[ 0.513117] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 55->55 ==>
1c20800.pinctrl PIN 55->55
[ 0.513127] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 64->64 ==>
1c20800.pinctrl PIN 64->64
[ 0.513137] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 65->65 ==>
1c20800.pinctrl PIN 65->65
[ 0.513147] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 66->66 ==>
1c20800.pinctrl PIN 66->66
[ 0.513156] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 67->67 ==>
1c20800.pinctrl PIN 67->67
[ 0.513166] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 68->68 ==>
1c20800.pinctrl PIN 68->68
[ 0.513176] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 69->69 ==>
1c20800.pinctrl PIN 69->69
[ 0.513186] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 70->70 ==>
1c20800.pinctrl PIN 70->70
[ 0.513196] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 71->71 ==>
1c20800.pinctrl PIN 71->71
[ 0.513205] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 72->72 ==>
1c20800.pinctrl PIN 72->72
[ 0.513215] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 73->73 ==>
1c20800.pinctrl PIN 73->73
[ 0.513225] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 74->74 ==>
1c20800.pinctrl PIN 74->74
[ 0.513234] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 75->75 ==>
1c20800.pinctrl PIN 75->75
[ 0.513245] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 76->76 ==>
1c20800.pinctrl PIN 76->76
[ 0.513254] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 77->77 ==>
1c20800.pinctrl PIN 77->77
[ 0.513264] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 78->78 ==>
1c20800.pinctrl PIN 78->78
[ 0.513274] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 79->79 ==>
1c20800.pinctrl PIN 79->79
[ 0.513283] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 80->80 ==>
1c20800.pinctrl PIN 80->80
[ 0.513293] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 81->81 ==>
1c20800.pinctrl PIN 81->81
[ 0.513303] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 82->82 ==>
1c20800.pinctrl PIN 82->82
[ 0.513313] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 83->83 ==>
1c20800.pinctrl PIN 83->83
[ 0.513323] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 84->84 ==>
1c20800.pinctrl PIN 84->84
[ 0.513332] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 85->85 ==>
1c20800.pinctrl PIN 85->85
[ 0.513342] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 86->86 ==>
1c20800.pinctrl PIN 86->86
[ 0.513352] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 87->87 ==>
1c20800.pinctrl PIN 87->87
[ 0.513362] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 88->88 ==>
1c20800.pinctrl PIN 88->88
[ 0.513371] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 96->96 ==>
1c20800.pinctrl PIN 96->96
[ 0.513381] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 97->97 ==>
1c20800.pinctrl PIN 97->97
[ 0.513391] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 98->98 ==>
1c20800.pinctrl PIN 98->98
[ 0.513401] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 99->99 ==>
1c20800.pinctrl PIN 99->99
[ 0.513411] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 100->100
==> 1c20800.pinctrl PIN 100->100
[ 0.513421] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 101->101
==> 1c20800.pinctrl PIN 101->101
[ 0.513431] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 102->102
==> 1c20800.pinctrl PIN 102->102
[ 0.513441] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 103->103
==> 1c20800.pinctrl PIN 103->103
[ 0.513451] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 104->104
==> 1c20800.pinctrl PIN 104->104
[ 0.513461] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 105->105
==> 1c20800.pinctrl PIN 105->105
[ 0.513471] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 106->106
==> 1c20800.pinctrl PIN 106->106
[ 0.513480] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 107->107
==> 1c20800.pinctrl PIN 107->107
[ 0.513490] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 108->108
==> 1c20800.pinctrl PIN 108->108
[ 0.513500] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 109->109
==> 1c20800.pinctrl PIN 109->109
[ 0.513510] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 110->110
==> 1c20800.pinctrl PIN 110->110
[ 0.513520] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 111->111
==> 1c20800.pinctrl PIN 111->111
[ 0.513530] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 112->112
==> 1c20800.pinctrl PIN 112->112
[ 0.513540] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 113->113
==> 1c20800.pinctrl PIN 113->113
[ 0.513550] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 114->114
==> 1c20800.pinctrl PIN 114->114
[ 0.513560] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 115->115
==> 1c20800.pinctrl PIN 115->115
[ 0.513570] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 116->116
==> 1c20800.pinctrl PIN 116->116
[ 0.513580] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 117->117
==> 1c20800.pinctrl PIN 117->117
[ 0.513590] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 118->118
==> 1c20800.pinctrl PIN 118->118
[ 0.513599] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 119->119
==> 1c20800.pinctrl PIN 119->119
[ 0.513609] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 120->120
==> 1c20800.pinctrl PIN 120->120
[ 0.513619] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 121->121
==> 1c20800.pinctrl PIN 121->121
[ 0.513629] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 122->122
==> 1c20800.pinctrl PIN 122->122
[ 0.513639] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 123->123
==> 1c20800.pinctrl PIN 123->123
[ 0.513660] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 128->128
==> 1c20800.pinctrl PIN 128->128
[ 0.513670] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 129->129
==> 1c20800.pinctrl PIN 129->129
[ 0.513680] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 130->130
==> 1c20800.pinctrl PIN 130->130
[ 0.513690] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 131->131
==> 1c20800.pinctrl PIN 131->131
[ 0.513700] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 132->132
==> 1c20800.pinctrl PIN 132->132
[ 0.513709] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 133->133
==> 1c20800.pinctrl PIN 133->133
[ 0.513719] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 134->134
==> 1c20800.pinctrl PIN 134->134
[ 0.513729] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 135->135
==> 1c20800.pinctrl PIN 135->135
[ 0.513739] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 136->136
==> 1c20800.pinctrl PIN 136->136
[ 0.513748] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 137->137
==> 1c20800.pinctrl PIN 137->137
[ 0.513758] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 138->138
==> 1c20800.pinctrl PIN 138->138
[ 0.513768] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 139->139
==> 1c20800.pinctrl PIN 139->139
[ 0.513778] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 160->160
==> 1c20800.pinctrl PIN 160->160
[ 0.513787] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 161->161
==> 1c20800.pinctrl PIN 161->161
[ 0.513797] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 162->162
==> 1c20800.pinctrl PIN 162->162
[ 0.513807] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 163->163
==> 1c20800.pinctrl PIN 163->163
[ 0.513817] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 164->164
==> 1c20800.pinctrl PIN 164->164
[ 0.513827] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 165->165
==> 1c20800.pinctrl PIN 165->165
[ 0.513837] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 192->192
==> 1c20800.pinctrl PIN 192->192
[ 0.513846] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 193->193
==> 1c20800.pinctrl PIN 193->193
[ 0.513857] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 194->194
==> 1c20800.pinctrl PIN 194->194
[ 0.513866] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 195->195
==> 1c20800.pinctrl PIN 195->195
[ 0.513876] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 196->196
==> 1c20800.pinctrl PIN 196->196
[ 0.513886] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 197->197
==> 1c20800.pinctrl PIN 197->197
[ 0.513896] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 198->198
==> 1c20800.pinctrl PIN 198->198
[ 0.513905] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 199->199
==> 1c20800.pinctrl PIN 199->199
[ 0.513915] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 200->200
==> 1c20800.pinctrl PIN 200->200
[ 0.513925] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 201->201
==> 1c20800.pinctrl PIN 201->201
[ 0.513935] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 202->202
==> 1c20800.pinctrl PIN 202->202
[ 0.513945] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 203->203
==> 1c20800.pinctrl PIN 203->203
[ 0.513955] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 224->224
==> 1c20800.pinctrl PIN 224->224
[ 0.513964] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 225->225
==> 1c20800.pinctrl PIN 225->225
[ 0.513974] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 226->226
==> 1c20800.pinctrl PIN 226->226
[ 0.513984] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 227->227
==> 1c20800.pinctrl PIN 227->227
[ 0.513994] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 228->228
==> 1c20800.pinctrl PIN 228->228
[ 0.514004] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 229->229
==> 1c20800.pinctrl PIN 229->229
[ 0.514013] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 230->230
==> 1c20800.pinctrl PIN 230->230
[ 0.514023] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 231->231
==> 1c20800.pinctrl PIN 231->231
[ 0.514033] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 232->232
==> 1c20800.pinctrl PIN 232->232
[ 0.514044] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 233->233
==> 1c20800.pinctrl PIN 233->233
[ 0.514054] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 234->234
==> 1c20800.pinctrl PIN 234->234
[ 0.514063] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 235->235
==> 1c20800.pinctrl PIN 235->235
[ 0.514073] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 236->236
==> 1c20800.pinctrl PIN 236->236
[ 0.514083] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 237->237
==> 1c20800.pinctrl PIN 237->237
[ 0.514093] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 238->238
==> 1c20800.pinctrl PIN 238->238
[ 0.514103] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 239->239
==> 1c20800.pinctrl PIN 239->239
[ 0.514113] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 240->240
==> 1c20800.pinctrl PIN 240->240
[ 0.514122] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 241->241
==> 1c20800.pinctrl PIN 241->241
[ 0.514132] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 242->242
==> 1c20800.pinctrl PIN 242->242
[ 0.514142] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 243->243
==> 1c20800.pinctrl PIN 243->243
[ 0.514152] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 244->244
==> 1c20800.pinctrl PIN 244->244
[ 0.514162] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 245->245
==> 1c20800.pinctrl PIN 245->245
[ 0.514172] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 246->246
==> 1c20800.pinctrl PIN 246->246
[ 0.514181] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 247->247
==> 1c20800.pinctrl PIN 247->247
[ 0.514191] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 248->248
==> 1c20800.pinctrl PIN 248->248
[ 0.514201] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 249->249
==> 1c20800.pinctrl PIN 249->249
[ 0.514211] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 250->250
==> 1c20800.pinctrl PIN 250->250
[ 0.514221] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 251->251
==> 1c20800.pinctrl PIN 251->251
[ 0.514231] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 256->256
==> 1c20800.pinctrl PIN 256->256
[ 0.514241] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 257->257
==> 1c20800.pinctrl PIN 257->257
[ 0.514251] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 258->258
==> 1c20800.pinctrl PIN 258->258
[ 0.514261] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 259->259
==> 1c20800.pinctrl PIN 259->259
[ 0.514271] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 260->260
==> 1c20800.pinctrl PIN 260->260
[ 0.514280] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 261->261
==> 1c20800.pinctrl PIN 261->261
[ 0.514301] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 262->262
==> 1c20800.pinctrl PIN 262->262
[ 0.514312] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 263->263
==> 1c20800.pinctrl PIN 263->263
[ 0.514322] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 264->264
==> 1c20800.pinctrl PIN 264->264
[ 0.514332] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 265->265
==> 1c20800.pinctrl PIN 265->265
[ 0.514341] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 266->266
==> 1c20800.pinctrl PIN 266->266
[ 0.514351] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 267->267
==> 1c20800.pinctrl PIN 267->267
[ 0.514361] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 268->268
==> 1c20800.pinctrl PIN 268->268
[ 0.514371] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 269->269
==> 1c20800.pinctrl PIN 269->269
[ 0.514381] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 270->270
==> 1c20800.pinctrl PIN 270->270
[ 0.514391] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 271->271
==> 1c20800.pinctrl PIN 271->271
[ 0.514401] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 272->272
==> 1c20800.pinctrl PIN 272->272
[ 0.514411] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 273->273
==> 1c20800.pinctrl PIN 273->273
[ 0.514421] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 274->274
==> 1c20800.pinctrl PIN 274->274
[ 0.514431] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 275->275
==> 1c20800.pinctrl PIN 275->275
[ 0.514441] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 276->276
==> 1c20800.pinctrl PIN 276->276
[ 0.514450] gpio gpiochip0: (1c20800.pinctrl): created GPIO range 277->277
==> 1c20800.pinctrl PIN 277->277
[ 0.515570] sun4i-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
[ 0.524292] gpio-backlight backlight: GPIO lookup for consumer (null)
[ 0.524303] gpio-backlight backlight: using device tree for GPIO lookup
[ 0.524347] of_get_named_gpiod_flags: parsed 'gpios' property of node
'/backlight[0]' - status (0)
[ 0.524425] sun4i-pinctrl 1c20800.pinctrl: supply vcc-ph not found, using
dummy regulator
[ 0.532807] gpio gpiochip0: Persistence not supported for GPIO 232
[ 0.532816] gpio-232 (backlight): no flags found for (null)
[ 0.597640] Serial: 8250/16550 driver, 8 ports, IRQ sharing disabled
[ 0.606340] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pb not found, using
dummy regulator
[ 0.615600] printk: console [ttyS0] disabled
[ 0.619933] dw-apb-uart 1c28000.serial: GPIO lookup for consumer rs485-term
[ 0.619942] dw-apb-uart 1c28000.serial: using device tree for GPIO lookup
[ 0.619984] of_get_named_gpiod_flags: can't parse 'rs485-term-gpios'
property of node '/soc/serial@1c28000[0]'
[ 0.620003] of_get_named_gpiod_flags: can't parse 'rs485-term-gpio' property
of node '/soc/serial@1c28000[0]'
[ 0.620016] dw-apb-uart 1c28000.serial: using lookup tables for GPIO lookup
[ 0.620026] dw-apb-uart 1c28000.serial: No GPIO consumer rs485-term found
[ 0.640191] 1c28000.serial: ttyS0 at MMIO 0x1c28000 (irq = 48, base_baud =
1500000) is a U6_16550A
[ 0.649239] printk: console [ttyS0] enabled
[ 0.657614] printk: bootconsole [earlycon0] disabled
[ 0.668081] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pi not found, using
dummy regulator
[ 0.677254] dw-apb-uart 1c29800.serial: GPIO lookup for consumer rs485-term
[ 0.677265] dw-apb-uart 1c29800.serial: using device tree for GPIO lookup
[ 0.677300] of_get_named_gpiod_flags: can't parse 'rs485-term-gpios'
property of node '/soc/serial@1c29800[0]'
[ 0.677317] of_get_named_gpiod_flags: can't parse 'rs485-term-gpio' property
of node '/soc/serial@1c29800[0]'
[ 0.677331] dw-apb-uart 1c29800.serial: using lookup tables for GPIO lookup
[ 0.677340] dw-apb-uart 1c29800.serial: No GPIO consumer rs485-term found
[ 0.699443] 1c29800.serial: ttyS1 at MMIO 0x1c29800 (irq = 49, base_baud =
1500000) is a U6_16550A
[ 0.709685] dw-apb-uart 1c29c00.serial: GPIO lookup for consumer rs485-term
[ 0.709697] dw-apb-uart 1c29c00.serial: using device tree for GPIO lookup
[ 0.709726] of_get_named_gpiod_flags: can't parse 'rs485-term-gpios'
property of node '/soc/serial@1c29c00[0]'
[ 0.709744] of_get_named_gpiod_flags: can't parse 'rs485-term-gpio' property
of node '/soc/serial@1c29c00[0]'
[ 0.709756] dw-apb-uart 1c29c00.serial: using lookup tables for GPIO lookup
[ 0.709765] dw-apb-uart 1c29c00.serial: No GPIO consumer rs485-term found
[ 0.729940] 1c29c00.serial: ttyS2 at MMIO 0x1c29c00 (irq = 50, base_baud =
1500000) is a U6_16550A
[ 0.740002] [drm:drm_core_init] Initialized
[ 0.740175] [drm:sun4i_drv_probe] Adding component
/soc/display-frontend@1e00000
[ 0.740255] [drm:sun4i_drv_probe] Adding component
/soc/display-frontend@1e20000
[ 0.740310] [drm:sun4i_drv_probe] Adding component
/soc/display-backend@1e60000
[ 0.740368] [drm:sun4i_drv_probe] Adding component
/soc/display-backend@1e40000
[ 0.740426] [drm:sun4i_drv_probe] Adding component
/soc/display-backend@1e60000
[ 0.740477] [drm:sun4i_drv_probe] Adding component
/soc/display-backend@1e40000
[ 0.740536] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0c000
[ 0.740629] [drm:sun4i_drv_traverse_endpoints] Endpoint is our panel...
skipping
[ 0.740661] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0d000
[ 0.740738] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0c000
[ 0.740823] [drm:sun4i_drv_traverse_endpoints] Endpoint is our panel...
skipping
[ 0.740854] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0d000
[ 0.740927] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0c000
[ 0.741013] [drm:sun4i_drv_traverse_endpoints] Endpoint is our panel...
skipping
[ 0.741044] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0d000
[ 0.741116] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0c000
[ 0.741202] [drm:sun4i_drv_traverse_endpoints] Endpoint is our panel...
skipping
[ 0.741233] [drm:sun4i_drv_probe] Adding component
/soc/lcd-controller@1c0d000
[ 0.742376] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pd not found, using
dummy regulator
[ 0.751175] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e00000
[ 0.752410] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e00000
[ 0.752425] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-frontend@1e00000
[ 0.752514] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e00000
[ 0.752528] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-frontend@1e00000
[ 0.752541] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-frontend@1e00000
[ 0.752834] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e00000
[ 0.752848] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-frontend@1e00000
[ 0.752861] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-frontend@1e00000
[ 0.752874] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/display-frontend@1e00000
[ 0.752887] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e20000
[ 0.752899] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-frontend@1e20000
[ 0.752911] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-frontend@1e20000
[ 0.752924] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/display-frontend@1e20000
[ 0.753001] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-frontend@1e20000
[ 0.753015] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-frontend@1e20000
[ 0.753028] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-frontend@1e20000
[ 0.753040] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/display-frontend@1e20000
[ 0.753053] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/display-frontend@1e20000
[ 0.753066] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-backend@1e60000
[ 0.753078] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-backend@1e60000
[ 0.753090] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-backend@1e60000
[ 0.753103] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-backend@1e40000
[ 0.753115] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-backend@1e40000
[ 0.753128] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-backend@1e60000
[ 0.753140] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-backend@1e60000
[ 0.753153] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/display-backend@1e60000
[ 0.753165] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/display-backend@1e40000
[ 0.753178] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/display-backend@1e40000
[ 0.753191] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0c000
[ 0.753203] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/lcd-controller@1c0c000
[ 0.753216] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/lcd-controller@1c0c000
[ 0.753228] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/lcd-controller@1c0c000
[ 0.753241] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/lcd-controller@1c0c000
[ 0.758963] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pc not found, using
dummy regulator
[ 0.769292] mdio_bus fixed-0: GPIO lookup for consumer reset
[ 0.769307] mdio_bus fixed-0: using lookup tables for GPIO lookup
[ 0.769315] mdio_bus fixed-0: No GPIO consumer reset found
[ 0.769347] libphy: Fixed MDIO Bus: probed
[ 0.773814] CAN device driver interface
[ 0.778395] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pa not found, using
dummy regulator
[ 0.786883] sun7i-dwmac 1c50000.ethernet: IRQ eth_wake_irq not found
[ 0.793238] sun7i-dwmac 1c50000.ethernet: IRQ eth_lpi not found
[ 0.799335] sun7i-dwmac 1c50000.ethernet: PTP uses main clock
[ 0.805084] sun7i-dwmac 1c50000.ethernet: no reset control found
[ 0.811151] sun7i-dwmac 1c50000.ethernet: no regulator found
[ 0.817275] sun7i-dwmac 1c50000.ethernet: Version ID not available
[ 0.823469] sun7i-dwmac 1c50000.ethernet: DWMAC1000
[ 0.828495] sun7i-dwmac 1c50000.ethernet: DMA HW capability register
supported
[ 0.835712] sun7i-dwmac 1c50000.ethernet: Normal descriptors
[ 0.841405] sun7i-dwmac 1c50000.ethernet: Ring mode enabled
[ 0.847548] mdio_bus stmmac-0: GPIO lookup for consumer reset
[ 0.847557] mdio_bus stmmac-0: using device tree for GPIO lookup
[ 0.847585] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of
node '/soc/ethernet@1c50000/mdio[0]'
[ 0.847603] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of
node '/soc/ethernet@1c50000/mdio[0]'
[ 0.847619] mdio_bus stmmac-0: using lookup tables for GPIO lookup
[ 0.847628] mdio_bus stmmac-0: No GPIO consumer reset found
[ 0.847637] sun7i-dwmac 1c50000.ethernet: GPIO lookup for consumer snps,reset
[ 0.847643] sun7i-dwmac 1c50000.ethernet: using device tree for GPIO lookup
[ 0.847662] of_get_named_gpiod_flags: can't parse 'snps,reset-gpios'
property of node '/soc/ethernet@1c50000[0]'
[ 0.847679] of_get_named_gpiod_flags: can't parse 'snps,reset-gpio' property
of node '/soc/ethernet@1c50000[0]'
[ 0.847688] sun7i-dwmac 1c50000.ethernet: using lookup tables for GPIO lookup
[ 0.847695] sun7i-dwmac 1c50000.ethernet: No GPIO consumer snps,reset found
[ 0.847707] libphy: stmmac: probed
[ 0.852045] mdio_bus stmmac-0:01: GPIO lookup for consumer reset
[ 0.852055] mdio_bus stmmac-0:01: using device tree for GPIO lookup
[ 0.852091] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of
node '/soc/ethernet@1c50000/mdio/ethernet-phy@1[0]'
[ 0.852112] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of
node '/soc/ethernet@1c50000/mdio/ethernet-phy@1[0]'
[ 0.852121] mdio_bus stmmac-0:01: using lookup tables for GPIO lookup
[ 0.852129] mdio_bus stmmac-0:01: No GPIO consumer reset found
[ 0.853802] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 0.860382] ehci-platform: EHCI generic platform driver
[ 0.866228] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 0.872438] ohci-platform: OHCI generic platform driver
[ 0.880313] sunxi-rtc 1c20d00.rtc: registered as rtc0
[ 0.885418] sunxi-rtc 1c20d00.rtc: setting system clock to
2020-07-09T16:31:05 UTC (1594312265)
[ 0.894346] i2c /dev entries driver
[ 0.899170] axp20x-i2c 0-0034: AXP20x variant AXP209 found
[ 0.912123] input: axp20x-pek as
/devices/platform/soc/1c2ac00.i2c/i2c-0/0-0034/axp20x-pek/input/input0
[ 0.931108] ldo1: supplied by regulator-dummy
[ 0.935826] ldo2: supplied by regulator-dummy
[ 0.941442] ldo3: supplied by regulator-dummy
[ 0.946524] ldo4: supplied by regulator-dummy
[ 0.951098] ldo5: supplied by regulator-dummy
[ 0.956203] dcdc2: supplied by regulator-dummy
[ 0.961349] dcdc3: supplied by regulator-dummy
[ 0.968168] axp20x-i2c 0-0034: AXP20X driver loaded
[ 0.974858] Goodix-TS 2-005d: supply AVDD28 not found, using dummy regulator
[ 0.982103] Goodix-TS 2-005d: supply VDDIO not found, using dummy regulator
[ 0.989164] Goodix-TS 2-005d: GPIO lookup for consumer irq
[ 0.989172] Goodix-TS 2-005d: using device tree for GPIO lookup
[ 0.989219] of_get_named_gpiod_flags: parsed 'irq-gpios' property of node
'/soc/i2c@1c2b400/touchscreen@5d[0]' - status (0)
[ 0.989269] gpio gpiochip0: Persistence not supported for GPIO 236
[ 0.989292] Goodix-TS 2-005d: GPIO lookup for consumer reset
[ 0.989298] Goodix-TS 2-005d: using device tree for GPIO lookup
[ 0.989326] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node
'/soc/i2c@1c2b400/touchscreen@5d[0]' - status (0)
[ 0.989345] gpio gpiochip0: Persistence not supported for GPIO 235
[ 1.107412] Goodix-TS 2-005d: ID 911, version: 1060
[ 1.113320] axp20x-usb-power-supply axp20x-usb-power-supply: DMA mask not set
[ 1.120781] Goodix-TS 2-005d: Direct firmware load for goodix_911_cfg.bin
failed with error -2
[ 1.129998] random: fast init done
[ 1.133822] axp20x-battery-power-supply axp20x-battery-power-supply: DMA
mask not set
[ 1.142030] axp20x-ac-power-supply axp20x-ac-power-supply: DMA mask not set
[ 1.150024] sunxi-wdt 1c20c90.watchdog: Watchdog enabled (timeout=16 sec,
nowayout=0)
[ 1.161243] pwrseq_emmc pwrseq: GPIO lookup for consumer reset
[ 1.161256] pwrseq_emmc pwrseq: using device tree for GPIO lookup
[ 1.161306] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node
'/pwrseq[0]' - status (0)
[ 1.161356] gpio gpiochip0: Persistence not supported for GPIO 80
[ 1.161978] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pf not found, using
dummy regulator
[ 1.171583] sunxi-mmc 1c0f000.mmc: GPIO lookup for consumer cd
[ 1.171595] sunxi-mmc 1c0f000.mmc: using device tree for GPIO lookup
[ 1.171654] of_get_named_gpiod_flags: parsed 'cd-gpios' property of node
'/soc/mmc@1c0f000[0]' - status (0)
[ 1.171735] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pe not found, using
dummy regulator
[ 1.180173] gpio gpiochip0: Persistence not supported for GPIO 133
[ 1.180217] sunxi-mmc 1c0f000.mmc: Got CD GPIO
[ 1.184668] sunxi-mmc 1c0f000.mmc: GPIO lookup for consumer wp
[ 1.184674] sunxi-mmc 1c0f000.mmc: using device tree for GPIO lookup
[ 1.184701] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of
node '/soc/mmc@1c0f000[0]'
[ 1.184718] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node
'/soc/mmc@1c0f000[0]'
[ 1.184729] sunxi-mmc 1c0f000.mmc: using lookup tables for GPIO lookup
[ 1.184738] sunxi-mmc 1c0f000.mmc: No GPIO consumer wp found
[ 1.194138] input: Goodix Capacitive TouchScreen as
/devices/platform/soc/1c2b400.i2c/i2c-2/2-005d/input/input1
[ 1.215974] sunxi-mmc 1c0f000.mmc: initialized, max. request size: 16384 KB
[ 1.224358] sunxi-mmc 1c11000.mmc: GPIO lookup for consumer wp
[ 1.224371] sunxi-mmc 1c11000.mmc: using device tree for GPIO lookup
[ 1.224412] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of
node '/soc/mmc@1c11000[0]'
[ 1.224430] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node
'/soc/mmc@1c11000[0]'
[ 1.224441] sunxi-mmc 1c11000.mmc: using lookup tables for GPIO lookup
[ 1.224450] sunxi-mmc 1c11000.mmc: No GPIO consumer wp found
[ 1.224486] sunxi-mmc 1c11000.mmc: allocated mmc-pwrseq
[ 1.255223] sunxi-mmc 1c11000.mmc: initialized, max. request size: 16384 KB
[ 1.263189] sun4i-ss 1c15000.crypto-engine: Die ID 0
[ 1.270864] usbcore: registered new interface driver usbhid
[ 1.276526] usbhid: USB HID core driver
[ 1.280688] axp20x-adc axp20x-adc: DMA mask not set
[ 1.288385] eeprom-sunxi-sid 1c23800.eeprom: GPIO lookup for consumer wp
[ 1.288397] eeprom-sunxi-sid 1c23800.eeprom: using device tree for GPIO
lookup
[ 1.288425] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of
node '/soc/eeprom@1c23800[0]'
[ 1.288441] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node
'/soc/eeprom@1c23800[0]'
[ 1.288454] eeprom-sunxi-sid 1c23800.eeprom: using lookup tables for GPIO
lookup
[ 1.288465] eeprom-sunxi-sid 1c23800.eeprom: No GPIO consumer wp found
[ 1.290091] sun4i-codec 1c22c00.codec: GPIO lookup for consumer allwinner,pa
[ 1.290105] sun4i-codec 1c22c00.codec: using device tree for GPIO lookup
[ 1.290137] of_get_named_gpiod_flags: can't parse 'allwinner,pa-gpios'
property of node '/soc/codec@1c22c00[0]'
[ 1.290154] of_get_named_gpiod_flags: can't parse 'allwinner,pa-gpio'
property of node '/soc/codec@1c22c00[0]'
[ 1.290166] sun4i-codec 1c22c00.codec: using lookup tables for GPIO lookup
[ 1.290173] sun4i-codec 1c22c00.codec: No GPIO consumer allwinner,pa found
[ 1.290570] debugfs: Directory '1c22c00.codec' with parent 'sun4i-codec'
already present!
[ 1.300688] sun4i-codec 1c22c00.codec: Codec <-> 1c22c00.codec mapping ok
[ 1.309459] NET: Registered protocol family 17
[ 1.313938] can: controller area network core (rev 20170425 abi 9)
[ 1.320330] NET: Registered protocol family 29
[ 1.324779] can: raw protocol (rev 20170425)
[ 1.329094] can: broadcast manager protocol (rev 20170425 t)
[ 1.334769] can: netlink gateway (rev 20190810) max_hops=1
[ 1.340519] Key type dns_resolver registered
[ 1.344954] Registering SWP/SWPB emulation handler
[ 1.363960] reg-fixed-voltage ahci-5v: GPIO lookup for consumer (null)
[ 1.363976] reg-fixed-voltage ahci-5v: using device tree for GPIO lookup
[ 1.364023] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/ahci-5v[0]'
[ 1.364058] of_get_named_gpiod_flags: parsed 'gpio' property of node
'/ahci-5v[0]' - status (0)
[ 1.364105] gpio gpiochip0: Persistence not supported for GPIO 40
[ 1.364711] reg-fixed-voltage usb0-vbus: GPIO lookup for consumer (null)
[ 1.364721] reg-fixed-voltage usb0-vbus: using device tree for GPIO lookup
[ 1.364742] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/usb0-vbus[0]'
[ 1.364768] of_get_named_gpiod_flags: parsed 'gpio' property of node
'/usb0-vbus[0]' - status (0)
[ 1.364791] gpio gpiochip0: Persistence not supported for GPIO 41
[ 1.365090] reg-fixed-voltage usb1-vbus: GPIO lookup for consumer (null)
[ 1.365098] reg-fixed-voltage usb1-vbus: using device tree for GPIO lookup
[ 1.365140] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/usb1-vbus[0]'
[ 1.365164] of_get_named_gpiod_flags: parsed 'gpio' property of node
'/usb1-vbus[0]' - status (0)
[ 1.365186] gpio gpiochip0: Persistence not supported for GPIO 42
[ 1.365531] reg-fixed-voltage lcdctrl5v0: GPIO lookup for consumer (null)
[ 1.365540] reg-fixed-voltage lcdctrl5v0: using device tree for GPIO lookup
[ 1.365559] of_get_named_gpiod_flags: can't parse 'gpios' property of node
'/lcdctrl5v0[0]'
[ 1.365584] of_get_named_gpiod_flags: parsed 'gpio' property of node
'/lcdctrl5v0[0]' - status (0)
[ 1.365620] gpio gpiochip0: Persistence not supported for GPIO 233
[ 1.366157] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 1.366168] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.366208] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 1.366248] gpio gpiochip0: Persistence not supported for GPIO 228
[ 1.366270] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 1.366276] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.366303] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 1.366320] gpio gpiochip0: Persistence not supported for GPIO 131
[ 1.367001] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 1.376933] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pd not found, using
dummy regulator
[ 1.386485] panel-lvds panel@1c16500: GPIO lookup for consumer enable
[ 1.386498] panel-lvds panel@1c16500: using device tree for GPIO lookup
[ 1.386548] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node
'/panel@1c16500[0]' - status (0)
[ 1.386593] gpio gpiochip0: Persistence not supported for GPIO 130
[ 1.386621] panel-lvds panel@1c16500: GPIO lookup for consumer reset
[ 1.386627] panel-lvds panel@1c16500: using device tree for GPIO lookup
[ 1.386651] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node
'/panel@1c16500[0]' - status (0)
[ 1.386674] gpio gpiochip0: Persistence not supported for GPIO 241
[ 1.416579] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 1.416595] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.416641] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 1.416691] gpio gpiochip0: Persistence not supported for GPIO 228
[ 1.416720] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 1.416726] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.416753] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 1.416771] gpio gpiochip0: Persistence not supported for GPIO 131
[ 1.417487] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 1.427503] sun4i-pinctrl 1c20800.pinctrl: supply vcc-pd not found, using
dummy regulator
[ 1.436070] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0c000
[ 1.436087] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/lcd-controller@1c0c000
[ 1.436102] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/lcd-controller@1c0c000
[ 1.436115] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/lcd-controller@1c0c000
[ 1.436128] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/lcd-controller@1c0c000
[ 1.436140] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0c000
with /soc/lcd-controller@1c0c000
[ 1.436152] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0d000
[ 1.436164] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0c000
[ 1.436176] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/lcd-controller@1c0c000
[ 1.436188] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/lcd-controller@1c0c000
[ 1.436200] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/lcd-controller@1c0c000
[ 1.436212] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/lcd-controller@1c0c000
[ 1.436223] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0c000
with /soc/lcd-controller@1c0c000
[ 1.436235] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0d000
[ 1.436247] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0c000
[ 1.436259] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/lcd-controller@1c0c000
[ 1.436271] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/lcd-controller@1c0c000
[ 1.436282] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/lcd-controller@1c0c000
[ 1.436294] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/lcd-controller@1c0c000
[ 1.436306] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0c000
with /soc/lcd-controller@1c0c000
[ 1.436318] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0d000
[ 1.436330] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0c000
[ 1.436342] [drm:compare_of] Comparing of node /soc/display-backend@1e40000
with /soc/lcd-controller@1c0c000
[ 1.436353] [drm:compare_of] Comparing of node /soc/display-backend@1e60000
with /soc/lcd-controller@1c0c000
[ 1.436365] [drm:compare_of] Comparing of node /soc/display-frontend@1e00000
with /soc/lcd-controller@1c0c000
[ 1.436377] [drm:compare_of] Comparing of node /soc/display-frontend@1e20000
with /soc/lcd-controller@1c0c000
[ 1.436389] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0c000
with /soc/lcd-controller@1c0c000
[ 1.436401] [drm:compare_of] Comparing of node /soc/lcd-controller@1c0d000
with /soc/lcd-controller@1c0d000
[ 1.436850] sun4i-drm display-engine: bound 1e00000.display-frontend (ops
0xc084ee68)
[ 1.444775] sun4i-drm display-engine: bound 1e20000.display-frontend (ops
0xc084ee68)
[ 1.453110] sun4i-drm display-engine: bound 1e60000.display-backend (ops
0xc084e6a8)
[ 1.461241] sun4i-drm display-engine: bound 1e40000.display-backend (ops
0xc084e6a8)
[ 1.469677] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops
0xc084d208)
[ 1.477958] sun4i-drm display-engine: No panel or bridge found... RGB output
disabled
[ 1.485796] sun4i-drm display-engine: bound 1c0d000.lcd-controller (ops
0xc084d208)
[ 1.493481] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 1.500113] checking generic (5fda8000 258000) vs hw (0 ffffffff)
[ 1.500121] fb0: switching to sun4i-drm-fb from simple
[ 1.506407] Console: switching to colour dummy device 80x30
[ 1.512257] [drm:drm_minor_register]
[ 1.512265] [drm:drm_minor_register]
[ 1.513070] [drm:drm_minor_register] new minor registered 0
[ 1.513227] [drm:drm_sysfs_connector_add] adding "LVDS-1" to sysfs
[ 1.513262] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 1.513287] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on
minor 0
[ 1.521153] [drm:drm_mode_object_get] OBJ ID: 49 (2)
[ 1.521286] [drm:drm_mode_object_get] OBJ ID: 49 (2)
[ 1.521299] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (3)
[ 1.521628] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 1.524632] [drm:drm_mode_object_put.part.0] OBJ ID: 67 (2)
[ 1.525446] [drm:drm_mode_object_get] OBJ ID: 67 (1)
[ 1.525470] [drm:drm_mode_object_get] OBJ ID: 49 (2)
[ 1.525478] [drm:drm_mode_object_get] OBJ ID: 49 (3)
[ 1.525545] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.525559] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.525566] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.525578] [drm:sun4i_backend_atomic_check] Plane FB format is XR24
little-endian (0x34325258)
[ 1.525584] [drm:sun4i_backend_atomic_check] Plane zpos is 0
[ 1.525594] [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0
alpha, 0 video, 0 YUV
[ 1.525599] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.525650] [drm:drm_calc_timestamping_constants] crtc 47: hwmode: htotal
1346, vtotal 637, vdisplay 600
[ 1.525659] [drm:drm_calc_timestamping_constants] crtc 47: clock 51000 kHz
framedur 16811803 linedur 26392
[ 1.525669] [drm:sun4i_tcon_mode_set] [DEBUG]: sun4i_tcon_mode_set ->
encoder->encoder_type -> 3
[ 1.525818] [drm:sun4i_tcon_get_clk_delay] TCON 0 clock delay 30
[ 1.525826] [drm:sun4i_tcon_mode_set] Setting horizontal total 1346,
backporch 321
[ 1.525833] [drm:sun4i_tcon_mode_set] Setting vertical total 637, backporch
36
[ 1.525839] [drm:sun4i_tcon_get_pixel_depth] [DEBUG]:
sun4i_tcon_get_pixel_depth
[ 1.525845] [drm:sun4i_tcon_get_pixel_depth] [DEBUG]: FMT[24] ->
MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
[ 1.525857] [drm:sun4i_crtc_atomic_enable] Enabling the CRTC
[ 1.525866] [drm:sun4i_tcon_set_status] (efault): encoder_type: 581145735
[ 1.525988] [drm:sun4i_lvds_encoder_enable] Enabling LVDS output
[ 1.526020] [drm:sun4i_crtc_enable_vblank] Enabling VBLANK on crtc (ptrval)
[ 1.526026] [drm:sun4i_tcon_enable_vblank] Enabling VBLANK interrupt
[ 1.526034] [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[ 1.526058] [drm:sun4i_backend_update_layer_formats] Switching display
backend interlaced mode off
[ 1.526068] [drm:sun4i_backend_update_layer_buffer] Layer line width: 32768
bits
[ 1.526079] [drm:sun4i_backend_update_layer_buffer] Setting buffer address
to 0x0a200000
[ 1.526085] [drm:sun4i_backend_update_layer_buffer] Setting address lower
bits to 0x51000000
[ 1.526092] [drm:sun4i_backend_update_layer_buffer] Setting address high
bits to 0x0
[ 1.526099] [drm:sun4i_backend_update_layer_coord] Updating layer 0
[ 1.526106] [drm:sun4i_backend_update_layer_coord] Primary layer, updating
global size W: 1024 H: 600
[ 1.526112] [drm:sun4i_backend_update_layer_coord] Layer size W: 1024 H: 600
[ 1.526119] [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
[ 1.526127] [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority
to 0 and pipe 0
[ 1.526134] [drm:sun4i_backend_layer_enable] Enabling layer 0
[ 1.526142] [drm:sun4i_crtc_atomic_flush] Committing plane changes
[ 1.526148] [drm:sun4i_backend_commit] Committing changes
[ 1.542853] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (4)
[ 1.543007] [drm:drm_mode_object_get] OBJ ID: 67 (2)
[ 1.543021] [drm:drm_mode_object_get] OBJ ID: 68 (1)
[ 1.543050] [drm:drm_mode_object_get] OBJ ID: 67 (3)
[ 1.543057] [drm:drm_mode_object_put.part.0] OBJ ID: 67 (4)
[ 1.543074] [drm:drm_mode_object_get] OBJ ID: 49 (4)
[ 1.543081] [drm:drm_mode_object_get] OBJ ID: 49 (5)
[ 1.543089] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (5)
[ 1.543097] [drm:drm_mode_object_get] OBJ ID: 49 (4)
[ 1.543143] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.543156] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.543164] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.543176] [drm:sun4i_backend_atomic_check] Plane FB format is XR24
little-endian (0x34325258)
[ 1.543182] [drm:sun4i_backend_atomic_check] Plane zpos is 0
[ 1.543191] [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0
alpha, 0 video, 0 YUV
[ 1.543197] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.543243] [drm:drm_calc_timestamping_constants] crtc 47: hwmode: htotal
1346, vtotal 637, vdisplay 600
[ 1.543251] [drm:drm_calc_timestamping_constants] crtc 47: clock 51000 kHz
framedur 16811803 linedur 26392
[ 1.543275] [drm:sun4i_backend_update_layer_formats] Switching display
backend interlaced mode off
[ 1.543284] [drm:sun4i_backend_update_layer_buffer] Layer line width: 32768
bits
[ 1.543295] [drm:sun4i_backend_update_layer_buffer] Setting buffer address
to 0x0a200000
[ 1.543302] [drm:sun4i_backend_update_layer_buffer] Setting address lower
bits to 0x51000000
[ 1.543308] [drm:sun4i_backend_update_layer_buffer] Setting address high
bits to 0x0
[ 1.543315] [drm:sun4i_backend_update_layer_coord] Updating layer 0
[ 1.543322] [drm:sun4i_backend_update_layer_coord] Primary layer, updating
global size W: 1024 H: 600
[ 1.543328] [drm:sun4i_backend_update_layer_coord] Layer size W: 1024 H: 600
[ 1.543335] [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
[ 1.543342] [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority
to 0 and pipe 0
[ 1.543348] [drm:sun4i_backend_layer_enable] Enabling layer 0
[ 1.543356] [drm:sun4i_crtc_atomic_flush] Committing plane changes
[ 1.543361] [drm:sun4i_backend_commit] Committing changes
[ 1.559641] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (5)
[ 1.559650] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (4)
[ 1.559658] [drm:drm_mode_object_put.part.0] OBJ ID: 68 (2)
[ 1.559670] [drm:drm_mode_object_put.part.0] OBJ ID: 67 (3)
[ 1.567874] Console: switching to colour frame buffer device 128x37
[ 1.567922] [drm:drm_mode_object_get] OBJ ID: 67 (2)
[ 1.567932] [drm:drm_mode_object_get] OBJ ID: 68 (1)
[ 1.567960] [drm:drm_mode_object_get] OBJ ID: 67 (3)
[ 1.567967] [drm:drm_mode_object_put.part.0] OBJ ID: 67 (4)
[ 1.567981] [drm:drm_mode_object_get] OBJ ID: 49 (4)
[ 1.567987] [drm:drm_mode_object_get] OBJ ID: 49 (5)
[ 1.567995] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (5)
[ 1.568003] [drm:drm_mode_object_get] OBJ ID: 49 (4)
[ 1.568039] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.568051] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.568058] [drm:sun4i_backend_plane_uses_scaler] Input size 1024x600,
output size 1024x600
[ 1.568069] [drm:sun4i_backend_atomic_check] Plane FB format is XR24
little-endian (0x34325258)
[ 1.568075] [drm:sun4i_backend_atomic_check] Plane zpos is 0
[ 1.568083] [drm:sun4i_backend_atomic_check] State valid with 1 planes, 0
alpha, 0 video, 0 YUV
[ 1.568089] [drm:sun4i_backend_atomic_check] Starting checking our planes
[ 1.568128] [drm:drm_calc_timestamping_constants] crtc 47: hwmode: htotal
1346, vtotal 637, vdisplay 600
[ 1.568136] [drm:drm_calc_timestamping_constants] crtc 47: clock 51000 kHz
framedur 16811803 linedur 26392
[ 1.568156] [drm:sun4i_backend_update_layer_formats] Switching display
backend interlaced mode off
[ 1.568165] [drm:sun4i_backend_update_layer_buffer] Layer line width: 32768
bits
[ 1.568175] [drm:sun4i_backend_update_layer_buffer] Setting buffer address
to 0x0a200000
[ 1.568181] [drm:sun4i_backend_update_layer_buffer] Setting address lower
bits to 0x51000000
[ 1.568188] [drm:sun4i_backend_update_layer_buffer] Setting address high
bits to 0x0
[ 1.568195] [drm:sun4i_backend_update_layer_coord] Updating layer 0
[ 1.568201] [drm:sun4i_backend_update_layer_coord] Primary layer, updating
global size W: 1024 H: 600
[ 1.568208] [drm:sun4i_backend_update_layer_coord] Layer size W: 1024 H: 600
[ 1.568215] [drm:sun4i_backend_update_layer_coord] Layer coordinates X: 0 Y: 0
[ 1.568222] [drm:sun4i_backend_update_layer_zpos] Setting layer 0's priority
to 0 and pipe 0
[ 1.568230] [drm:sun4i_backend_layer_enable] Enabling layer 0
[ 1.568236] [drm:sun4i_crtc_atomic_flush] Committing plane changes
[ 1.568241] [drm:sun4i_backend_commit] Committing changes
[ 1.568343] mmc1: new DDR MMC card at address 0001
[ 1.569566] mmcblk1: mmc1:0001 P1XXXX 3.60 GiB
[ 1.570179] mmcblk1boot0: mmc1:0001 P1XXXX partition 1 16.0 MiB
[ 1.570788] mmcblk1boot1: mmc1:0001 P1XXXX partition 2 16.0 MiB
[ 1.575495] mmcblk1: p1 p2 p3 p4 < p5 p6 p7 p8 >
[ 1.576640] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (5)
[ 1.576652] [drm:drm_mode_object_put.part.0] OBJ ID: 49 (4)
[ 1.576662] [drm:drm_mode_object_put.part.0] OBJ ID: 68 (2)
[ 1.576674] [drm:drm_mode_object_put.part.0] OBJ ID: 67 (3)
[ 1.617966] sun4i-drm display-engine: fb0: sun4i-drmdrmfb frame buffer device
[ 1.628424] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 1.628437] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.628484] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 1.628533] gpio gpiochip0: Persistence not supported for GPIO 228
[ 1.628563] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 1.628569] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.628595] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 1.628612] gpio gpiochip0: Persistence not supported for GPIO 131
[ 1.629379] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 1.641640] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 1.641654] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.641701] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 1.641749] gpio gpiochip0: Persistence not supported for GPIO 228
[ 1.641777] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 1.641783] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.641808] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 1.641827] gpio gpiochip0: Persistence not supported for GPIO 131
[ 1.642547] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 1.652448] ALSA device list:
[ 1.655434] #0: sun4i-codec
[ 1.667191] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 1.667205] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.667255] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 1.667306] gpio gpiochip0: Persistence not supported for GPIO 228
[ 1.667333] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 1.667340] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 1.667365] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 1.667382] gpio gpiochip0: Persistence not supported for GPIO 131
[ 1.668118] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 1.853479] EXT4-fs (mmcblk1p5): recovery complete
[ 1.859148] EXT4-fs (mmcblk1p5): mounted filesystem with ordered data mode.
Opts: (null)
[ 1.867378] VFS: Mounted root (ext4 filesystem) on device 179:5.
[ 1.874118] devtmpfs: mounted
[ 1.878507] Freeing unused kernel memory: 1024K
[ 1.883223] Run /sbin/init as init process
[ 1.887353] with arguments:
[ 1.887356] /sbin/init
[ 1.887359] with environment:
[ 1.887363] HOME=/
[ 1.887365] TERM=linux
[ 1.887368] selinux=0
[ 5.941941] EXT4-fs (mmcblk1p5): re-mounted. Opts: (null)
[ 6.615974] [drm:vblank_disable_fn] disabling vblank on crtc 0
[ 6.616028] [drm:sun4i_crtc_disable_vblank] Disabling VBLANK on crtc (ptrval)
[ 6.616039] [drm:sun4i_tcon_enable_vblank] Disabling VBLANK interrupt
[ 7.125064] videobuf2_common: Unknown symbol media_request_object_init (err
-2)
[ 7.132529] videobuf2_common: Unknown symbol media_request_object_unbind
(err -2)
[ 7.140115] videobuf2_common: Unknown symbol media_request_object_put (err
-2)
[ 7.147364] videobuf2_common: Unknown symbol v4l_vb2q_enable_media_source
(err -2)
[ 7.154925] videobuf2_common: Unknown symbol media_request_put (err -2)
[ 7.161564] videobuf2_common: Unknown symbol media_request_object_bind (err
-2)
[ 7.398536] EXT4-fs (mmcblk1p7): mounted filesystem with ordered data mode.
Opts: (null)
[ 7.425817] EXT4-fs (mmcblk1p8): recovery complete
[ 7.431469] EXT4-fs (mmcblk1p8): mounted filesystem with ordered data mode.
Opts: (null)
[ 8.506728] random: dd: uninitialized urandom read (512 bytes read)
[ 8.986093] sun7i-dwmac 1c50000.ethernet eth0: PHY [stmmac-0:01] driver
[Generic PHY] (irq=POLL)
[ 8.986286] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_id_det
[ 8.994889] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 8.994949] of_get_named_gpiod_flags: parsed 'usb0_id_det-gpios' property of
node '/soc/phy@1c13400[0]' - status (0)
[ 8.995016] gpio gpiochip0: Persistence not supported for GPIO 228
[ 8.995049] sun4i-usb-phy 1c13400.phy: GPIO lookup for consumer usb0_vbus_det
[ 8.995055] sun4i-usb-phy 1c13400.phy: using device tree for GPIO lookup
[ 8.995088] of_get_named_gpiod_flags: parsed 'usb0_vbus_det-gpios' property
of node '/soc/phy@1c13400[0]' - status (0)
[ 8.995109] gpio gpiochip0: Persistence not supported for GPIO 131
[ 8.996032] sun4i-usb-phy 1c13400.phy: Couldn't get regulator usb2_vbus...
Deferring probe
[ 9.006878] sun7i-dwmac 1c50000.ethernet eth0: No Safety Features support
found
[ 9.014201] sun7i-dwmac 1c50000.ethernet eth0: RX IPC Checksum Offload
disabled
[ 9.021554] sun7i-dwmac 1c50000.ethernet eth0: No MAC Management Counters
available
[ 9.029221] sun7i-dwmac 1c50000.ethernet eth0: PTP not supported by HW
[ 9.035753] sun7i-dwmac 1c50000.ethernet eth0: configuring for phy/mii link
mode
[ 11.096332] sun7i-dwmac 1c50000.ethernet eth0: Link is Up - 100Mbps/Full -
flow control rx/tx
[ 19.877401] random: syslog-ng: uninitialized urandom read (32 bytes read)
[ 20.484392] random: dbus-daemon: uninitialized urandom read (12 bytes read)
[ 20.500542] random: dbus-daemon: uninitialized urandom read (12 bytes read)
[ 21.178252] random: sshd: uninitialized urandom read (32 bytes read)
[ 31.895944] vcc3v0: disabling
[ 31.898937] vcc5v0: disabling
[ 31.901914] ldo3: disabling
[ 31.905051] ldo4: disabling
[ 31.908248] ahci-5v: disabling
[ 31.911321] usb0-vbus: disabling
[ 31.914549] usb1-vbus: disabling
[ 46.460808] random: sshd: uninitialized urandom read (32 bytes read)
[ 52.392230] random: crng init done
[ 152.206990] gpio gpiochip0: Persistence not supported for GPIO 132
root@awsom:~#
