Hi Mahmut,
On 10/25/22 07:53, Mahmut Dikçizgi wrote:
> I have noticed in sun8i-a23-a33.dtsi nand controller is only initialized
> with CS0 & RB0 pins, so DTB needs to report the kernel which pins to
> utilize to select chip1.
>
> sun8i-a23-a33.dtsi:
> nfc: nand-controller@1c03000 {
> .
> pinctrl-0 = <&nand_pins *&nand_cs0_pin &nand_rb0_pin*>;
> .
> };
> Knowing that /master/drivers/mtd/nand/raw/sunxi_nand.c only uses <reg>
> index to Chip select, and <allwinner,rb> index to detect busy, how can i
> tell kernel to use PC3 to CS1 & PC7 to RB1?
Since you are using the hardware CS and RB functions (not bit-banging),
those are the only possible choice of pins. All you need to do is select
function number 2 for these pins in the pinctrl.
> Since i am a DTS noob, i tried following in my board dts to override the
> dts and miserably failed:
>
> pinctrl-names = "chip0pins", "chip1pins";
> pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
> pinctrl-1 = <&nand_pins &nand_cs1_pin &nand_rb1_pin>;
> both chips not detected
>
> pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin &nand_pins
> &nand_cs1_pin &nand_rb1_pin>;
> both chips not detected
The "default" pinctrl name is actually important. Only the pinctrl-<n>
entry with that name is applied during boot. So you need:
pinctrl-names = "default";
pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin
&nand_cs1_pin &nand_rb1_pin>;
Where nand_cs1_pin and nand_rb1_pin reference PC3 and PC7 and the
"nand0" function.
Regards,
Samuel
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