On Tue, 24 Dec 2024 12:50:48 -0800 (PST)
Sergey Goncharov <[email protected]> wrote:

Hi,

> Hi, guys. Is enyone interested in participating in adding support for 
> f1c800 in u-boot? I have Melis SDK, current status is: disassembled using 
> IDA boot0, reversed all uart-clock-dram-related stuff, u-boot starts, 
> spawns messages to console, but seems i made a mistake somewhere or most 
> likely can't find usual AW init magic, because after my dram_init every 
> register related to clock/dram mimics those after init using original 
> boot0, but dram anyway fails to read and fails at 10-th write, so 
> dram_size_detect can't be passed. Original boot0.bin 100% ok, burned it to 
> sd-card, device detects dram, passes all tests and fails at part where it 
> wants boot1, i have it as a separate bin but can't use because boot0 want 
> it on flash instead of sd-card, my custom board have only sd-card. If 
> someone interested in such project, mail me, i'll upload somewhere my 
> u-boot sources. 

Do you know how different the F1C800 is from the F1C100/200? We support
the latter in mainline U-Boot, including DRAM init.
As for "anyone interested in participating in adding support": there
seems to be little interest in the ARMv5 Allwinner SoCs lately,
especially when it comes to mainlining something. There was some
momentum like 2 or 3 years ago, but it pretty much dried up since. Are
there any notable devices using this chip?

As for using the vendor boot0: Try to just have boot0 on an SD
card, and nothing else. If boot0 cannot find boot1 anywhere, I have
seen some versions entering FEL mode (after DRAM init), so you could
then upload U-Boot proper or a kernel, and use it from there.
Otherwise you might be able to hack boot0 to enter FEL mode by
branching to 0xffff0020, at some time after it has initialised the DRAM.
This worked for me on some chips.

Otherwise debugging the DRAM init routines is not easy (as you probably
already know), and I am afraid there are not many people out there
being able to help you.

Cheers,
Andre

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