Hi Shawn,

kernel test robot noticed the following build errors:

[auto build test ERROR on pci/next]
[also build test ERROR on next-20260109]
[cannot apply to pci/for-linus trace/for-next mani-mhi/mhi-next linus/master 
v6.19-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    
https://github.com/intel-lab-lkp/linux/commits/Shawn-Lin/PCI-trace-Add-PCI-controller-LTSSM-transition-tracepoint/20260112-100141
base:   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next
patch link:    
https://lore.kernel.org/r/1768180800-63364-4-git-send-email-shawn.lin%40rock-chips.com
patch subject: [PATCH v3 3/3] PCI: dw-rockchip: Add pcie_ltssm_state_transition 
trace support
config: arm64-randconfig-004-20260112 
(https://download.01.org/0day-ci/archive/20260112/[email protected]/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 
3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/20260112/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: 
https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

>> drivers/pci/controller/dwc/pcie-dw-rockchip.c:264:6: error: call to 
>> undeclared function 'dw_pcie_ltssm_status_string'; ISO C99 and later do not 
>> support implicit function declarations [-Wimplicit-function-declaration]
     264 |                                         
dw_pcie_ltssm_status_string(state),
         |                                         ^
>> drivers/pci/controller/dwc/pcie-dw-rockchip.c:264:6: error: incompatible 
>> integer to pointer conversion passing 'int' to parameter of type 'const char 
>> *' [-Wint-conversion]
     264 |                                         
dw_pcie_ltssm_status_string(state),
         |                                         
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/trace/events/pci_controller.h:20:45: note: passing argument to 
parameter 'state' here
      20 |         TP_PROTO(const char *dev_name, const char *state, u32 rate),
         |                                                    ^
   2 errors generated.


vim +/dw_pcie_ltssm_status_string +264 
drivers/pci/controller/dwc/pcie-dw-rockchip.c

   225  
   226  #ifdef CONFIG_TRACING
   227  static void rockchip_pcie_ltssm_trace_work(struct work_struct *work)
   228  {
   229          struct rockchip_pcie *rockchip = container_of(work, struct 
rockchip_pcie,
   230                                                  trace_work.work);
   231          struct dw_pcie *pci = &rockchip->pci;
   232          enum dw_pcie_ltssm state;
   233          u32 i, l1ss, prev_val = DW_PCIE_LTSSM_UNKNOWN, rate, val;
   234  
   235          for (i = 0; i < PCIE_DBG_LTSSM_HISTORY_CNT; i++) {
   236                  val = rockchip_pcie_readl_apb(rockchip, 
PCIE_CLIENT_DBG_FIFO_STATUS);
   237                  rate = FIELD_GET(PCIE_DBG_FIFO_RATE_MASK, val);
   238                  l1ss = FIELD_GET(PCIE_DBG_FIFO_L1SUB_MASK, val);
   239                  val = FIELD_GET(PCIE_LTSSM_STATUS_MASK, val);
   240  
   241                  /*
   242                   * Hardware Mechanism: The ring FIFO employs two 
tracking counters:
   243                   * - 'last-read-point': maintains the user's last read 
position
   244                   * - 'last-valid-point': tracks the hardware's last 
state update
   245                   *
   246                   * Software Handling: When two consecutive LTSSM states 
are identical,
   247                   * it indicates invalid subsequent data in the FIFO. In 
this case, we
   248                   * skip the remaining entries. The dual-counter design 
ensures that on
   249                   * the next state transition, reading can resume from 
the last user
   250                   * position.
   251                   */
   252                  if ((i > 0 && val == prev_val) || val > 
DW_PCIE_LTSSM_RCVRY_EQ3)
   253                          break;
   254  
   255                  state = prev_val = val;
   256                  if (val == DW_PCIE_LTSSM_L1_IDLE) {
   257                          if (l1ss == 2)
   258                                  state = DW_PCIE_LTSSM_L1_2;
   259                          else if (l1ss == 1)
   260                                  state = DW_PCIE_LTSSM_L1_1;
   261                  }
   262  
   263                  trace_pcie_ltssm_state_transition(dev_name(pci->dev),
 > 264                                          
 > dw_pcie_ltssm_status_string(state),
   265                                          ((rate + 1) > 
pci->max_link_speed) ?
   266                                          PCI_SPEED_UNKNOWN : 
PCIE_SPEED_2_5GT + rate);
   267          }
   268  
   269          schedule_delayed_work(&rockchip->trace_work, 
msecs_to_jiffies(5000));
   270  }
   271  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

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