Intel EHCI controller on 2.4.21-pre1. Thanks!
-- Richard
David Brownell wrote:
The EHCI 1.0 spec says (2.3.1) that bit clears itself when the reset is done, and the only constraint on it is that the STS_HALT bit must be set. Which is guaranteed by the call to ehci_halt() shortly before.That 250 is in microseconds, not milliseconds, so maybe this hardware is just slower to reset than the other EHCI hardware I've used. Try using "250 * 1000" instead ... your "2000" was just two milliseconds, which still isn't much.
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