I'm using Cypress bulkloop.hex firmware on an fx2lp (CY7C68013A) with simple 
host-side user-land code to transmit data to EP2 (out endpoint) and read the 
'echo' on EP6 (in endpoint). The very first time the code is run it writes, 
say, 60 bytes to EP2 and reads the echo (60 bytes) from EP6. When the host code 
is run again I get a timeout on EP6. Further digging shows that during the 
second time the program was run EP2 never actually received any data even 
though a URB trace shows it was successfully sent:

ehci_hcd 0000:00:1d.7: ehci_urb_done 3 urb efd87840 ep2out status 0 len 60/60

This can be 'fixed' by forcing an extra 1-byte bulk out packet to EP2 at the 
end of the code (before closing the handle). When the program is _then_ run the 
next time it sends 60 bytes and receives 60 bytes just fine (whatever happened 
to that extra 1-byte packet I don't know)

This can be reproduced in the following manner:

1) Upload Cypress' bulkloop.hex (or any other EP2->EP6 loopback firmware) to 
the FX2LP (or FX2) chip. (Not sure whether I can distribute it?)
2) Grab some libusb test code here: http://pythion.com/files/usb_loop_host.c

Run the code without sending the extra 1 byte packet:

----
toga usb_loop_host # dd if=/dev/zero bs=1 count=12 | ./usb_loop_host 0 1
12+0 records in
12+0 records out
12 bytes (12 B) copied, 5.0357e-05 s, 238 kB/s
TX 12 bytes
RX 12 bytes
toga usb_loop_host # dd if=/dev/zero bs=1 count=12 | ./usb_loop_host 0 1
12+0 records in
12+0 records out
12 bytes (12 B) copied, 5.0008e-05 s, 240 kB/s
TX 12 bytes
main:usb_bulk_read: failed
read rc:-110
No error
----

Run the code _and_ send the extra 1 byte packet:

----
toga usb_loop_host # dd if=/dev/zero bs=1 count=12 | ./usb_loop_host 1 1
12+0 records in
12+0 records out
12 bytes (12 B) copied, 4.8681e-05 s, 247 kB/s
TX 12 bytes
RX 12 bytes
TX 1 bytes
toga usb_loop_host # dd if=/dev/zero bs=1 count=12 | ./usb_loop_host 1 1
12+0 records in
12+0 records out
12 bytes (12 B) copied, 5.2941e-05 s, 227 kB/s
TX 12 bytes
RX 12 bytes
TX 1 bytes
----

To prove this is probably not the fx2lp misbehaving, Let's do two bulk_writes
and two bulk_reads _inside_ of the same program without sending the one extra 
one byte packet:

---
toga usb_loop_host # dd if=/dev/zero bs=1 count=12 | ./usb_loop_host 0 2
12+0 records in
12+0 records out
12 bytes (12 B) copied, 5.0566e-05 s, 237 kB/s
TX 12 bytes
RX 12 bytes
TX 12 bytes
RX 12 bytes
---

These examples show that something happens between closing the device and 
opening it again that messes up the transfer of bulk packets.

Another way to 'fix' this is to force a renumeration every time my code runs, 
when this is done packets always get in/out OK.

I have tried a similar setup with fx2pipe 
(www.cip.physik.uni-muenchen.de/~wwieser/elec/periph/USB-FX2/software/fx2pipe.html)
 (not using libusb) with the same results.

I'm using the 2.6.19 kernel on an Intel 82801G ICH7 controller. I reproduced 
this on older kernels and on a 2.6.17 AMD64 system with a VIA chipset.

Any insights would be very helpful.

Thanks

 - Stephan



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