Alle 19:35, mercoledì 27 luglio 2005, hai scritto:
> On Wed, 27 Jul 2005, Enrico wrote:
> > First of all thanks for your attention to my problem.
> >
> > We had already done that, using usbmon and kernel trace on Linux PC but
> > strangely all packets seem equal. We' ve also try to replicate the same
> > command sequence (including all unnecessary get_descriptors for strings).
> > If you say that no unblocking command is present in Linux driver the
> > thing is still stranger than before... I can't understand why this
> > problem's only with IOmega and not with other HD, the protocol is
> > bulk-only like others and, as I say before, only write command fails on
> > the very first sector and also writing a single sector.
> >
> > We have discovered that using write(10) command and putting to zero into
> > QTD the size of data to be written the command doesn't return error.
> > Looking with usbmon we have also excluded that HD uses write(6) or
> > write(12)... ok... it's a mystery :P
> >
> > Anyway we must go on with other attempts... if you have other suggestions
> > it would be very very appreciated :)
>
> Some other possibilities:  Your host controller driver doesn't handle long
> bulk transfers (>= 512 bytes) correctly.  Your USB cables introduce enough
> noise to interfere with long packet transmission.  The timing of packets
> on your host is different from the timing on the Linux host -- note that
> if your Iomega drive uses a Genesys Logic interface chip (vendor 0x05e3,
> product 0x0701 or 0x0702) then it needs to have a 100us pause between the
> CBW and data phases when doing disk I/O.  The host controller you're using
> and the device controller on the Iomega drive simply don't like each other
> (I've seen this more than once).
>
> Alan Stern

Thanks for these hints, we are trying all these possibilities. 

We have a doubt...
How can we put that pause of 100us between the CBW and data phases?
We put CBW into qtd1 and data into qtd2 under the same QH and so when QH 
starts we have no control on timing... Must we use a QH for each qtd? I don't 
think it's so good, isn't it?

During our milions of tests after a write command we detect a Phase Error 2 
into CSW status and no data are transferred.

Thanks

E. Foglio


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