Am Donnerstag, den 19.04.2018, 19:05 +0300 schrieb Mathias Nyman:
> USB 3.2 specification adds a Gen XxY notion for USB3 devices where
> X is the signaling rate on the wire. Gen 1xY is 5Gbps Superspeed
> and Gen 2xY is 10Gbps SuperSpeedPlus. Y is the lane count.
>
> For normal, non inter-chip (SSIC) devies the rx and tx lane count is
> symmetric, and the maximum lane count for USB 3.2 devices is 2 (dual-lane).
>
> SSIC devices may have asymmetric lane counts, with up to four
> lanes per direction. The USB 3.2 specification doesn't point out
> how to use the Gen XxY notion for these devices, so we limit the Gen Xx2
> notion to symmertic Dual lane devies.
> For other devices just show Gen1 or Gen2
If we detect an asymmetry, we should say so. Otherwise all looks good.
Regards
Oliver
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