hi, Thinh Nguyen <thinh.ngu...@synopsys.com> writes: > Add two new device properties to program the reference clock period and > to enable low power management using the reference clock. This allows a > higher demand to go in low power for Audio Device Class devices. This > feature is currently only valid for DWC_usb31 peripheral controller > v1.80a and higher. > > Set "snps,refclk-period-ns" to program the reference clock period. The > valid input periods are as follow: > +-------------+-----------------+ > | Period (ns) | Freq (MHz) | > +-------------+-----------------+ > | 25 | 39.7/40 | > | 41 | 24.4 | > | 50 | 20 | > | 52 | 19.2 | > | 58 | 17.2 | > | 62 | 16.1 | > +-------------+-----------------+ > > Set "snps,refclk-lpm" to enable low power scheduling of isochronous > transfers by running SOF/ITP counters using the reference clock. Both > "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be > set for this feature to be enabled. > > Signed-off-by: Thinh Nguyen <thi...@synopsys.com> > --- > Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt > b/Documentation/devicetree/bindings/usb/dwc3.txt > index 636630fb92d7..712b344c3a31 100644 > --- a/Documentation/devicetree/bindings/usb/dwc3.txt > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt > @@ -95,6 +95,24 @@ Optional properties: > this and tx-thr-num-pkt-prd to a valid, non-zero value > 1-16 (DWC_usb31 programming guide section 1.2.3) to > enable periodic ESS TX threshold. > + - snps,refclk-period-ns: set to program the reference clock period. The > valid > + input periods are as follow: > + +-------------+-----------------+ > + | Period (ns) | Freq (MHz) | > + +-------------+-----------------+ > + | 25 | 39.7/40 | > + | 41 | 24.4 | > + | 50 | 20 | > + | 52 | 19.2 | > + | 58 | 17.2 | > + | 62 | 16.1 | > + +-------------+-----------------+ > + - snps,enable-refclk-lpm: set to enable low power scheduling of isochronous > + transfers by running SOF/ITP counters using the > + reference clock. Only valid for DWC_usb31 peripheral > + controller v1.80a and higher. Both > + "snps,dis_u2_susphy_quirk" and > + "snps,dis_enblslpm_quirk" must not be set.
sounds like you should rely on clk API here. Then on driver call clk_get_rate() to computer whatever you need to compute. -- balbi
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