Hi Saranya, Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master] [cannot apply to v5.3-rc6 next-20190827] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Saranya-Gopal/xhci-ext-caps-c-Add-property-to-disable-Intel-SW-switch/20190829-031957 config: x86_64-allyesconfig (attached as .config) compiler: gcc-7 (Debian 7.4.0-11) 7.4.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 If you fix the issue, kindly add following tag Reported-by: kbuild test robot <l...@intel.com> Note: it may well be a FALSE warning. FWIW you are at least aware of it now. http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings All warnings (new ones prefixed by >>): drivers/usb/roles/intel-xhci-usb-role-switch.c: In function 'intel_xhci_usb_set_role': >> drivers/usb/roles/intel-xhci-usb-role-switch.c:55:16: warning: 'drd_config' >> may be used uninitialized in this function [-Wmaybe-uninitialized] u32 glk, val, drd_config; ^~~~~~~~~~ vim +/drd_config +55 drivers/usb/roles/intel-xhci-usb-role-switch.c 49 50 static int intel_xhci_usb_set_role(struct device *dev, enum usb_role role) 51 { 52 struct intel_xhci_usb_data *data = dev_get_drvdata(dev); 53 unsigned long timeout; 54 acpi_status status; > 55 u32 glk, val, drd_config; 56 57 /* 58 * On many CHT devices ACPI event (_AEI) handlers read / modify / 59 * write the cfg0 register, just like we do. Take the ACPI lock 60 * to avoid us racing with the AML code. 61 */ 62 status = acpi_acquire_global_lock(ACPI_WAIT_FOREVER, &glk); 63 if (ACPI_FAILURE(status) && status != AE_NOT_CONFIGURED) { 64 dev_err(dev, "Error could not acquire lock\n"); 65 return -EIO; 66 } 67 68 pm_runtime_get_sync(dev); 69 70 /* 71 * Set idpin value as requested. 72 * Since some devices rely on firmware setting DRD_CONFIG and 73 * SW_SWITCH_EN bits to be zero for role switch, 74 * do not set these bits for those devices. 75 */ 76 val = readl(data->base + DUAL_ROLE_CFG0); 77 switch (role) { 78 case USB_ROLE_NONE: 79 val |= SW_IDPIN; 80 val &= ~SW_VBUS_VALID; 81 drd_config = DRD_CONFIG_DYNAMIC; 82 break; 83 case USB_ROLE_HOST: 84 val &= ~SW_IDPIN; 85 val &= ~SW_VBUS_VALID; 86 drd_config = DRD_CONFIG_STATIC_HOST; 87 break; 88 case USB_ROLE_DEVICE: 89 val |= SW_IDPIN; 90 val |= SW_VBUS_VALID; 91 drd_config = DRD_CONFIG_STATIC_DEVICE; 92 break; 93 } 94 val |= SW_IDPIN_EN; 95 if (data->enable_sw_switch) { 96 val &= ~DRD_CONFIG_MASK; 97 val |= SW_SWITCH_EN | drd_config; 98 } 99 writel(val, data->base + DUAL_ROLE_CFG0); 100 101 acpi_release_global_lock(glk); 102 103 /* In most case it takes about 600ms to finish mode switching */ 104 timeout = jiffies + msecs_to_jiffies(DUAL_ROLE_CFG1_POLL_TIMEOUT); 105 106 /* Polling on CFG1 register to confirm mode switch.*/ 107 do { 108 val = readl(data->base + DUAL_ROLE_CFG1); 109 if (!!(val & HOST_MODE) == (role == USB_ROLE_HOST)) { 110 pm_runtime_put(dev); 111 return 0; 112 } 113 114 /* Interval for polling is set to about 5 - 10 ms */ 115 usleep_range(5000, 10000); 116 } while (time_before(jiffies, timeout)); 117 118 pm_runtime_put(dev); 119 120 dev_warn(dev, "Timeout waiting for role-switch\n"); 121 return -ETIMEDOUT; 122 } 123 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
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