On 08/28/2013 12:16 PM, Alan Stern wrote:
> Russell, Peter, and Ingo:
>
> Can you folks enlighten us regarding this issue for some common
> architectures?
>
On x86, IRET is a serializing instruction; it guarantees hard
serialization of absolutely everything.
I would expect architectures that have weak memory ordering to put
appropriate barriers in the IRQ entry/exit code.
-hpa
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