On Wed, Nov 20, 2013 at 10:24 PM, Valentine
<valentine.bars...@cogentembedded.com> wrote:
> On 11/20/2013 09:38 PM, Ulrich Hecht wrote:
>> + usb_bind_phy("0000:00:01.0", 0, "usb_phy_rcar_gen2");
>> + usb_bind_phy("0000:00:02.0", 0, "usb_phy_rcar_gen2");
>
> You don't seem to register PCI controller 0 here. Thus, PCI bus 0 is the
> root bus of controller 1
> which has nothing to do with the USB phy.
Good point. I'll remove those.
CU
Uli
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