On Wed, Oct 15, 2014 at 10:46:18PM -0700, Kever Yang wrote: > This patch add suspend/resume for dwc2 hcd controller.
adds
> Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
> ---
>
> drivers/usb/dwc2/hcd.c | 71
> ++++++++++++++++++++++++++++++++++++++++++--------
> 1 file changed, 60 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index fddd923..c1801d8 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -1474,6 +1474,23 @@ static void dwc2_port_suspend(struct dwc2_hsotg
> *hsotg, u16 windex)
> }
> }
>
> +static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
> +{
> + u32 hprt0;
> +
> + writel(0, hsotg->regs + PCGCTL);
> + usleep_range(20000, 40000);
why this usleep_range() ? Is it documented somewhere ? How about adding
a comment explaining why you need to wait at least 20ms ?
> + hprt0 = dwc2_read_hprt0(hsotg);
> + hprt0 |= HPRT0_RES;
> + writel(hprt0, hsotg->regs + HPRT0);
> + hprt0 &= ~HPRT0_SUSP;
> + usleep_range(100000, 150000);
and another one here, why ?
> + hprt0 &= ~HPRT0_RES;
> + writel(hprt0, hsotg->regs + HPRT0);
> +}
> +
> /* Handles hub class-specific requests */
> static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
> u16 wvalue, u16 windex, char *buf, u16 wlength)
> @@ -1519,17 +1536,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg
> *hsotg, u16 typereq,
> case USB_PORT_FEAT_SUSPEND:
> dev_dbg(hsotg->dev,
> "ClearPortFeature USB_PORT_FEAT_SUSPEND\n");
> - writel(0, hsotg->regs + PCGCTL);
> - usleep_range(20000, 40000);
> -
> - hprt0 = dwc2_read_hprt0(hsotg);
> - hprt0 |= HPRT0_RES;
> - writel(hprt0, hsotg->regs + HPRT0);
> - hprt0 &= ~HPRT0_SUSP;
> - usleep_range(100000, 150000);
> -
> - hprt0 &= ~HPRT0_RES;
> - writel(hprt0, hsotg->regs + HPRT0);
> + dwc2_port_resume(hsotg);
> break;
>
> case USB_PORT_FEAT_POWER:
> @@ -2304,6 +2311,45 @@ static void _dwc2_hcd_stop(struct usb_hcd *hcd)
> usleep_range(1000, 3000);
> }
>
> +static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
> +{
> + struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
> + u32 hprt0;
> +
> + if (hsotg->op_state != OTG_STATE_B_HOST)
> + return 0;
> +
> + if (hsotg->lx_state != DWC2_L0)
> + return 0;
> +
> + hprt0 = dwc2_read_hprt0(hsotg);
> + if (hprt0 | HPRT0_CONNSTS)
did you mean:
if (hprt0 & HPRT0_CONNSTS) ??
> + dwc2_port_suspend(hsotg, 1);
always 1 ?
> + clk_disable(hsotg->clk);
this I keep getting wrong, but if ->bus_suspend() is really the one used
for actual system sleep, then you might want to fiddle with the clocks
only from the parent platform glue. I haven't really read the code to
make sure, however, so this might be a completely bogus comment :-)
> + return 0;
> +}
> +
> +static int _dwc2_hcd_resume(struct usb_hcd *hcd)
> +{
> + struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
> + u32 hprt0;
> +
> + if (hsotg->op_state != OTG_STATE_B_HOST)
> + return 0;
> +
> + if (hsotg->lx_state != DWC2_L2)
> + return 0;
> +
> + clk_enable(hsotg->clk);
> +
> + hprt0 = dwc2_read_hprt0(hsotg);
> + if (hprt0 | HPRT0_CONNSTS | HPRT0_SUSP)
and here:
if ((hprt0 & HPRT0_CONNSTS) &&
(hprt0 & HPRT0_SUSP)) ???
--
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