Hi,

We have one USB 2.0 Controller on an ARM SoC, with internal PHY
confirming to UTMI.
The PHY would detect unexpected disconnect (amplitude of the
differential envelop still < 625 mV)
and assert the HostDisconnect signal to the Controller to indicate a
disconnection event.
When the HostDisconnect signal is asserted, the Controller will first
do some internal clean work
before it update CCS and CSC in PORTSCx and reports a Port Change
Detect interrupt.
We want to improve the situation by masking the HostDisconnect signal
from PHY (take the
cost into consideration), but it will cause no CCS and CSC update in
PORTSCx, and no PCD interrupt. Thus the true disconnection only can be
determined by an XactErr. Once the driver
determine that it's a true disconnect, the HostDisconnect signal can
be unmasked and the
Controller will detect this disconnect.
We are worried about the workaroud, since there may be many corner
cases we have not taken into consideration, such as the race condition
on connect and disconnect.
So have you encountered this situation before? Or is there any
suggestion on this workaround?

Thanks!

Regards
Rong
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