From: Fabio Estevam <fabio.este...@freescale.com> Add an entry for the optional 'phy-clkgate-delay-us' property that is used to describe the delay time between putting PHY into low power mode and turning off the PHY clock.
Signed-off-by: Li Jun <jun...@freescale.com> Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index d71ef07..48709dd 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -45,6 +45,8 @@ Optional properties: (4 bytes), This register represents the maximum length of a the burst in 32-bit words while moving data from the USB bus to system memory, changing this value takes effect only the SBUSCFG.AHBBRST is 0. +- phy-clkgate-delay-us: the delay time (us) between putting the PHY into + low power mode and gating the PHY clock. Example: @@ -61,4 +63,5 @@ Example: ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; /* 64 bytes */ rx-burst-size-dword = <0x10>; + phy-clkgate-delay-us = <400>; }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html