Hello.
On 03/04/2016 09:23 PM, Douglas Anderson wrote:
From testing and trying to make sense of the documentation, it appears
that a 10 ms delay is needed after resetting the core to make sure that
everything is stable and consistent. Let's add it.
In my testing (on rk3288) this allows us to revert commit
192cb07f7928 ("usb: dwc2: Fix probe problem on bcm2835"). Though I
could never reproduce the problems on my board, this might also allow us
to revert commit bd84f4ae9986 ("usb: dwc2: Add extra delay when forcing
dr_mode").
Signed-off-by: Douglas Anderson <diand...@chromium.org>
---
drivers/usb/dwc2/core.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 5e5a0f135b5a..8710b2d3e770 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -277,6 +277,26 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg)
}
} while (!(greset & GRSTCTL_AHBIDLE));
+ /*
+ * Sleep for 10-15 ms after the reset to let it finish.
+ *
+ * It's been confirmed on at least one version of the controller
+ * that this is a requirement that this is a requirement in order for
Saying it once is enough. :-)
[...]
MBR, Sergei
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