Felipe Balbi <felipe.ba...@linux.intel.com> writes:
> If we're going to issue a Update Transfer command,
> let's clear LST bit from previous TRB. This will let
> us continue processing TRBs and convert previous IRQ
> into XferInProgress, instead of XferComplete.
>
> Signed-off-by: Felipe Balbi <felipe.ba...@linux.intel.com>
> ---
> drivers/usb/dwc3/gadget.c | 32 +++++++++++++++++++++++---------
> 1 file changed, 23 insertions(+), 9 deletions(-)
< snip >
> + /*
> + * When trying to issue Update Transfer, we can remove LST bit from
> + * previous TRB and avoid a XferComplete
> + */
> + if (!starting) {
> + trb = &dep->trb_pool[dep->trb_enqueue - 1];
> + if (trb->ctrl & DWC3_TRB_CTRL_HWO)
> + trb->ctrl &= ~DWC3_TRB_CTRL_LST;
Hi Felipe,
This violates the DWC USB3 programming model. Once the HWO bit has been set
and the transfer started, the host is not allowed to modify any of the
fields in the TRB until the controller clears the HWO bit, or the transfer
completes or is halted.
--
Paul
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