On Tue, Jun 7, 2016 at 2:54 AM, Heiko Stübner <he...@sntech.de> wrote:
> Hi Frank,
>
> Am Montag, 6. Juni 2016, 17:20:04 schrieb Frank Wang:
>> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
>> than rk3288 and before, and most of phy-related registers are also
>> different from the past, so a new phy driver is required necessarily.
>>
>> Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
>> ---
>
> [...]
>
>> +static int rockchip_usb2phy_probe(struct platform_device *pdev)
>> +{
>> +     struct device *dev = &pdev->dev;
>> +     struct device_node *np = dev->of_node;
>> +     struct device_node *child_np;
>> +     struct phy_provider *provider;
>> +     struct rockchip_usb2phy *rphy;
>> +     const struct of_device_id *match;
>> +     int index, ret;
>> +
>> +     rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
>> +     if (!rphy)
>> +             return -ENOMEM;
>> +
>> +     match = of_match_device(dev->driver->of_match_table, dev);
>> +     if (!match || !match->data) {
>> +             dev_err(dev, "phy configs are not assigned!\n");
>> +             return -EINVAL;
>> +     }
>> +
>> +     if (!dev->parent || !dev->parent->of_node)
>> +             return -EINVAL;
>> +
>> +     rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
>> +     if (IS_ERR(rphy->grf))
>> +             return PTR_ERR(rphy->grf);
>> +
>> +     rphy->dev = dev;
>> +     rphy->phy_cfg = match->data;
>> +     platform_set_drvdata(pdev, rphy);
>> +
>> +     ret = rockchip_usb2phy_clk480m_register(rphy);
>> +     if (ret) {
>> +             dev_err(dev, "failed to register 480m output clock\n");
>> +             return ret;
>> +     }
>> +
>> +     rphy->vbus_host = devm_regulator_get_optional(dev, "vbus_host");
>> +     if (IS_ERR(rphy->vbus_host)) {
>> +             ret = PTR_ERR(rphy->vbus_host);
>> +             if (ret == -EPROBE_DEFER)
>> +                     return ret;
>> +
>> +             dev_info(dev, "vbus_host regulator is not assigned!\n");
>> +             rphy->vbus_host = NULL;
>> +     } else {
>> +             ret = regulator_enable(rphy->vbus_host);
>> +             if (ret)
>> +                     return ret;
>> +     }
>> +
>> +     index = 0;
>> +     for_each_available_child_of_node(np, child_np) {
>> +             struct rockchip_usb2phy_port *rport = &rphy->ports[index];
>> +             struct phy *phy;
>> +
>> +             phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops);
>> +             if (IS_ERR(phy)) {
>> +                     dev_err(dev, "failed to create phy\n");
>> +                     ret = PTR_ERR(phy);
>> +                     goto put_child;
>> +             }
>> +
>> +             rport->phy = phy;
>> +
>> +             /* initialize otg/host port separately */
>> +             if (!of_node_cmp(child_np->name, "host-port")) {
>> +                     ret = rockchip_usb2phy_host_port_init(rphy, rport,
>> +                                                           child_np);
>> +                     if (ret)
>> +                             goto put_child;
>> +             }
>> +
>> +             phy_set_drvdata(rport->phy, rport);
>> +
>> +             /* to prevent out of boundary */
>> +             if (++index >= rphy->phy_cfg->num_ports)
>> +                     break;
>> +     }
>> +
>> +     provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>> +     return PTR_ERR_OR_ZERO(provider);
>> +
>> +put_child:
>> +     of_node_put(child_np);
>> +     return ret;
>> +}
>> +
>> +static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs = {
>> +     .num_ports      = 2,
>> +     .clkout_ctl     = { 0x0724, 15, 15, 1, 0 },
>> +     .port_cfgs      = {
>> +             [USB2PHY_PORT_HOST] = {
>> +                     .phy_sus        = { 0x0728, 15, 0, 0, 0x1d1 },
>> +                     .ls_det_en      = { 0x0680, 4, 4, 0, 1 },
>> +                     .ls_det_st      = { 0x0690, 4, 4, 0, 1 },
>> +                     .ls_det_clr     = { 0x06a0, 4, 4, 0, 1 },
>> +                     .utmi_ls        = { 0x049c, 14, 13, 0, 1 },
>> +                     .utmi_hstdet    = { 0x049c, 12, 12, 0, 1 }
>> +             }
>> +     },
>> +};
>
> I also realized that the rk3399 has two of those phy-blocks, so I think we'll
> need to adapt your data storage mechanism a tiny bit. Maybe something like
> the following:
>
> In the dts:
>
> grf: syscon@ff770000 {
>        compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
>         ...
>        u2phy: usb2-phy@700 {
>                compatible = "rockchip,rk3366-usb2phy";
>                 reg = <0x700 0x2c>;
>                 ...
>        };
> };
>
> In the driver
>
> static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
>         {
>                 .reg = 0x700,
>                 .num_ports      = 2,
>                 .clkout_ctl     = { 0x0724, 15, 15, 1, 0 },
>                 .port_cfgs      = {
>                         [USB2PHY_PORT_HOST] = {
>                                 .phy_sus        = { 0x0728, 15, 0, 0, 0x1d1 },
>                                 ...
>                         }
>                 },
>         },
> };
>
> and in _probe then simply use the correct array entry matching the dts reg
> property.
>
> On the rk3399 this would then probably be
>
>        u2phy0: phy@e450 {
>                compatible = "rockchip,rk3366-usb2phy";
>                 reg = <0xe450 0x10>;
>                 ...
>         };
>
>        u2phy1: phy@e460 {
>                compatible = "rockchip,rk3366-usb2phy";
>                 reg = <0xe460 0x10>;
>                 ...
>         };
>
>
> This is slightly similar to what we do with the emmc-phy. But also as the
> usbphys differ in a lot of way, this is really only used to match to the data
> block.
>
> This only affects the match-data selection and the rest of the driver does not
> need to be changed for this.
>

Would this replace the host-port property ?

Thanks,
Guenter
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