[PATCH v2 2/6] usb: mtu3: add reference clock

[Chunfeng Yun]

usually, the reference clock comes from 26M oscillator directly,
but some SoCs are not, add it for compatibility.

Signed-off-by: Chunfeng Yun <chunfeng....@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h      |    1 +
 drivers/usb/mtu3/mtu3_plat.c |   28 ++++++++++++++++++++++++++--
 2 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index ba9df71..aa6fd6a 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -225,6 +225,7 @@ struct ssusb_mtk {
        /* common power & clock */
        struct regulator *vusb33;
        struct clk *sys_clk;
+       struct clk *ref_clk;
        /* otg */
        struct otg_switch_mtk otg_switch;
        enum usb_dr_mode dr_mode;
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 6344859..c3125da 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -123,7 +123,13 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
        ret = clk_prepare_enable(ssusb->sys_clk);
        if (ret) {
                dev_err(ssusb->dev, "failed to enable sys_clk\n");
-               goto clk_err;
+               goto sys_clk_err;
+       }
+
+       ret = clk_prepare_enable(ssusb->ref_clk);
+       if (ret) {
+               dev_err(ssusb->dev, "failed to enable ref_clk\n");
+               goto ref_clk_err;
        }
 
        ret = ssusb_phy_init(ssusb);
@@ -143,8 +149,10 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
 phy_err:
        ssusb_phy_exit(ssusb);
 phy_init_err:
+       clk_disable_unprepare(ssusb->ref_clk);
+ref_clk_err:
        clk_disable_unprepare(ssusb->sys_clk);
-clk_err:
+sys_clk_err:
        regulator_disable(ssusb->vusb33);
 vusb33_err:
 
@@ -154,6 +162,7 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
 {
        clk_disable_unprepare(ssusb->sys_clk);
+       clk_disable_unprepare(ssusb->ref_clk);
        regulator_disable(ssusb->vusb33);
        ssusb_phy_power_off(ssusb);
        ssusb_phy_exit(ssusb);
@@ -216,6 +225,19 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
                return PTR_ERR(ssusb->sys_clk);
        }
 
+       /*
+        * reference clock is usually a "fixed-clock", make it optional
+        * for backward compatibility and ignore the error if it does
+        * not exist.
+        */
+       ssusb->ref_clk = devm_clk_get(dev, "ref_ck");
+       if (IS_ERR(ssusb->ref_clk)) {
+               if (PTR_ERR(ssusb->ref_clk) == -EPROBE_DEFER)
+                       return -EPROBE_DEFER;
+
+               ssusb->ref_clk = NULL;
+       }
+
        ssusb->num_phys = of_count_phandle_with_args(node,
                        "phys", "#phy-cells");
        if (ssusb->num_phys > 0) {
@@ -428,6 +450,7 @@ static int __maybe_unused mtu3_suspend(struct device *dev)
        ssusb_host_disable(ssusb, true);
        ssusb_phy_power_off(ssusb);
        clk_disable_unprepare(ssusb->sys_clk);
+       clk_disable_unprepare(ssusb->ref_clk);
        ssusb_wakeup_enable(ssusb);
 
        return 0;
@@ -445,6 +468,7 @@ static int __maybe_unused mtu3_resume(struct device *dev)
 
        ssusb_wakeup_disable(ssusb);
        clk_prepare_enable(ssusb->sys_clk);
+       clk_prepare_enable(ssusb->ref_clk);
        ssusb_phy_power_on(ssusb);
        ssusb_host_enable(ssusb);
 
-- 
1.7.9.5

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