On Monday 23 November 2015 10:17:38 Damien Riegel wrote: > Currently syscon has a fixed configuration of 32 bits for register and > values widths. In some cases, it would be desirable to be able to > customize the value width. > > For example, certain boards (like the ones manufactured by Technologic > Systems) have a FPGA that is memory-mapped, but its registers are only > 16-bit wide. > > This patch adds an optional "bus-width" DT binding for syscon that > allows to change the width for the data bus (i.e. val_bits). If this > property is provided, it will also adjust the register stride to > bus-width / 8. If not provided, the default configuration is used. > > Signed-off-by: Damien Riegel <[email protected]> >
Acked-by: Arnd Bergmann <[email protected]> -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
