merged.
Bruce
In message: [linux-yocto] [kernel v5.10/standard/nxp-sdk-5.4/nxp-imx8][PATCH]
arm64: tlb: Apply the TKT340553 Errata workaround to TLB non-range operations
on 14/05/2021 Xiaolei Wang wrote:
> When porting the SDK commit 593bea4e36d8 ("MLK-16005-2 arm64: tlb: add
> the SW workaround for i.MX8QM TKT340553"), we neglected to apply the
> TKT340553 Errata workaround to the TLB non-range operations due
> to the variance between the SDK and our kernel. We have observed random
> page fault calltrace due to this. Fix it by applying the TKT340553
> Errata workaround to the TLB non-range operations.
>
> Signed-off-by: Xiaolei Wang <xiaolei.w...@windriver.com>
> ---
> arch/arm64/include/asm/tlbflush.h | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h
> b/arch/arm64/include/asm/tlbflush.h
> index 6218fa355149..a27a75fbe048 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -344,7 +344,9 @@ static inline void __flush_tlb_range(struct
> vm_area_struct *vma,
> if (!system_supports_tlb_range() ||
> pages % 2 == 1) {
> addr = __TLBI_VADDR(start, asid);
> - if (last_level) {
> + if (TKT340553_SW_WORKAROUND) {
> + __tlbi(vmalle1is);
> + } else if (last_level) {
> __tlbi_level(vale1is, addr, tlb_level);
> __tlbi_user_level(vale1is, addr, tlb_level);
> } else {
> --
> 2.25.1
>
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