Use raw_spin_lock instead of spin_lock, this patch fixes the following warning:
Hardware name: Freescale i.MX7 Dual (Device Tree) unwind_backtrace from show_stack+0x18/0x1c show_stack from dump_stack_lvl+0x40/0x4c dump_stack_lvl from __might_resched+0x140/0x1b4 __might_resched from rt_spin_lock+0x28/0x74 rt_spin_lock from imx_gpcv2_set_lpm_mode+0x1c/0xbc imx_gpcv2_set_lpm_mode from imx7d_enter_low_power_idle+0x7c/0x30c imx7d_enter_low_power_idle from cpuidle_enter_state+0xe8/0x328 cpuidle_enter_state from cpuidle_enter+0x3c/0x50 cpuidle_enter from do_idle+0x218/0x268 do_idle from cpu_startup_entry+0x20/0x24 cpu_startup_entry from rest_init+0xbc/0xd8 rest_init from arch_post_acpi_subsys_init+0x0/0x18 Signed-off-by: Xiaolei Wang <xiaolei.w...@windriver.com> --- arch/arm/mach-imx/gpcv2.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-imx/gpcv2.c b/arch/arm/mach-imx/gpcv2.c index 62e8b0089348..4e7034c79ad7 100644 --- a/arch/arm/mach-imx/gpcv2.c +++ b/arch/arm/mach-imx/gpcv2.c @@ -109,7 +109,7 @@ static u32 gpcv2_saved_imrs[IMR_NUM]; static u32 gpcv2_saved_imrs_m4[IMR_NUM]; static u32 gpcv2_mf_irqs[IMR_NUM]; static u32 gpcv2_mf_request_on[IMR_NUM]; -static DEFINE_SPINLOCK(gpcv2_lock); +static DEFINE_RAW_SPINLOCK(gpcv2_lock); void imx_gpcv2_add_m4_wake_up_irq(u32 hwirq, bool enable) { @@ -122,10 +122,10 @@ void imx_gpcv2_add_m4_wake_up_irq(u32 hwirq, bool enable) return; mask = 1 << hwirq % 32; - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); gpcv2_wake_irqs[idx] = enable ? gpcv2_wake_irqs[idx] | mask : gpcv2_wake_irqs[idx] & ~mask; - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); } static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on) @@ -137,10 +137,10 @@ static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on) BUG_ON(idx >= IMR_NUM); mask = 1 << d->hwirq % 32; - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); gpcv2_wake_irqs[idx] = on ? gpcv2_wake_irqs[idx] | mask : gpcv2_wake_irqs[idx] & ~mask; - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); return 0; } @@ -226,7 +226,7 @@ void imx_gpcv2_set_lpm_mode(enum mxc_cpu_pwr_mode mode) unsigned long flags; u32 val1, val2; - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); val1 = readl_relaxed(gpc_base + GPC_LPCR_A7_BSC); val2 = readl_relaxed(gpc_base + GPC_SLPCR); @@ -283,7 +283,7 @@ void imx_gpcv2_set_lpm_mode(enum mxc_cpu_pwr_mode mode) writel_relaxed(val1, gpc_base + GPC_LPCR_A7_BSC); writel_relaxed(val2, gpc_base + GPC_SLPCR); - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); } void imx_gpcv2_set_plat_power_gate_by_lpm(bool pdn) @@ -329,7 +329,7 @@ void imx_gpcv2_set_cpu_power_gate_by_wfi(u32 cpu, bool pdn) unsigned long flags; u32 val; - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); val = readl_relaxed(gpc_base + GPC_LPCR_A7_AD); if (cpu == 0) { @@ -355,7 +355,7 @@ void imx_gpcv2_set_cpu_power_gate_by_wfi(u32 cpu, bool pdn) } } writel_relaxed(val, gpc_base + GPC_LPCR_A7_AD); - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); } void imx_gpcv2_set_cpu_power_gate_by_lpm(u32 cpu, bool pdn) @@ -363,7 +363,7 @@ void imx_gpcv2_set_cpu_power_gate_by_lpm(u32 cpu, bool pdn) unsigned long flags; u32 val; - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); val = readl_relaxed(gpc_base + GPC_LPCR_A7_AD); if (cpu == 0) { @@ -384,7 +384,7 @@ void imx_gpcv2_set_cpu_power_gate_by_lpm(u32 cpu, bool pdn) } writel_relaxed(val, gpc_base + GPC_LPCR_A7_AD); - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); } void imx_gpcv2_set_cpu_power_gate_in_idle(bool pdn) @@ -395,7 +395,7 @@ void imx_gpcv2_set_cpu_power_gate_in_idle(bool pdn) for_each_possible_cpu(cpu) imx_gpcv2_set_cpu_power_gate_by_lpm(cpu, pdn); - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); imx_gpcv2_set_m_core_pgc(pdn, GPC_PGC_C0); if (num_online_cpus() > 1) @@ -424,7 +424,7 @@ void imx_gpcv2_set_cpu_power_gate_in_idle(bool pdn) gpc_base + GPC_PGC_ACK_SEL_A7); imx_gpcv2_enable_rbc(false); } - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); } void imx_gpcv2_set_mix_phy_gate_by_lpm(u32 pdn_index, u32 pup_index) @@ -468,10 +468,10 @@ int imx_gpcv2_mf_power_on(unsigned int irq, unsigned int on) BUG_ON(idx >= IMR_NUM); - spin_lock_irqsave(&gpcv2_lock, flags); + raw_spin_lock_irqsave(&gpcv2_lock, flags); gpcv2_mf_request_on[idx] = on ? gpcv2_mf_request_on[idx] | mask : gpcv2_mf_request_on[idx] & ~mask; - spin_unlock_irqrestore(&gpcv2_lock, flags); + raw_spin_unlock_irqrestore(&gpcv2_lock, flags); return 0; } -- 2.25.1
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