From: Quanyang Wang <quanyang.w...@windriver.com> This patch references to:
88132e3d1cf34c09aa00287a1ce29428d07d200e from https://github.com/nxp-auto-linux/linux We take into account FAST/1V8GPIO/3V3GPIO pads. Signed-off-by: Quanyang Wang <quanyang.w...@windriver.com> --- Hi Bruce, Would you please help merge this patch to the branches: v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g v5.15/standard/nxp-sdk-5.15/nxp-s32g Thanks, Quanyang --- .../boot/dts/freescale/s32g274a-aptiv.dtsi | 100 +++++++++--------- .../boot/dts/freescale/s32gxxxa-cvc-fl.dtsi | 86 +++++++-------- 2 files changed, 93 insertions(+), 93 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi index fc4c16131f8dc..8b5544a2669e4 100644 --- a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi @@ -217,13 +217,13 @@ can0_pins: can0 { can0_grp0 { pinmux = <S32CC_PINMUX(44, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can0_grp1 { pinmux = <S32CC_PINMUX(43, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can0_grp2 { @@ -233,13 +233,13 @@ can0_grp2 { can0_stb_grp0 { pinmux = <S32CC_PINMUX(10, FUNC0)>; bias-pull-up; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can0_en_grp0 { pinmux = <S32CC_PINMUX(9, FUNC0)>; bias-pull-up; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; }; @@ -247,13 +247,13 @@ can1_pins: can1 { can1_grp0 { pinmux = <S32CC_PINMUX(19, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can1_grp1 { pinmux = <S32CC_PINMUX(20, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can1_grp2 { @@ -266,13 +266,13 @@ can2_pins: can2 { can2_grp0 { pinmux = <S32CC_PINMUX(27, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can2_grp1 { pinmux = <S32CC_PINMUX(28, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can2_grp2 { @@ -285,13 +285,13 @@ can3_pins: can3 { can3_grp0 { pinmux = <S32CC_PINMUX(29, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can3_grp1 { pinmux = <S32CC_PINMUX(30, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can3_grp2 { @@ -304,26 +304,26 @@ dspi1_pins: dspi1 { dspi1_grp0 { pinmux = <S32CC_PINMUX(7, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; dspi1_grp1 { pinmux = <S32CC_PINMUX(6, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1_grp2 { pinmux = <S32CC_PINMUX(8, FUNC3)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1_grp3 { pinmux = <S32CC_PINMUX(95, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; @@ -337,13 +337,13 @@ dspi1slave_pins: dspi1slave { dspi1slave_grp0 { pinmux = <S32CC_PINMUX(6, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp1 { pinmux = <S32CC_PINMUX(7, FUNC2)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp2 { @@ -355,13 +355,13 @@ dspi1slave_grp2 { dspi1slave_grp3 { pinmux = <S32CC_PINMUX(8, FUNC3)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp4 { pinmux = <S32CC_PINMUX(95, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; @@ -374,7 +374,7 @@ i2c0_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c0_grp1 { @@ -390,7 +390,7 @@ i2c0_gpio_grp0 { <S32CC_PINMUX(17, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c0_gpio_grp1 { @@ -407,7 +407,7 @@ i2c2_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c2_grp1 { @@ -428,7 +428,7 @@ i2c2_gpio_grp1 { <S32CC_PINMUX(22, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; }; @@ -439,7 +439,7 @@ i2c4_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c4_grp1 { @@ -452,7 +452,7 @@ i2c4_grp2 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; }; @@ -463,7 +463,7 @@ i2c4_gpio_grp0 { <S32CC_PINMUX(34, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c4_gpio_grp1 { @@ -499,7 +499,7 @@ usbotg_grp1 { <S32CC_PINMUX(112, FUNC1)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; usbotg_grp2 { @@ -507,13 +507,13 @@ usbotg_grp2 { <S32CC_PINMUX(185, FUNC0)>, <S32CC_PINMUX(187, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; usbotg_grp3 { pinmux = <S32CC_PINMUX(186, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; }; @@ -522,14 +522,14 @@ pfe2mdioa_pins: pfe2mdioa { pfe2mdioa_grp0 { pinmux = <S32CC_PINMUX(82, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2mdioa_grp1 { pinmux = <S32CC_PINMUX(79, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2mdioa_grp2 { @@ -546,7 +546,7 @@ pfe2rgmiia_grp0 { <S32CC_PINMUX(115, FUNC2)>, <S32CC_PINMUX(78, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2rgmiia_grp1 { @@ -557,7 +557,7 @@ pfe2rgmiia_grp1 { <S32CC_PINMUX(120, FUNC0)>, <S32CC_PINMUX(121, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2rgmiia_grp2 { @@ -573,7 +573,7 @@ pfe2rgmiia_grp2 { pfe2rgmiia_grp3 { pinmux = <S32CC_PINMUX(122, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; bias-pull-up; }; @@ -583,14 +583,14 @@ gmac0mdioc_pins: gmac0mdioc { gmac0mdioc_grp0 { pinmux = <S32CC_PINMUX(60, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0mdioc_grp1 { pinmux = <S32CC_PINMUX(61, FUNC1)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0mdioc_grp2 { @@ -603,7 +603,7 @@ gmac0rgmiic_pins: gmac0rgmiic { gmac0rgmiic_grp0 { pinmux = <S32CC_PINMUX(66, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; bias-pull-up; }; @@ -624,7 +624,7 @@ gmac0rgmiic_grp2 { <S32CC_PINMUX(70, FUNC1)>, <S32CC_PINMUX(71, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0rgmiic_grp3 { @@ -635,7 +635,7 @@ gmac0rgmiic_grp3 { <S32CC_PINMUX(76, FUNC0)>, <S32CC_PINMUX(77, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; }; @@ -644,14 +644,14 @@ pfe1mdioc_pins: pfe1mdioc { pfe1mdioc_grp0 { pinmux = <S32CC_PINMUX(60, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1mdioc_grp1 { pinmux = <S32CC_PINMUX(61, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1mdioc_grp2 { @@ -664,7 +664,7 @@ pfe1rgmiic_pins: pfe1rgmiic { pfe1rgmiic_grp0 { pinmux = <S32CC_PINMUX(66, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; bias-pull-up; }; @@ -684,13 +684,13 @@ pfe1rgmiic_grp2 { <S32CC_PINMUX(69, FUNC2)>, <S32CC_PINMUX(70, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1rgmiic_grp3 { pinmux = <S32CC_PINMUX(71, FUNC3)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1rgmiic_grp4 { @@ -701,7 +701,7 @@ pfe1rgmiic_grp4 { <S32CC_PINMUX(76, FUNC0)>, <S32CC_PINMUX(77, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; }; @@ -716,7 +716,7 @@ ftm0_grp1 { <S32CC_PINMUX(180, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm0_grp2 { @@ -724,7 +724,7 @@ ftm0_grp2 { <S32CC_PINMUX(181, FUNC3)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm0_grp3 { @@ -746,7 +746,7 @@ ftm1_grp0 { pinmux = <S32CC_PINMUX(29, FUNC3)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm1_grp1 { @@ -761,14 +761,14 @@ ftm1_grp3 { pinmux = <S32CC_PINMUX(31, FUNC4)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm1_grp4 { pinmux = <S32CC_PINMUX(32, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm1_grp5 { @@ -790,7 +790,7 @@ gmacrgmiia_grp0 { <S32CC_PINMUX(121, FUNC0)>, <S32CC_PINMUX(122, FUNC0)>, <S32CC_PINMUX(144, FUNC0)>; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; }; diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi index 537eda907e80d..e19ae4f18d5ce 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi @@ -255,13 +255,13 @@ can0_pins: can0 { can0_grp0 { pinmux = <S32CC_PINMUX(44, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can0_grp1 { pinmux = <S32CC_PINMUX(43, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can0_grp2 { @@ -273,13 +273,13 @@ can1_pins: can1 { can1_grp0 { pinmux = <S32CC_PINMUX(19, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can1_grp1 { pinmux = <S32CC_PINMUX(20, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can1_grp2 { @@ -292,13 +292,13 @@ can2_pins: can2 { can2_grp0 { pinmux = <S32CC_PINMUX(27, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can2_grp1 { pinmux = <S32CC_PINMUX(28, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can2_grp2 { @@ -311,13 +311,13 @@ can3_pins: can3 { can3_grp0 { pinmux = <S32CC_PINMUX(25, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_150MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can3_grp1 { pinmux = <S32CC_PINMUX(30, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; can3_grp2 { @@ -330,26 +330,26 @@ dspi1_pins: dspi1 { dspi1_grp0 { pinmux = <S32CC_PINMUX(7, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; dspi1_grp1 { pinmux = <S32CC_PINMUX(6, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1_grp2 { pinmux = <S32CC_PINMUX(8, FUNC3)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1_grp3 { pinmux = <S32CC_PINMUX(95, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; @@ -363,13 +363,13 @@ dspi1slave_pins: dspi1slave { dspi1slave_grp0 { pinmux = <S32CC_PINMUX(6, FUNC2)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp1 { pinmux = <S32CC_PINMUX(7, FUNC2)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp2 { @@ -381,13 +381,13 @@ dspi1slave_grp2 { dspi1slave_grp3 { pinmux = <S32CC_PINMUX(8, FUNC3)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; dspi1slave_grp4 { pinmux = <S32CC_PINMUX(95, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; bias-pull-up; }; @@ -400,7 +400,7 @@ i2c0_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c0_grp1 { @@ -416,7 +416,7 @@ i2c0_gpio_grp0 { <S32CC_PINMUX(17, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c0_gpio_grp1 { @@ -433,7 +433,7 @@ i2c2_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c2_grp1 { @@ -454,7 +454,7 @@ i2c2_gpio_grp1 { <S32CC_PINMUX(22, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; }; @@ -465,7 +465,7 @@ i2c4_grp0 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c4_grp1 { @@ -478,7 +478,7 @@ i2c4_grp2 { drive-open-drain; output-enable; input-enable; - slew-rate = <S32CC_SLEW_83MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; }; @@ -489,7 +489,7 @@ i2c4_gpio_grp0 { <S32CC_PINMUX(34, FUNC0)>; drive-open-drain; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; i2c4_gpio_grp1 { @@ -525,7 +525,7 @@ usbotg_grp1 { <S32CC_PINMUX(112, FUNC1)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; usbotg_grp2 { @@ -533,13 +533,13 @@ usbotg_grp2 { <S32CC_PINMUX(185, FUNC0)>, <S32CC_PINMUX(187, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; usbotg_grp3 { pinmux = <S32CC_PINMUX(186, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_208MHZ>; }; }; @@ -548,14 +548,14 @@ gmac0mdioc_pins: gmac0mdioc { gmac0mdioc_grp0 { pinmux = <S32CC_PINMUX(60, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0mdioc_grp1 { pinmux = <S32CC_PINMUX(61, FUNC1)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0mdioc_grp2 { @@ -568,7 +568,7 @@ gmac0rgmiic_pins: gmac0rgmiic { gmac0rgmiic_grp0 { pinmux = <S32CC_PINMUX(66, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; bias-pull-up; }; @@ -589,7 +589,7 @@ gmac0rgmiic_grp2 { <S32CC_PINMUX(70, FUNC1)>, <S32CC_PINMUX(71, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; gmac0rgmiic_grp3 { @@ -600,7 +600,7 @@ gmac0rgmiic_grp3 { <S32CC_PINMUX(76, FUNC0)>, <S32CC_PINMUX(77, FUNC0)>; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; }; @@ -609,14 +609,14 @@ pfe0mdio_pins: pfe0mdio { pfe0mdio_grp0 { pinmux = <S32CC_PINMUX(82, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe0mdio_grp1 { pinmux = <S32CC_PINMUX(79, FUNC1)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe0mdio_grp2 { @@ -628,14 +628,14 @@ pfe1mdio_pins: pfe1mdio { pfe1mdio_grp0 { pinmux = <S32CC_PINMUX(177, FUNC4)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1mdio_grp1 { pinmux = <S32CC_PINMUX(178, FUNC4)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe1mdio_grp2 { @@ -647,14 +647,14 @@ pfe2mdio_pins: pfe2mdio { pfe2mdio_grp0 { pinmux = <S32CC_PINMUX(80, FUNC1)>; output-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2mdio_grp1 { pinmux = <S32CC_PINMUX(81, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; pfe2mdio_grp2 { @@ -672,7 +672,7 @@ ftm0_grp1 { <S32CC_PINMUX(180, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_GPIO_3V3_SLEW_50MHZ>; }; ftm0_grp2 { @@ -680,7 +680,7 @@ ftm0_grp2 { <S32CC_PINMUX(181, FUNC3)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; ftm0_grp3 { @@ -702,7 +702,7 @@ ftm1_grp0 { pinmux = <S32CC_PINMUX(29, FUNC3)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; ftm1_grp1 { @@ -717,14 +717,14 @@ ftm1_grp3 { pinmux = <S32CC_PINMUX(31, FUNC4)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; ftm1_grp4 { pinmux = <S32CC_PINMUX(32, FUNC2)>; output-enable; input-enable; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; ftm1_grp5 { @@ -746,7 +746,7 @@ gmacrgmiia_grp0 { <S32CC_PINMUX(121, FUNC0)>, <S32CC_PINMUX(122, FUNC0)>, <S32CC_PINMUX(144, FUNC0)>; - slew-rate = <S32CC_SLEW_208MHZ>; + slew-rate = <S32CC_FAST_SLEW_166MHZ>; }; }; -- 2.36.1
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