From: Anders Berg <anders.b...@lsi.com>
Signed-off-by: Anders Berg <anders.b...@lsi.com>
---
arch/arm/mach-axxia/axxia.c | 47 +++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 45 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
index 9641d0c..4d3b476 100644
--- a/arch/arm/mach-axxia/axxia.c
+++ b/arch/arm/mach-axxia/axxia.c
@@ -207,9 +207,52 @@ static struct spi_board_info spi_devs[] __initdata = {
}
};
+
+static int
+l3_set_pstate(void __iomem *l3ctrl, unsigned int req, unsigned int act)
+{
+ static const u8 hn_f[] = {
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(hn_f); ++i) {
+ /* set state NOL3 */
+ writel(req, l3ctrl + (hn_f[i] << 16) + 0x10);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(hn_f); ++i) {
+ unsigned long status;
+ int retries = 10000;
+
+ do {
+ status = readl(l3ctrl + (hn_f[i] << 16) + 0x18);
+ udelay(1);
+ } while ((0 < --retries) && (act != (status & 0xf)));
+
+ if (0 == retries)
+ return -ENODEV;
+
+
+ return 0;
+}
+
void __init axxia_dt_init(void)
{
- l2x0_of_init(0x00400000, 0xfe0fffff);
+ void __iomem *l3ctrl;
+ int rc;
+
+ /* Enable L3-cache */
+ l3ctrl = ioremap(0x2000000000ULL, SZ_4M);
+ if (l3ctrl) {
+ rc = l3_set_pstate(l3ctrl, 0x3, 0xc);
+ if (rc < 0)
+ pr_warn("axxia: Failed to intialize L3-cache\n");
+ iounmap(l3ctrl);
+ } else {
+ pr_warn("axxia: Failed to map L3-cache control regs\n");
+ }
+
of_platform_populate(NULL, of_default_bus_match_table,
axxia_auxdata_lookup, NULL);
pm_power_off = NULL; /* TBD */
@@ -228,7 +271,7 @@ void __init axxia_dt_init(void)
axxia_pcie_init();
- axxia_ddr_retention_init();
+ axxia_ddr_retention_init();
}
static void axxia_restart(char str, const char *cmd)
--
1.8.3.4
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