From: Heikki Krogerus <heikki.kroge...@linux.intel.com>
DMA engines usually expect the fifo trigger level to be
aligned with the burst size. It should not be changed even
with small baud rates. This will fix an issue with
Designware DMA engine where the data can not be transferred
over UART with lower baud rates then 2400.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
(cherry picked from commit 2797f6fb6727d8ac5127f88aee1fd059db0be24b)
Signed-off-by: Maurice Petallo <mauricex.r.peta...@intel.com>
---
drivers/tty/serial/8250/8250_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_core.c
b/drivers/tty/serial/8250/8250_core.c
index 86c00b1c..d2bd6bf 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -2322,7 +2322,7 @@ serial8250_do_set_termios(struct uart_port *port, struct
ktermios *termios,
if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
fcr = uart_config[port->type].fcr;
- if (baud < 2400 || fifo_bug) {
+ if ((baud < 2400 && !up->dma) || fifo_bug) {
fcr &= ~UART_FCR_TRIGGER_MASK;
fcr |= UART_FCR_TRIGGER_1;
}
--
1.7.10.4
--
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