From: John Jacques <john.jacq...@lsi.com>

---
 arch/arm/boot/dts/Makefile              |    5 +
 arch/arm/boot/dts/axm-sim.dts           |  403 -------------------------------
 arch/arm/boot/dts/axm-ve-tc1.dts        |  363 ----------------------------
 arch/arm/boot/dts/axm-ve-tc2.dts        |  174 -------------
 arch/arm/boot/dts/axm5504-emu.dts       |   44 ++++
 arch/arm/boot/dts/axm5504-emulation.dts |   44 ----
 arch/arm/boot/dts/axm5507-cpus.dtsi     |   73 ++++++
 arch/arm/boot/dts/axm5507-emu.dts       |   44 ++++
 arch/arm/boot/dts/axm5516-sim.dts       |  127 ++++++++++
 arch/powerpc/boot/dts/acp25xx.dts       |    2 +-
 arch/powerpc/boot/dts/acp342x.dts       |    2 +-
 arch/powerpc/boot/dts/acp344x.dts       |    2 +-
 arch/powerpc/boot/dts/acp35xx.dts       |    2 +-
 13 files changed, 297 insertions(+), 988 deletions(-)
 delete mode 100644 arch/arm/boot/dts/axm-sim.dts
 delete mode 100644 arch/arm/boot/dts/axm-ve-tc1.dts
 delete mode 100644 arch/arm/boot/dts/axm-ve-tc2.dts
 create mode 100644 arch/arm/boot/dts/axm5504-emu.dts
 delete mode 100644 arch/arm/boot/dts/axm5504-emulation.dts
 create mode 100644 arch/arm/boot/dts/axm5507-cpus.dtsi
 create mode 100644 arch/arm/boot/dts/axm5507-emu.dts
 create mode 100644 arch/arm/boot/dts/axm5516-sim.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index dbd0158..5d73aba 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -220,6 +220,11 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
        wm8505-ref.dtb \
        wm8650-mid.dtb \
        wm8850-w70v2.dtb
+dtb-$(CONFIG_ARCH_AXXIA) += axm5504-sim.dtb \
+       axm5516-sim.dtb \
+       axm5504-emu.dtb \
+       axm5507-emu.dtb \
+       axm5516-amarillo.dtb
 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
        zynq-zc706.dtb
 
diff --git a/arch/arm/boot/dts/axm-sim.dts b/arch/arm/boot/dts/axm-sim.dts
deleted file mode 100644
index bb46808..0000000
--- a/arch/arm/boot/dts/axm-sim.dts
+++ /dev/null
@@ -1,403 +0,0 @@
-/*
- * arch/arm/boot/dts/axm-sim.dts
- *
- * Copyright (C) 2012 LSI
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-/dts-v1/;
-
-/ {
-       model = "AXM5516";
-       compatible = "arm", "lsi,axm5516";
-       interrupt-parent = <&gic>;
-       #address-cells = <2>;
-       #size-cells = <2>;
-
-       chosen { };
-
-       aliases {
-               serial0 = &axxia_serial0;
-               serial1 = &axxia_serial1;
-               serial2 = &axxia_serial2;
-               serial3 = &axxia_serial3;
-               timer   = &axxia_timers;
-       };
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-               };
-
-               cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <1>;
-               };
-
-               cpu@2 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <2>;
-               };
-
-               cpu@3 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <3>;
-               };
-
-               cpu@4 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <4>;
-               };
-
-               cpu@5 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <5>;
-               };
-
-               cpu@6 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <6>;
-               };
-
-               cpu@7 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <7>;
-               };
-
-               cpu@8 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <8>;
-               };
-
-               cpu@9 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <9>;
-               };
-
-               cpu@10 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <10>;
-               };
-
-               cpu@11 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <11>;
-               };
-
-               cpu@12 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <12>;
-               };
-
-               cpu@13 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <13>;
-               };
-
-               cpu@14 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <14>;
-               };
-
-               cpu@15 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <15>;
-               };
-       };
-
-       memory@00000000 {
-               device_type = "memory";
-               reg = <0 0x00000000 0 0x40000000>;
-       };
-
-       gic: interrupt-controller@2001001000 {
-               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-               #interrupt-cells = <3>;
-               #address-cells = <0>;
-               interrupt-controller;
-               reg = <0x20 0x01001000 0 0x1000>,  /* gic dist base */
-                     <0x20 0x01002000 0 0x100>,   /* gic cpu base */
-                     <0x20 0x10030000 0 0x100>,   /* axm IPI mask reg base */
-                     <0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */
-       };
-
-       timer {
-               compatible = "arm,armv7-timer";
-               interrupts = <1 13 0xf08>,
-                            <1 14 0xf08>;
-       };
-
-
-       gpdma@2020140000 {
-               compatible = "lsi,dma32";
-               reg = <0x20 0x20140000 0x00 0x1000>;
-               interrupts = <0 60 4>, /* busy */
-                            <0 61 4>; /* error */
-
-               channel0 {
-                       interrupts = <0 62 4>;
-               };
-
-               channel1 {
-                       interrupts = <0 63 4>;
-               };
-       };
-
-       gpdma@2020141000 {
-               status = "disabled";
-               compatible = "lsi,dma32";
-               reg = <0x20 0x20141000 0x00 0x1000>;
-               interrupts = <0 64 4>, /* busy */
-                            <0 65 4>; /* error */
-
-               channel0 {
-                       interrupts = <0 66 4>;
-               };
-
-               channel1 {
-                       interrupts = <0 67 4>;
-               };
-       };
-
-       gpreg@2010094000  {
-               compatible = "lsi,gpreg";
-               reg = <0x20 0x10094000 0 0x1000>;
-       };
-
-       ethernet@201100000000 {
-               compatible = "smsc,lan91c111";
-               device_type = "network";
-               reg = <0x20 0x11000000 0 0x10000>;
-               interrupts = <0 1 4>;
-               phy-mode = "mii";
-               reg-io-width = <4>;
-               smsc,irq-active-high;
-               smsc,irq-push-pull;
-       };
-
-        amba {
-               compatible = "arm,amba-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               mmci@020101E0000 {
-                       compatible = "arm,pl180", "arm,primecell";
-                       reg = <0x20 0x101E0000 0x00 0x1000>;
-                       interrupts = <0 222 4>,
-                                    <0 223 4>;
-               };
-
-               axxia_serial0: uart@2010080000 {
-                       compatible = "arm,pl011", "arm,primecell";
-                       reg = <0x20 0x10080000 0x00 0x1000>;
-                       interrupts = <0 56 4>;
-               };
-
-               axxia_serial1: uart@2010081000 {
-                       compatible = "arm,pl011", "arm,primecell";
-                       reg = <0x20 0x10081000 0x00 0x1000>;
-                       interrupts = <0 57 4>;
-               };
-
-               axxia_serial2: uart@2010082000 {
-                       compatible = "arm,pl011", "arm,primecell";
-                       reg = <0x20 0x10082000 0x00 0x1000>;
-                       interrupts = <0 58 4>;
-               };
-
-               axxia_serial3: uart@2010083000 {
-                       compatible = "arm,pl011", "arm,primecell";
-                       reg = <0x20 0x10083000 0x00 0x1000>;
-                       interrupts = <0 59 4>;
-               };
-
-               axxia_timers: timer@2010091000 {
-                       compatible = "arm,sp804", "arm,primecell";
-                       reg = <0x20 0x10091000 0 0x1000>;
-                       interrupts = <0 47 4>,
-                                    <0 48 4>,
-                                    <0 49 4>,
-                                    <0 50 4>,
-                                    <0 51 4>,
-                                    <0 52 4>,
-                                    <0 53 4>,
-                                    <0 54 4>;
-               };
-
-               gpio@2010092000 {
-                       compatible = "arm,pl061", "arm,primecell";
-                       reg = <0x20 0x10092000 0 0x1000>;
-                       interrupts = <0 10 4>,
-                                    <0 11 4>,
-                                    <0 12 4>,
-                                    <0 13 4>,
-                                    <0 14 4>,
-                                    <0 15 4>,
-                                    <0 16 4>,
-                                    <0 17 4>;
-               };
-
-               gpio@2010093000 {
-                       compatible = "arm,pl061", "arm,primecell";
-                       reg = <0x20 0x10093000 0x00 0x1000>;
-                       interrupts = <0 18 4>;
-               };
-
-               ssp@2010088000 {
-                       compatible = "arm,pl022", "arm,primecell";
-                       reg = <0x20 0x10088000 0x00 0x1000>;
-                       interrupts = <0 42 4>;
-               };
-
-       };
-
-    PCIE0: pciex@0xf0120000 {
-                compatible = "lsi,plb-pciex";
-                device_type = "pci";
-                enabled = <0>;
-                plx = <0>;
-                primary;
-                port = <0>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                /* config space access MPAGE7 registers*/
-                reg = < 0x30 0x38000000 0x0 0x01000000
-                0x20 0x20120000 0x0 0x00008000 >;
-                bus-range = <0 0x0f>;
-                /* Outbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > 
*
-/
-                ranges = <0x03000000 0x00000000 0xa0000000
-                          0x30 0x00000000
-                          0x00 0x10000000>;
-                /* Inbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
-                dma-ranges = <0x03000000 0x00000000 0xa0000000
-                              0x00 0x00000000
-                              0x00 0x10000000>;
-                    interrupt-parent = <&gic>;
-                interrupts = <29 2>;
-                interrupt-map-mask = <0000 0 0 7>;
-                interrupt-map = <
-                        /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> 
*/
-                        0000 0 0 1 &gic 29 2
-                        0000 0 0 2 &gic 29 2
-                        0000 0 0 3 &gic 29 2
-                        0000 0 0 4 &gic 29 2
-                >;
-        };
-
-        PCIE1: pciex@0xf0128000 {
-                compatible = "lsi,plb-pciex";
-                device_type = "pci";
-                enabled = <0>;
-                plx = <0>;
-                primary;
-                port = <1>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                /* config space access MPAGE7 registers*/
-                reg = <0x30 0x78000000 0x0 0x01000000
-                       0x20 0x20128000 0x0 0x00008000 >;
-                bus-range = <0 0x0f>;
-                /* Outbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > 
*/
-                ranges = <0x03000000 0x00000000 0xa0000000
-                          0x30 0x40000000
-                          0x00 0x10000000>;
-                /* Inbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
-                dma-ranges = <0x03000000 0x00000000 0xb0000000
-                             0x00 0x00000000
-                              0x00 0x10000000>;
-                interrupt-parent = <&gic>;
-                interrupts = <72 2>;
-                interrupt-map-mask = <0000 0 0 7>;
-                interrupt-map = <
-                        /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> 
*/
-                        0000 0 0 1 &gic 72 2
-                        0000 0 0 2 &gic 72 2
-                        0000 0 0 3 &gic 72 2
-                        0000 0 0 4 &gic 72 2
-                >;
-        };
-
-        PCIE2: pciex@0xf0130000 {
-                compatible = "lsi,plb-pciex";
-                device_type = "pci";
-                enabled = <0>;
-                plx = <0>;
-                primary;
-                port = <2>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                /* config space access MPAGE7 registers*/
-                reg = <0x30 0xb8000000 0x0 0x01000000
-                       0x20 0x20130000 0x0 0x00008000 >;
-                bus-range = <0 0x0f>;
-                /* Outbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU (PLB) addr> <2-cell size> > 
*/
-                ranges = <0x03000000 0x00000000 0xa0000000
-                          0x30 0x80000000
-                          0x00 0x10000000>;
-                /* Inbound ranges */
-                /* < <3-cell PCI addr> <2-cell CPU addr> <2-cell size> > */
-                dma-ranges = <0x03000000 0x00000000 0xc0000000
-                              0x00 0x00000000
-                              0x00 0x10000000>;
-
-                interrupt-parent = <&gic>;
-                interrupts = <73 2>;
-                interrupt-map-mask = <0000 0 0 7>;
-                interrupt-map = <
-                        /* <3-cell dev> <irq#> <prnt> <2-cell prnt IRQ/sense> 
*/
-                        0000 0 0 1 &gic 73 2
-                        0000 0 0 2 &gic 73 2
-                        0000 0 0 3 &gic 73 2
-                        0000 0 0 4 &gic 73 2
-                >;
-        };
-};
-
-/*
-  Local Variables:
-  mode: C
-  End:
-*/
diff --git a/arch/arm/boot/dts/axm-ve-tc1.dts b/arch/arm/boot/dts/axm-ve-tc1.dts
deleted file mode 100644
index a8939e8..0000000
--- a/arch/arm/boot/dts/axm-ve-tc1.dts
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * CoreTile Express A15x2 (version with Test Chip 1)
- * Cortex-A15 MPCore (V2P-CA15)
- *
- * HBI-0237A
- */
-
-/dts-v1/;
-
-/ {
-       model = "V2P-CA15";
-       arm,hbi = <0x237>;
-       compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", 
"arm,vexpress";
-       interrupt-parent = <&gic>;
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       chosen { };
-
-       aliases {
-               serial0 = &v2m_serial0;
-               serial1 = &v2m_serial1;
-               serial2 = &v2m_serial2;
-               serial3 = &v2m_serial3;
-               i2c0 = &v2m_i2c_dvi;
-               i2c1 = &v2m_i2c_pcie;
-       };
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-               };
-
-               cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <1>;
-               };
-       };
-
-       memory@80000000 {
-               device_type = "memory";
-               reg = <0x80000000 0x40000000>;
-       };
-
-       hdlcd@2b000000 {
-               compatible = "arm,hdlcd";
-               reg = <0x2b000000 0x1000>;
-               interrupts = <0 85 4>;
-       };
-
-       memory-controller@2b0a0000 {
-               compatible = "arm,pl341", "arm,primecell";
-               reg = <0x2b0a0000 0x1000>;
-       };
-
-       wdt@2b060000 {
-               compatible = "arm,sp805", "arm,primecell";
-               reg = <0x2b060000 0x1000>;
-               interrupts = <98>;
-       };
-
-       gic: interrupt-controller@2c001000 {
-               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-               #interrupt-cells = <3>;
-               #address-cells = <0>;
-               interrupt-controller;
-               reg = <0x2c001000 0x1000>,
-                     <0x2c002000 0x100>;
-       };
-
-       memory-controller@7ffd0000 {
-               compatible = "arm,pl354", "arm,primecell";
-               reg = <0x7ffd0000 0x1000>;
-               interrupts = <0 86 4>,
-                            <0 87 4>;
-       };
-
-       dma@7ffb0000 {
-               compatible = "arm,pl330", "arm,primecell";
-               reg = <0x7ffb0000 0x1000>;
-               interrupts = <0 92 4>,
-                            <0 88 4>,
-                            <0 89 4>,
-                            <0 90 4>,
-                            <0 91 4>;
-       };
-
-       timer {
-               compatible = "arm,armv7-timer";
-               interrupts = <1 13 0xf08>,
-                            <1 14 0xf08>;
-       };
-
-       pmu {
-               compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
-               interrupts = <0 68 4>,
-                            <0 69 4>;
-       };
-
-       motherboard {
-               ranges = <0 0 0x08000000 0x04000000>,
-                        <1 0 0x14000000 0x04000000>,
-                        <2 0 0x18000000 0x04000000>,
-                        <3 0 0x1c000000 0x04000000>,
-                        <4 0 0x0c000000 0x04000000>,
-                        <5 0 0x10000000 0x04000000>;
-
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0  0 4>,
-                               <0 0  1 &gic 0  1 4>,
-                               <0 0  2 &gic 0  2 4>,
-                               <0 0  3 &gic 0  3 4>,
-                               <0 0  4 &gic 0  4 4>,
-                               <0 0  5 &gic 0  5 4>,
-                               <0 0  6 &gic 0  6 4>,
-                               <0 0  7 &gic 0  7 4>,
-                               <0 0  8 &gic 0  8 4>,
-                               <0 0  9 &gic 0  9 4>,
-                               <0 0 10 &gic 0 10 4>,
-                               <0 0 11 &gic 0 11 4>,
-                               <0 0 12 &gic 0 12 4>,
-                               <0 0 13 &gic 0 13 4>,
-                               <0 0 14 &gic 0 14 4>,
-                               <0 0 15 &gic 0 15 4>,
-                               <0 0 16 &gic 0 16 4>,
-                               <0 0 17 &gic 0 17 4>,
-                               <0 0 18 &gic 0 18 4>,
-                               <0 0 19 &gic 0 19 4>,
-                               <0 0 20 &gic 0 20 4>,
-                               <0 0 21 &gic 0 21 4>,
-                               <0 0 22 &gic 0 22 4>,
-                               <0 0 23 &gic 0 23 4>,
-                               <0 0 24 &gic 0 24 4>,
-                               <0 0 25 &gic 0 25 4>,
-                               <0 0 26 &gic 0 26 4>,
-                               <0 0 27 &gic 0 27 4>,
-                               <0 0 28 &gic 0 28 4>,
-                               <0 0 29 &gic 0 29 4>,
-                               <0 0 30 &gic 0 30 4>,
-                               <0 0 31 &gic 0 31 4>,
-                               <0 0 32 &gic 0 32 4>,
-                               <0 0 33 &gic 0 33 4>,
-                               <0 0 34 &gic 0 34 4>,
-                               <0 0 35 &gic 0 35 4>,
-                               <0 0 36 &gic 0 36 4>,
-                               <0 0 37 &gic 0 37 4>,
-                               <0 0 38 &gic 0 38 4>,
-                               <0 0 39 &gic 0 39 4>,
-                               <0 0 40 &gic 0 40 4>,
-                               <0 0 41 &gic 0 41 4>,
-                               <0 0 42 &gic 0 42 4>;
-       };
-};
-
-/*
- * ARM Ltd. Versatile Express
- *
- * Motherboard Express uATX
- * V2M-P1
- *
- * HBI-0190D
- *
- * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
- * Technical Reference Manual)
- *
- * WARNING! The hardware described in this file is independent from the
- * original variant (vexpress-v2m.dtsi), but there is a strong
- * correspondence between the two configurations.
- *
- * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
- * CHANGES TO vexpress-v2m.dtsi!
- */
-
-/ {
-       aliases {
-               arm,v2m_timer = &v2m_timer01;
-       };
-
-       motherboard {
-               compatible = "simple-bus";
-               arm,v2m-memory-map = "rs1";
-               #address-cells = <2>; /* SMB chipselect number and offset */
-               #size-cells = <1>;
-               #interrupt-cells = <1>;
-
-               flash@0,00000000 {
-                       compatible = "arm,vexpress-flash", "cfi-flash";
-                       reg = <0 0x00000000 0x04000000>,
-                             <4 0x00000000 0x04000000>;
-                       bank-width = <4>;
-               };
-
-               psram@1,00000000 {
-                       compatible = "arm,vexpress-psram", "mtd-ram";
-                       reg = <1 0x00000000 0x02000000>;
-                       bank-width = <4>;
-               };
-
-               vram@2,00000000 {
-                       compatible = "arm,vexpress-vram";
-                       reg = <2 0x00000000 0x00800000>;
-               };
-
-               ethernet@2,02000000 {
-                       compatible = "smsc,lan9118", "smsc,lan9115";
-                       reg = <2 0x02000000 0x10000>;
-                       interrupts = <15>;
-                       phy-mode = "mii";
-                       reg-io-width = <4>;
-                       smsc,irq-active-high;
-                       smsc,irq-push-pull;
-               };
-
-               usb@2,03000000 {
-                       compatible = "nxp,usb-isp1761";
-                       reg = <2 0x03000000 0x20000>;
-                       interrupts = <16>;
-                       port1-otg;
-               };
-
-               iofpga@3,00000000 {
-                       compatible = "arm,amba-bus", "simple-bus";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0 3 0 0x200000>;
-
-                       sysreg@010000 {
-                               compatible = "arm,vexpress-sysreg";
-                               reg = <0x010000 0x1000>;
-                       };
-
-                       sysctl@020000 {
-                               compatible = "arm,sp810", "arm,primecell";
-                               reg = <0x020000 0x1000>;
-                       };
-
-                       /* PCI-E I2C bus */
-                       v2m_i2c_pcie: i2c@030000 {
-                               compatible = "arm,versatile-i2c";
-                               reg = <0x030000 0x1000>;
-
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               pcie-switch@60 {
-                                       compatible = "idt,89hpes32h8";
-                                       reg = <0x60>;
-                               };
-                       };
-
-                       aaci@040000 {
-                               compatible = "arm,pl041", "arm,primecell";
-                               reg = <0x040000 0x1000>;
-                               interrupts = <11>;
-                       };
-
-                       mmci@050000 {
-                               compatible = "arm,pl180", "arm,primecell";
-                               reg = <0x050000 0x1000>;
-                               interrupts = <9 10>;
-                       };
-
-                       kmi@060000 {
-                               compatible = "arm,pl050", "arm,primecell";
-                               reg = <0x060000 0x1000>;
-                               interrupts = <12>;
-                       };
-
-                       kmi@070000 {
-                               compatible = "arm,pl050", "arm,primecell";
-                               reg = <0x070000 0x1000>;
-                               interrupts = <13>;
-                       };
-
-                       v2m_serial0: uart@090000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x090000 0x1000>;
-                               interrupts = <5>;
-                       };
-
-                       v2m_serial1: uart@0a0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0a0000 0x1000>;
-                               interrupts = <6>;
-                       };
-
-                       v2m_serial2: uart@0b0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0b0000 0x1000>;
-                               interrupts = <7>;
-                       };
-
-                       v2m_serial3: uart@0c0000 {
-                               compatible = "arm,pl011", "arm,primecell";
-                               reg = <0x0c0000 0x1000>;
-                               interrupts = <8>;
-                       };
-
-                       wdt@0f0000 {
-                               compatible = "arm,sp805", "arm,primecell";
-                               reg = <0x0f0000 0x1000>;
-                               interrupts = <0>;
-                       };
-
-                       v2m_timer01: timer@110000 {
-                               compatible = "arm,sp804", "arm,primecell";
-                               reg = <0x110000 0x1000>;
-                               interrupts = <2>;
-                       };
-
-                       v2m_timer23: timer@120000 {
-                               compatible = "arm,sp804", "arm,primecell";
-                               reg = <0x120000 0x1000>;
-                       };
-
-                       /* DVI I2C bus */
-                       v2m_i2c_dvi: i2c@160000 {
-                               compatible = "arm,versatile-i2c";
-                               reg = <0x160000 0x1000>;
-
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               dvi-transmitter@39 {
-                                       compatible = "sil,sii9022-tpi", 
"sil,sii9022";
-                                       reg = <0x39>;
-                               };
-
-                               dvi-transmitter@60 {
-                                       compatible = "sil,sii9022-cpi", 
"sil,sii9022";
-                                       reg = <0x60>;
-                               };
-                       };
-
-                       rtc@170000 {
-                               compatible = "arm,pl031", "arm,primecell";
-                               reg = <0x170000 0x1000>;
-                               interrupts = <4>;
-                       };
-
-                       compact-flash@1a0000 {
-                               compatible = "arm,vexpress-cf", "ata-generic";
-                               reg = <0x1a0000 0x100
-                                      0x1a0100 0xf00>;
-                               reg-shift = <2>;
-                       };
-
-                       clcd@1f0000 {
-                               compatible = "arm,pl111", "arm,primecell";
-                               reg = <0x1f0000 0x1000>;
-                               interrupts = <14>;
-                       };
-               };
-       };
-};
diff --git a/arch/arm/boot/dts/axm-ve-tc2.dts b/arch/arm/boot/dts/axm-ve-tc2.dts
deleted file mode 100644
index fbd741e..0000000
--- a/arch/arm/boot/dts/axm-ve-tc2.dts
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * CoreTile Express A15x2 A7x3
- * Cortex-A15_A7 MPCore (V2P-CA15_A7)
- *
- * This DTB describes the big (A15x2) cluster only!
- * Make sure that you have the following lines in your board.txt:
- *
- *     SCC: 0x018 0x00001FFF
- *     SCC: 0x700 0x00320003
- *
- * HBI-0249A
- */
-
-/dts-v1/;
-
-/ {
-       model = "V2P-CA15_CA7";
-       arm,hbi = <0x249>;
-       compatible = "arm,vexpress,v2p-ca15_ca7,big", 
"arm,vexpress,v2p-ca15_ca7", "arm,vexpress";
-       interrupt-parent = <&gic>;
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       chosen { };
-
-       aliases {
-               serial0 = &v2m_serial0;
-               serial1 = &v2m_serial1;
-               serial2 = &v2m_serial2;
-               serial3 = &v2m_serial3;
-               i2c0 = &v2m_i2c_dvi;
-               i2c1 = &v2m_i2c_pcie;
-       };
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-               };
-
-               cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <1>;
-               };
-       };
-
-       memory@80000000 {
-               device_type = "memory";
-               reg = <0x80000000 0x40000000>;
-       };
-
-       wdt@2a490000 {
-               compatible = "arm,sp805", "arm,primecell";
-               reg = <0x2a490000 0x1000>;
-               interrupts = <98>;
-       };
-
-       hdlcd@2b000000 {
-               compatible = "arm,hdlcd";
-               reg = <0x2b000000 0x1000>;
-               interrupts = <0 85 4>;
-       };
-
-       memory-controller@2b0a0000 {
-               compatible = "arm,pl341", "arm,primecell";
-               reg = <0x2b0a0000 0x1000>;
-       };
-
-       gic: interrupt-controller@2c001000 {
-               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-               #interrupt-cells = <3>;
-               #address-cells = <0>;
-               interrupt-controller;
-               reg = <0x2c001000 0x1000>,
-                     <0x2c002000 0x1000>,
-                     <0x2c004000 0x2000>,
-                     <0x2c006000 0x2000>;
-               interrupts = <1 9 0xf04>;
-       };
-
-       memory-controller@7ffd0000 {
-               compatible = "arm,pl354", "arm,primecell";
-               reg = <0x7ffd0000 0x1000>;
-               interrupts = <0 86 4>,
-                            <0 87 4>;
-       };
-
-       dma@7ffb0000 {
-               compatible = "arm,pl330", "arm,primecell";
-               reg = <0x7ff00000 0x1000>;
-               interrupts = <0 92 4>,
-                            <0 88 4>,
-                            <0 89 4>,
-                            <0 90 4>,
-                            <0 91 4>;
-       };
-
-       timer {
-               compatible = "arm,armv7-timer";
-               interrupts = <1 13 0xf08>,
-                            <1 14 0xf08>,
-                            <1 11 0xf08>,
-                            <1 10 0xf08>;
-       };
-
-       pmu {
-               compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
-               interrupts = <0 68 4>,
-                            <0 69 4>;
-       };
-
-       motherboard {
-               ranges = <0 0 0x08000000 0x04000000>,
-                        <1 0 0x14000000 0x04000000>,
-                        <2 0 0x18000000 0x04000000>,
-                        <3 0 0x1c000000 0x04000000>,
-                        <4 0 0x0c000000 0x04000000>,
-                        <5 0 0x10000000 0x04000000>;
-
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0  0 4>,
-                               <0 0  1 &gic 0  1 4>,
-                               <0 0  2 &gic 0  2 4>,
-                               <0 0  3 &gic 0  3 4>,
-                               <0 0  4 &gic 0  4 4>,
-                               <0 0  5 &gic 0  5 4>,
-                               <0 0  6 &gic 0  6 4>,
-                               <0 0  7 &gic 0  7 4>,
-                               <0 0  8 &gic 0  8 4>,
-                               <0 0  9 &gic 0  9 4>,
-                               <0 0 10 &gic 0 10 4>,
-                               <0 0 11 &gic 0 11 4>,
-                               <0 0 12 &gic 0 12 4>,
-                               <0 0 13 &gic 0 13 4>,
-                               <0 0 14 &gic 0 14 4>,
-                               <0 0 15 &gic 0 15 4>,
-                               <0 0 16 &gic 0 16 4>,
-                               <0 0 17 &gic 0 17 4>,
-                               <0 0 18 &gic 0 18 4>,
-                               <0 0 19 &gic 0 19 4>,
-                               <0 0 20 &gic 0 20 4>,
-                               <0 0 21 &gic 0 21 4>,
-                               <0 0 22 &gic 0 22 4>,
-                               <0 0 23 &gic 0 23 4>,
-                               <0 0 24 &gic 0 24 4>,
-                               <0 0 25 &gic 0 25 4>,
-                               <0 0 26 &gic 0 26 4>,
-                               <0 0 27 &gic 0 27 4>,
-                               <0 0 28 &gic 0 28 4>,
-                               <0 0 29 &gic 0 29 4>,
-                               <0 0 30 &gic 0 30 4>,
-                               <0 0 31 &gic 0 31 4>,
-                               <0 0 32 &gic 0 32 4>,
-                               <0 0 33 &gic 0 33 4>,
-                               <0 0 34 &gic 0 34 4>,
-                               <0 0 35 &gic 0 35 4>,
-                               <0 0 36 &gic 0 36 4>,
-                               <0 0 37 &gic 0 37 4>,
-                               <0 0 38 &gic 0 38 4>,
-                               <0 0 39 &gic 0 39 4>,
-                               <0 0 40 &gic 0 40 4>,
-                               <0 0 41 &gic 0 41 4>,
-                               <0 0 42 &gic 0 42 4>;
-       };
-};
-
-/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/arch/arm/boot/dts/axm5504-emu.dts 
b/arch/arm/boot/dts/axm5504-emu.dts
new file mode 100644
index 0000000..9ddce7d
--- /dev/null
+++ b/arch/arm/boot/dts/axm5504-emu.dts
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/boot/dts/axm5504-emulation.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5504-cpus.dtsi"
+
+/ {
+       model = "Emulation Platform AXM55xx";
+       compatible = "lsi,axm5516-emulation", "lsi,axm5516";
+
+       memory {
+               device_type = "memory";
+               reg = <0 0x00000000 0 0x10000000>;
+       };
+};
+
+&femac {
+       status = "okay";
+       phy-address = <0x03>;
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&gpio0 {
+       status = "okay";
+};
+
+&gpio1 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5504-emulation.dts 
b/arch/arm/boot/dts/axm5504-emulation.dts
deleted file mode 100644
index 9ddce7d..0000000
--- a/arch/arm/boot/dts/axm5504-emulation.dts
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * arch/arm/boot/dts/axm5504-emulation.dts
- *
- * Copyright (C) 2013 LSI
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-/dts-v1/;
-
-/memreserve/ 0x00000000 0x00400000;
-
-/include/ "axm55xx.dtsi"
-/include/ "axm5504-cpus.dtsi"
-
-/ {
-       model = "Emulation Platform AXM55xx";
-       compatible = "lsi,axm5516-emulation", "lsi,axm5516";
-
-       memory {
-               device_type = "memory";
-               reg = <0 0x00000000 0 0x10000000>;
-       };
-};
-
-&femac {
-       status = "okay";
-       phy-address = <0x03>;
-};
-
-&serial0 {
-       status = "okay";
-};
-
-&gpio0 {
-       status = "okay";
-};
-
-&gpio1 {
-       status = "okay";
-};
diff --git a/arch/arm/boot/dts/axm5507-cpus.dtsi 
b/arch/arm/boot/dts/axm5507-cpus.dtsi
new file mode 100644
index 0000000..a32372b
--- /dev/null
+++ b/arch/arm/boot/dts/axm5507-cpus.dtsi
@@ -0,0 +1,73 @@
+/*
+ * arch/arm/boot/dts/axm5508-cpus.dtsi
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/ {
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x00>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x01>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x02>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x03>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@4 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x04>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@5 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x05>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+
+               cpu@6 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0x06>;
+                       cpu-release-addr = <0>; // Fixed by the boot loader
+                       clock-frequency = <0>;  // Placeholder
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/axm5507-emu.dts 
b/arch/arm/boot/dts/axm5507-emu.dts
new file mode 100644
index 0000000..201f3af
--- /dev/null
+++ b/arch/arm/boot/dts/axm5507-emu.dts
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/boot/dts/axm5504-emulation.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5507-cpus.dtsi"
+
+/ {
+       model = "Emulation Platform AXM55xx";
+       compatible = "lsi,axm5516-emulation", "lsi,axm5516";
+
+       memory {
+               device_type = "memory";
+               reg = <0 0x00000000 0 0x10000000>;
+       };
+};
+
+&femac {
+       status = "okay";
+       phy-address = <0x03>;
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&gpio0 {
+       status = "okay";
+};
+
+&gpio1 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/axm5516-sim.dts 
b/arch/arm/boot/dts/axm5516-sim.dts
new file mode 100644
index 0000000..e8cd01a
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-sim.dts
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/dts/axm5516-amarillo.dts
+ *
+ * Copyright (C) 2013 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00400000;
+
+/include/ "axm55xx.dtsi"
+/include/ "axm5516-cpus.dtsi"
+
+/ {
+       model = "Simulation Platform AXM55xx";
+       compatible = "lsi,axm5516-sim", "lsi,axm5516";
+
+       memory {
+               device_type = "memory";
+               reg = <0 0x00000000 0 0x40000000>;
+       };
+
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu {
+                       frequency = <1400000000>;
+               };
+
+               peripheral {
+                       frequency = <400000000>;
+               };
+
+               emmc {
+                       frequency = <25000000>;
+               };
+       };
+
+       sim {
+               compatible = "arm,amba-bus", "simple-bus";
+               device_type = "soc";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               interrupt-parent = <&gic>;
+               ranges;
+
+               mmci@020101E0000 {
+                       compatible = "arm,pl180", "arm,primecell";
+                       reg = <0x20 0x101E0000 0x00 0x1000>;
+                       interrupts = <0 222 4>,
+                                    <0 223 4>;
+               };
+
+               ethernet@201100000000 {
+                       compatible = "smsc,lan91c111";
+                       device_type = "network";
+                       reg = <0x20 0x11000000 0 0x10000>;
+                       interrupts = <0 1 4>;
+                       phy-mode = "mii";
+                       reg-io-width = <4>;
+                       smsc,irq-active-high;
+                       smsc,irq-push-pull;
+               };
+       };
+};
+
+&mtc {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
+
+&serial3 {
+       status = "okay";
+};
+
+&gpio0 {
+       status = "okay";
+};
+
+&gpio1 {
+       status = "okay";
+};
+
+&spics {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
diff --git a/arch/powerpc/boot/dts/acp25xx.dts 
b/arch/powerpc/boot/dts/acp25xx.dts
index b5463c5..9893cf9 100644
--- a/arch/powerpc/boot/dts/acp25xx.dts
+++ b/arch/powerpc/boot/dts/acp25xx.dts
@@ -290,7 +290,7 @@
                 #size-cells = <2>;
                 compatible = "axxia,rapidio-delta";
                 device_type = "rapidio";
-                reg = <0x0020 0x00560000 0x0 0x1000>; /* SRIO Conf 0 region */
+                reg = <0x0020 0x00560000 0x1000>; /* SRIO Conf 0 region */
                 ranges = <0x0 0x0 0x0021 0x00000000 0x0 0x40000000>;
                /*
                 linkdown-reset = <0x0200 0x100 0x0020 0x00430000 0x0 
0x000010000>;
diff --git a/arch/powerpc/boot/dts/acp342x.dts 
b/arch/powerpc/boot/dts/acp342x.dts
index 34f76eb..18814f9 100644
--- a/arch/powerpc/boot/dts/acp342x.dts
+++ b/arch/powerpc/boot/dts/acp342x.dts
@@ -291,7 +291,7 @@
                 #size-cells = <2>;
                 compatible = "axxia,rapidio-delta";
                 device_type = "rapidio";
-                reg = <0x0020 0x00420000 0x0 0x1000>; /* SRIO Conf 0 region */
+                reg = <0x0020 0x00420000 0x1000>; /* SRIO Conf 0 region */
                 ranges = <0x0 0x0 0x0020 0x80000000 0x0 0x40000000>;
                /*
                 linkdown-reset = <0x0200 0x100 0x0020 0x00430000 0x0 
0x000010000>;
diff --git a/arch/powerpc/boot/dts/acp344x.dts 
b/arch/powerpc/boot/dts/acp344x.dts
index 51fa547..2c25007 100644
--- a/arch/powerpc/boot/dts/acp344x.dts
+++ b/arch/powerpc/boot/dts/acp344x.dts
@@ -290,7 +290,7 @@
                 #size-cells = <2>;
                 compatible = "axxia,rapidio-delta";
                 device_type = "rapidio";
-                reg = <0x0020 0x00420000 0x0 0x1000>; /* SRIO Conf 0 region */
+                reg = <0x0020 0x00420000 0x1000>; /* SRIO Conf 0 region */
                 ranges = <0x0 0x0 0x0020 0x80000000 0x0 0x40000000>;
                /*
                 linkdown-reset = <0x0200 0x100 0x0020 0x00430000 0x0 
0x000010000>;
diff --git a/arch/powerpc/boot/dts/acp35xx.dts 
b/arch/powerpc/boot/dts/acp35xx.dts
index 6f37e45..4202cfa 100644
--- a/arch/powerpc/boot/dts/acp35xx.dts
+++ b/arch/powerpc/boot/dts/acp35xx.dts
@@ -401,7 +401,7 @@
                 #size-cells = <2>;
                 compatible = "axxia,rapidio-delta";
                 device_type = "rapidio";
-                reg = <0x0020 0x00560000 0x0 0x1000>; /* SRIO Conf 0 region */
+                reg = <0x0020 0x00560000 0x1000>; /* SRIO Conf 0 region */
                 ranges = <0x0 0x0 0x0021 0x00000000 0x0 0x40000000>;
                /*
                 linkdown-reset = <0x0200 0x100 0x0020 0x0040A000 0x0 
0x000010000>;
-- 
1.7.9.5

-- 
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