From: John Jacques <john.jacq...@lsi.com>
The Axxia boot loader leaves secondary cores in reset; Linux is expected
to enable them. This change makes that happen.
Signed-off-by: John Jacques <john.jacq...@lsi.com>
---
arch/arm/mach-axxia/platsmp.c | 23 ++++++++---------------
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-axxia/platsmp.c b/arch/arm/mach-axxia/platsmp.c
index a067de2..54fdcbf 100644
--- a/arch/arm/mach-axxia/platsmp.c
+++ b/arch/arm/mach-axxia/platsmp.c
@@ -40,7 +40,6 @@ __axxia_arch_wfe(void)
return;
}
-
EXPORT_SYMBOL(__axxia_arch_wfe);
/*
@@ -217,21 +216,15 @@ static void __init axxia_smp_prepare_cpus(unsigned int
max_cpus)
continue;
/*
- * Release all physical cpus when not in hyp mode since we
- * might want to bring them online later.
- *
- * Also we need to get the execution into kernel code (it's
- * currently executing in u-boot). u-boot releases the cores
- * from reset in hyp mode.
+ * Release all physical cpus since we might want to
+ * bring them online later.
*/
- if (!is_hyp_mode_available()) {
- if (cpu != 0) {
- u32 phys_cpu = cpu_logical_map(cpu);
- u32 tmp = readl(syscon + 0x1010);
- writel(0xab, syscon + 0x1000);
- tmp &= ~(1 << phys_cpu);
- writel(tmp, syscon + 0x1010);
- }
+ if (cpu != 0) {
+ u32 phys_cpu = cpu_logical_map(cpu);
+ u32 tmp = readl(syscon + 0x1010);
+ writel(0xab, syscon + 0x1000);
+ tmp &= ~(1 << phys_cpu);
+ writel(tmp, syscon + 0x1010);
}
if (cpu_count < max_cpus) {
--
1.7.9.5
--
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