From: Charlie Paul <cpaul.windri...@gmail.com> These files support the boot funtionality of the LSI axxia 5500 board.
Signed-off-by: Charlie Paul <cpaul.windri...@gmail.com> --- arch/arm/boot/Makefile | 3 + arch/arm/boot/compressed/head.S | 21 +++++- arch/arm/boot/emuboot/Makefile | 28 +++++++ arch/arm/boot/emuboot/emuboot.S | 147 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/emuboot/emuboot.lds | 30 ++++++++ arch/arm/boot/emuboot/pack.py | 10 +++ arch/arm/boot/fmboot/Makefile | 24 ++++++ arch/arm/boot/fmboot/fmboot.S | 79 ++++++++++++++++++++ arch/arm/boot/fmboot/fmboot.lds | 30 ++++++++ arch/arm/boot/fmboot/pack.py | 10 +++ 10 files changed, 379 insertions(+), 3 deletions(-) create mode 100644 arch/arm/boot/emuboot/Makefile create mode 100644 arch/arm/boot/emuboot/emuboot.S create mode 100644 arch/arm/boot/emuboot/emuboot.lds create mode 100644 arch/arm/boot/emuboot/pack.py create mode 100644 arch/arm/boot/fmboot/Makefile create mode 100644 arch/arm/boot/fmboot/fmboot.S create mode 100644 arch/arm/boot/fmboot/fmboot.lds create mode 100644 arch/arm/boot/fmboot/pack.py diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 6798e0f..386421b 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -53,6 +53,9 @@ $(obj)/compressed/vmlinux: $(obj)/Image FORCE $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(call if_changed,objcopy) +ifeq ($(MACHINE),arch/arm/mach-axxia/) + $(Q)$(MAKE) $(build)=$(obj)/fmboot $(obj)/linux.img +endif @$(kecho) ' Kernel: $@ is ready' endif diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 132c70e..dbabb02 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -140,6 +140,7 @@ start: mov r7, r1 @ save architecture ID mov r8, r2 @ save atags pointer +#ifndef __ARM_ARCH_2__ /* * Booting from Angel - need to enter SVC mode and disable * FIQs/IRQs (numeric definitions from angel arm.h source). @@ -154,7 +155,11 @@ start: not_angel: safe_svcmode_maskall r0 msr spsr_cxsf, r9 @ Save the CPU boot mode in - @ SPSR + @ SPSR +#else + teqp pc, #0x0c000003 @ turn off interrupts +#endif + /* * Note that some cache flushing and other stuff may * be needed here - is there an Angel SWI call for this? @@ -171,7 +176,12 @@ not_angel: @ determine final kernel image address mov r4, pc and r4, r4, #0xf8000000 +#ifdef CONFIG_ARCH_AXXIA + ldr r3, =TEXT_OFFSET + add r4, r4, r3 +#else add r4, r4, #TEXT_OFFSET +#endif #else ldr r4, =zreladdr #endif @@ -302,7 +312,12 @@ restart: adr r0, LC0 * of RAM and hope for the best. */ cmp r0, #1 +#ifdef CONFIG_ARCH_AXXIA + ldr r1, =TEXT_OFFSET + sub r0, r4, r1 +#else sub r0, r4, #TEXT_OFFSET +#endif bic r0, r0, #1 add r0, r0, #0x100 mov r1, r6 @@ -870,7 +885,7 @@ proc_types: W(b) __armv3_mpu_cache_on W(b) __armv3_mpu_cache_off W(b) __armv3_mpu_cache_flush - + .word 0x41009400 @ ARM94x .word 0xff00ff00 W(b) __armv4_mpu_cache_on @@ -1084,7 +1099,7 @@ __armv4_mpu_cache_flush: mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache mcr p15, 0, ip, c7, c10, 4 @ drain WB mov pc, lr - + __fa526_cache_flush: tst r4, #1 movne pc, lr diff --git a/arch/arm/boot/emuboot/Makefile b/arch/arm/boot/emuboot/Makefile new file mode 100644 index 0000000..3fdecdd --- /dev/null +++ b/arch/arm/boot/emuboot/Makefile @@ -0,0 +1,28 @@ +# Build an image for emulation. + +AS = $(CROSS_COMPILE)gcc -c +LD = $(CROSS_COMPILE)ld +OBJCOPY = $(CROSS_COMPILE)objcopy + +DTC = ../../../../scripts/dtc/dtc +DTS = ../dts/axm55xx.dts +IMAGE = ../zImage + +all: clean linux.img + +clean: + rm -f linux.img emuboot.o image.emu axm55xx.dtb + +linux.img: emuboot.o emuboot.lds image.emu + $(LD) -o linux.tmp --script=emuboot.lds + $(OBJCOPY) -O binary -R .note -R .comment -S linux.tmp $@ + rm -f linux.tmp + +image.emu: $(ZIMAGE) axm55xx.dtb + python pack.py $(IMAGE) axm55xx.dtb > $@ + +axm55xx.dtb: $(DTS) + $(DTC) -O dtb -o $@ $< + +emuboot.o: emuboot.S + $(AS) -o $@ $< diff --git a/arch/arm/boot/emuboot/emuboot.S b/arch/arm/boot/emuboot/emuboot.S new file mode 100644 index 0000000..cf1d2f6 --- /dev/null +++ b/arch/arm/boot/emuboot/emuboot.S @@ -0,0 +1,147 @@ +/* + * emuboot.S - simple register setup code for stand-alone Linux booting + * + * Copyright (C) 2011 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +#define SPIN_TABLE_BASE 0x10000000 + + .syntax unified + .text + +reset_exception: + b _start + +undefined_exception: + b undefined_exception + +supervisor_exception: + b supervisor_exception + +prefetch_abort: + b prefetch_abort + +data_abort: + b data_abort + +unused_exception: + b unused_exception + +irq_exception: + b irq_exception + +fiq_exception: + b fiq_exception + + .globl _start +_start: + @ + @ Program architected timer frequency + @ + mrc p15, 0, r0, c0, c1, 1 @ CPUID_EXT_PFR1 + lsr r0, r0, #16 + ands r0, r0, #1 @ Check generic timer support + beq 1f + @ldr r0, =6250000 @ 6.25 MHz timer frequency + ldr r0, =4096000 @ 4.096 MHz timer frequency + mcr p15, 0, r0, c14, c0, 0 @ CNTFRQ + + @ + @ CPU initialisation + @ +1: mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) + mov r1, r0 + and r0, r1,0x3 @ CPU number + cmp r0, #0 @ primary CPU in any cluster + bne actlr2_set + lsr r0, r1, #8 + ands r0, r0, #3 @ primary CPU in cluster 0 + beq primary + + @ + @ Secondary CPUs + @ + @ Set the L2ACTLR + @ +secondary: and r1, r1,0x3 @ CPU number + cmp r1, #0 + bne actlr2_set + + mrc p15, 1, r0, c15, c0, 0 @ L2ACTLR + @ Set bit 3 - disable clean/evict push to external + orr r0, r0, #(0x1 << 3) + @ Set bit 12 - disable multiple outstanding + @ WriteClean/WriteBack/Evicts using same AWID + orr r0, r0, #(0x1 << 12) + @ Set bit 13 - disable SharedClean data transfers + orr r0, r0, #(0x1 << 13) + @ Set bit 14 - enable UniqueClena evictions with data + orr r0, r0, #(0x1 << 14) + mcr p15, 1, r0, c15, c0, 0 + + @ + @ Set the ACTLR2 + @ + mrc p15, 1, r0, c15, c0, 4 + @ Set bit 0 - execute data cache clean as data cache clean/invalidate + orr r0, r0, #(0x1 << 0) + mcr p15, 1, r0, c15, c0, 4 + + @ + @ CPU initialisation + @ + mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) + and r0, r0, #15 @ CPU number + cmp r0, #0 @ primary CPU? + beq 2f + + @ + @ Secondary CPUs + @ + ldr r1, =SPIN_TABLE_BASE + adr r2, 1f + ldmia r2, {r3 - r7} @ move the code to a location + stmia r1, {r3 - r7} @ less likely to be overridden + add r0, r1, #0x20 @ Entry point for secondary + @ CPUs @ SPIN_TABLE_BASE+0x20 + mov r2, #0 + str r2, [r0, #0] @ ensure initially zero + mov pc, r1 @ branch to the relocated code +1: + wfe + ldr r1, [r0] + cmp r1, #0 + beq 1b + mov pc, r1 @ branch to the given address + + @ + @ Kernel parameters + @ +2: mov r0, #0 @ Must be zero + mov r1, #0 @ Machine type (not needed) + adr r2, atags @ ATAGS pointer + mov r3, #0 + ldr lr, =kernel + mov pc, lr @ jump to the kernel + + .org 0x100 +atags: + @ ATAG_CORE + .long 2 + .long 0x54410001 + + @ ATAG_CMDLINE + .long (1f - .) >> 2 + .long 0x54410009 + .asciz "root=/dev/nfs rw mem=1024M console=ttyAMA0 ip=dhcp" + + .align 2 + +1: + + @ ATAG_NONE + .long 0 + .long 0x00000000 diff --git a/arch/arm/boot/emuboot/emuboot.lds b/arch/arm/boot/emuboot/emuboot.lds new file mode 100644 index 0000000..38df9cd --- /dev/null +++ b/arch/arm/boot/emuboot/emuboot.lds @@ -0,0 +1,30 @@ +/* + * emuboot.lds + * + * Copyright (C) 2011 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +OUTPUT_FORMAT("elf32-littlearm") +OUTPUT_ARCH(arm) +TARGET(binary) + +INPUT(./emuboot.o) +INPUT(./image.emu) + +PHYS_OFFSET = 0x00000000; + +SECTIONS +{ + . = PHYS_OFFSET; + .text : { emuboot.o } + . = PHYS_OFFSET + 0x8000 - 0x0; + kernel = . + 0x0; + .kernel : { ./image.emu } + . = PHYS_OFFSET + 0x00800000; + filesystem = .; + .data : { *(.data) } + .bss : { *(.bss) } +} diff --git a/arch/arm/boot/emuboot/pack.py b/arch/arm/boot/emuboot/pack.py new file mode 100644 index 0000000..fe2ce70 --- /dev/null +++ b/arch/arm/boot/emuboot/pack.py @@ -0,0 +1,10 @@ +import sys + +while len(sys.argv) > 1: + f = open(sys.argv.pop(1), "rb") + f.seek(0, 2) + sz = f.tell() + f.seek(0,0) + pad = ((sz + 3) & ~3) - sz + sys.stdout.write(f.read() + '\0'*pad) + f.close() diff --git a/arch/arm/boot/fmboot/Makefile b/arch/arm/boot/fmboot/Makefile new file mode 100644 index 0000000..85216dd --- /dev/null +++ b/arch/arm/boot/fmboot/Makefile @@ -0,0 +1,24 @@ +# Build an image for Fast Models + +AS = $(CROSS_COMPILE)gcc -c +LD = $(CROSS_COMPILE)ld + +DTC = $(obj)/../../../../scripts/dtc/dtc +DTS = $(obj)/../dts/axm5504-sim-mmc.dts +ZIMAGE = $(obj)/../zImage + +clean: + rm -f $(obj)/../linux.img $(obj)/fmboot.o $(obj)/zImage.fm $(obj)/axm5504-sim.dtb + +arch/arm/boot/linux.img: $(obj)/fmboot.o $(srctree)/$(obj)/fmboot.lds $(obj)/zImage.fm + cd $(obj) && $(LD) -o ../linux.img --script=$(srctree)/$(obj)/fmboot.lds + tar jcf $(obj)/../linux.img.tar.bz2 $(obj)/../linux.img + +$(obj)/zImage.fm: $(ZIMAGE) $(obj)/axm5504-sim.dtb + python $(srctree)/$(obj)/pack.py $(ZIMAGE) $(obj)/axm5504-sim.dtb > $@ + +$(obj)/axm5504-sim.dtb: $(DTS) + $(DTC) -O dtb -o $@ $< + +$(obj)/fmboot.o: $(obj)/fmboot.S + $(AS) -o $@ $< diff --git a/arch/arm/boot/fmboot/fmboot.S b/arch/arm/boot/fmboot/fmboot.S new file mode 100644 index 0000000..e4a4cd0 --- /dev/null +++ b/arch/arm/boot/fmboot/fmboot.S @@ -0,0 +1,79 @@ +/* + * fmboot.S - simple register setup code for stand-alone Linux booting + * + * Copyright (C) 2011 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +#define SPIN_TABLE_BASE 0x10000000 + + .syntax unified + .text + + .globl _start +_start: + @ + @ Program architected timer frequency + @ + mrc p15, 0, r0, c0, c1, 1 @ CPUID_EXT_PFR1 + lsr r0, r0, #16 + ands r0, r0, #1 @ Check generic timer support + beq 1f + ldr r0, =100000000 @ 100MHz timer frequency + mcr p15, 0, r0, c14, c0, 0 @ CNTFRQ +1: + @ + @ CPU initialisation + @ + mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) + bic r0, #0xff000000 @ CPU number + cmp r0, #0 @ primary CPU? + beq 2f + + @ + @ Secondary CPUs + @ + ldr r1, =SPIN_TABLE_BASE + adr r2, 1f + ldmia r2, {r3 - r7} @ move the code to a location + stmia r1, {r3 - r7} @ less likely to be overridden + add r0, r1, #0x20 @ Entry point for secondary CPUs + @ SPIN_TABLE_BASE+0x20 + mov r2, #0 + str r2, [r0, #0] @ ensure initially zero + mov pc, r1 @ branch to the relocated code +1: + ldr r1, [r0] + cmp r1, #0 + beq 1b + mov pc, r1 @ branch to the given address + + @ + @ Kernel parameters + @ +2: mov r0, #0 @ Must be zero + mov r1, #0 @ Machine type (not needed) + adr r2, atags @ ATAGS pointer + mov r3, #0 + ldr lr, =kernel + mov pc, lr @ jump to the kernel + + .org 0x100 +atags: + @ ATAG_CORE + .long 2 + .long 0x54410001 + + @ ATAG_CMDLINE + .long (1f - .) >> 2 + .long 0x54410009 + .asciz "root=/dev/mmcblk0 rootwait ip=none mem=1024M console=ttyAMA0" + + .align 2 +1: + + @ ATAG_NONE + .long 0 + .long 0x00000000 diff --git a/arch/arm/boot/fmboot/fmboot.lds b/arch/arm/boot/fmboot/fmboot.lds new file mode 100644 index 0000000..8cde9f8 --- /dev/null +++ b/arch/arm/boot/fmboot/fmboot.lds @@ -0,0 +1,30 @@ +/* + * fmboot.lds + * + * Copyright (C) 2011 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ + +OUTPUT_FORMAT("elf32-littlearm") +OUTPUT_ARCH(arm) +TARGET(binary) + +INPUT(./fmboot.o) +INPUT(./zImage.fm) + +PHYS_OFFSET = 0x00000000; + +SECTIONS +{ + . = PHYS_OFFSET; + .text : { fmboot.o } + . = PHYS_OFFSET + 0x8000 - 0x0; + kernel = . + 0x0; + .kernel : { ./zImage.fm } + . = PHYS_OFFSET + 0x00800000; + filesystem = .; + .data : { *(.data) } + .bss : { *(.bss) } +} diff --git a/arch/arm/boot/fmboot/pack.py b/arch/arm/boot/fmboot/pack.py new file mode 100644 index 0000000..fe2ce70 --- /dev/null +++ b/arch/arm/boot/fmboot/pack.py @@ -0,0 +1,10 @@ +import sys + +while len(sys.argv) > 1: + f = open(sys.argv.pop(1), "rb") + f.seek(0, 2) + sz = f.tell() + f.seek(0,0) + pad = ((sz + 3) & ~3) - sz + sys.stdout.write(f.read() + '\0'*pad) + f.close() -- 1.7.9.5 -- _______________________________________________ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto