From: "Chai, Chong Yi" <chong.yi.c...@intel.com>

These patches are for enabling I2C features in Baytrail.
The patches are targeted to merge into Yocto-kernel-cache on branch yocto-3.14.


01/10 [
Author: Maurice Petallo
Email: mauricex.r.peta...@intel.com
Date: Tue, 17 Feb 2015 13:21:01 +0800
Subject: [PATCH 042/164] i2c: allow Designware I2C to be probed before SMBus
 for Baytrail

When SMBus is enabled in Baytrail, it is being probed first before
all the Designware I2C devices. This means SMBus will take the first
available bus id which is 0 and then the I2C devices will take the
next succeeding bus ids. This should be fine as long as the I2C
devices bus ids are assigned dynamically.

The problem arises when the I2C devices' bus ids are assigned
statically and the SMBus is probed first. The kernel will fail to
add the i2c adapter because something else, which in that case is
the SMBus, has taken the bus id that the i2c adapter is trying to
take.

As mentioned in commit "i2c: designware-pci: use static bus num
allocation for baytrail", it is required for I2C devices' bus ids
to be assigned statically for LPE Audio to register the i2c properly.

To resolve this, we either force the SMBus to take the next bus id
after all the designware I2C devices or we allow all the I2C devices
to be probed first before the SMBus. This patch implements the 2nd.

Signed-off-by: Maurice Petallo <mauricex.r.peta...@intel.com>
]

02/10 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:13:56 +0800
Subject: [PATCH 121/164] i2c: designware: cleanup irq handler setting

Disable irq and clear any pending interrupts both in PCI and platform
driver, do so before setting interrupt handler.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

03/10 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:05 +0800
Subject: [PATCH 122/164] i2c: designware: use hardware-provided Rx/Tx FIFO
 depths

i2c-designware module provides information about actual Rx/Tx FIFO
depths in COMP_PARAM1 register.

Current driver uses these hardware-provided values only in case of
non-ACPI platform device. For all other cases (which includes all
Bay Trail cases) hardcoded value of 32 is used instead - which leads to
suboptimal FIFO use.

This patch switches to using hardware-provided values in all cases.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

04/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:14 +0800
Subject: [PATCH 123/164] i2c: designware: use symbolic names for command bits

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

05/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:25 +0800
Subject: [PATCH 124/164] i2c: designware: cleanup __i2c_dw_enable()

- Do not write boolean value to register (and implicitly depend on match
  between boolean representation and register bit position).

- Do not implicitly depend on same bit position of enable bit in Enable
  and Enable Status registers.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

06/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:34 +0800
Subject: [PATCH 125/164] i2c: designware: explicitly abort running operation
 on disable

Failure to disable causes hard device hangs in some situations
involving timeouts.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

07/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:43 +0800
Subject: [PATCH 126/164] i2c: designware: improve FIFO performance

There is no need to catch interrupt after every byte transmitted or
received, as driver currently does. Hardware has deep FIFOs that allow
much less software intervention.

This patch reworks FIFO handling such that up to 3/4 of FIFO depth is
processed per one interrupt. This results into significant decrease of
number of interrupts and increase of performance.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

08/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:14:53 +0800
Subject: [PATCH 127/164] i2c: designware: add per-channel speed parameter and
 fast-plus speed option

This patch allows the I2C transfer speed to be configured via module
parameter for each channel available.

This patch also enable the Fast-mode Plus.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

09/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Wed, 29 Jul 2015 18:15:01 +0800
Subject: [PATCH 128/164] i2c: designware: add i2c high-speed support

This patch enable the High-speed mode.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]

10/10 [
Author: Wan Ahmad Zainie
From: wan.ahmad.zainie.wan.moha...@intel.com
Date: Fri, 21 Aug 2015 12:21:20 +0800
Subject: [PATCH 155/164] i2c: designware: Fix checkpatch.pl warnings

This commit is to fix the result of running scripts/checkpatch.pl against
0127-i2c-designware-add-per-channel-speed-parameter-and-f.patch

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]


Chai, Chong Yi (1):
  i2c: allow Designware I2C to be probed before SMBus for Baytrail

 features/soc/baytrail/baytrail.scc                 |  10 +
 ...esignware-I2C-to-be-probed-before-SMBus-f.patch |  54 ++++
 ...i2c-designware-Fix-checkpatch.pl-warnings.patch |  51 ++++
 ...i2c-designware-add-i2c-high-speed-support.patch | 234 +++++++++++++++
 ...are-add-per-channel-speed-parameter-and-f.patch | 331 +++++++++++++++++++++
 .../i2c-designware-cleanup-__i2c_dw_enable.patch   |  54 ++++
 ...2c-designware-cleanup-irq-handler-setting.patch |  53 ++++
 ...are-explicitly-abort-running-operation-on.patch |  70 +++++
 .../i2c-designware-improve-FIFO-performance.patch  | 137 +++++++++
 ...are-use-hardware-provided-Rx-Tx-FIFO-dept.patch | 220 ++++++++++++++
 ...nware-use-symbolic-names-for-command-bits.patch |  50 ++++
 11 files changed, 1264 insertions(+)
 create mode 100644 
features/soc/baytrail/i2c-allow-Designware-I2C-to-be-probed-before-SMBus-f.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-Fix-checkpatch.pl-warnings.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-add-i2c-high-speed-support.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-add-per-channel-speed-parameter-and-f.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-cleanup-__i2c_dw_enable.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-cleanup-irq-handler-setting.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-explicitly-abort-running-operation-on.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-improve-FIFO-performance.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-use-hardware-provided-Rx-Tx-FIFO-dept.patch
 create mode 100644 
features/soc/baytrail/i2c-designware-use-symbolic-names-for-command-bits.patch

-- 
1.9.1

-- 
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