From: "Chai, Chong Yi" <chong.yi.c...@intel.com>
These patches are to enable PINCTRL features in Baytrail.
The patches are targeted to merge into Yocto-kernel-cache on branch yocto-3.14.
1/4 [
Author: "Chew, Kean Ho"
Email: kean.ho.c...@intel.com
Date: Wed, 12 Feb 2014 04:20:41 -0500
Subject: [PATCH 015/164] pinctrl-baytrail: unmap interrupt when free the gpio
pin
In to_irq() callback, we create the hwirq to linux irq
mapping for the requested GPIO pin. Hence, we unamp
the mapping when the gpio pin is being released.
Signed-off-by: Chew, Kean Ho <kean.ho.c...@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.c...@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selva...@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.peta...@intel.com>
]
2/4 [
Author: "Chew, Kean Ho"
Email: kean.ho.c...@intel.com
Date: Wed, 12 Feb 2014 06:14:33 -0500
Subject: [PATCH 016/164] pinctrl-baytrail: enable platform device in the
absent of ACPI enumeration
This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the BYT Pinctrl GPIO platform driver.
Conflicts:
drivers/pinctrl/Makefile
Signed-off-by: Chew, Kean Ho <kean.ho.c...@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.c...@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selva...@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.peta...@intel.com>
]
3/4 [
Author: "Chew, Kean Ho"
Email: kean.ho.c...@intel.com
Date: Tue, 11 Feb 2014 11:25:45 -0500
Subject: [PATCH 017/164] pinctrl-baytrail: setup IOAPIC interrupt for GPIO
clusters on non-ACPI system
BayTrail GPIO NORTH, SOUTH and SUS clusters use IRQ48,
49 and 50 respectively. On non-ACPI system, we need
to setup IOAPIC RTE for device that use interrupt
beyond IRQ23.
Conflicts:
drivers/pinctrl/pinctrl-baytrail.c
Signed-off-by: Chew, Kean Ho <kean.ho.c...@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.c...@intel.com>
Signed-off-by: Sreeju Selvaraj <sreeju.armughanx.selva...@intel.com>
Signed-off-by: Maurice Petallo <mauricex.r.peta...@intel.com>
]
4/4 [
Author: Wan Ahmad Zainie
Email: wan.ahmad.zainie.wan.moha...@intel.com
Date: Mon, 18 May 2015 12:49:57 +0800
Subject: [PATCH 097/164] pinctrl-baytrail: Serialize GPIO registers access
with global spinlock
When multiple drivers access the GPIO registers concurrently, it
may result in unpredictable system behaviour, that is, write
instructions may be dropped. As to fix this issue, add global
lock for all reads and writes to serialize GPIO accessing.
Referring to Errata: VLI63, VLT61
Errata Web-link:
https://cdiext.intel.com/cdi/edesign-infodesk/EDCDownloader.aspx?id=539130
Version 3:
- This is a forward ported version of the patch from byt_3.10.61_ltsi_dev
0d31cde pinctrl-baytrail: Serialize GPIO registers access with global spinlock
Version 2:
- This is a forward ported version of the patch from vlv_1.0.1_dev:
4b900f5 gpio-byt: Serialize GPIO registers access with global spinlock
- Removed remaining instances of vg->lock
Signed-off-by: Tan, Jui Nee <jui.nee....@intel.com>
Signed-off-by: Petallo, MauriceX R <mauricex.r.peta...@intel.com>
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.moha...@intel.com>
]
Chai, Chong Yi (1):
pinctrl: baytrail: unmap interrupt when free the gpio pin
features/soc/baytrail/baytrail.scc | 4 +
...trail-Serialize-GPIO-registers-access-wit.patch | 256 ++++++++++++++++
...trail-enable-platform-device-in-the-absen.patch | 339 +++++++++++++++++++++
...trail-setup-IOAPIC-interrupt-for-GPIO-clu.patch | 78 +++++
...trail-unmap-interrupt-when-free-the-gpio-.patch | 40 +++
5 files changed, 717 insertions(+)
create mode 100644
features/soc/baytrail/pinctrl-baytrail-Serialize-GPIO-registers-access-wit.patch
create mode 100644
features/soc/baytrail/pinctrl-baytrail-enable-platform-device-in-the-absen.patch
create mode 100644
features/soc/baytrail/pinctrl-baytrail-setup-IOAPIC-interrupt-for-GPIO-clu.patch
create mode 100644
features/soc/baytrail/pinctrl-baytrail-unmap-interrupt-when-free-the-gpio-.patch
--
1.9.1
--
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