From: John Jacques <john.jacq...@intel.com>
Signed-off-by: John Jacques <john.jacq...@intel.com>
---
drivers/net/ethernet/intel/axxia/nemac-regs.h | 115 +++++++++++++-------------
1 file changed, 59 insertions(+), 56 deletions(-)
diff --git a/drivers/net/ethernet/intel/axxia/nemac-regs.h
b/drivers/net/ethernet/intel/axxia/nemac-regs.h
index 2e0b08a..c083c5c 100644
--- a/drivers/net/ethernet/intel/axxia/nemac-regs.h
+++ b/drivers/net/ethernet/intel/axxia/nemac-regs.h
@@ -281,62 +281,65 @@
/* DMA REGISTERS */
-#define NEM_DMA_CTL 0x3000
-#define DMACTL_RST (1 << 31)
-#define DMACTL_EN (1 << 16)
-#define DMACTL_ALLOW_TX_PAUSE (1 << 15)
-#define DMACTL_FORCE_RX_ORDER (1 << 14)
-#define DMACTL_TX_TAIL_PTR_EN (1 << 13)
-#define DMACTL_RX_TAIL_PTR_EN (1 << 12)
-#define DMACTL_AXI_BURST(_n) ((_n) << 8)
-#define DMACTL_PTI_BURST(_n) ((_n) << 4)
-#define DMACTL_ARB(_x) ((_x) << 0)
-#define ARB_RR 0 /* Round robin */
-#define ARB_PRIO_RX 1 /* Prioritize receive */
-#define ARB_PRIO_TX 2 /* Prioritize transmit */
-#define NEM_DMA_ENABLE 0x3004
-#define RXDMA_EN (1<<17)
-#define TXDMA_EN (1<<16)
-#define NEM_DMA_RXQ_ADDR 0x3008
-#define NEM_DMA_TXQ_ADDR 0x3010
-#define NEM_DMA_RXQ_SIZE 0x3018
-#define NEM_DMA_TXQ_SIZE 0x301c
-#define NEM_DMA_RXTAIL_PTR_ADDR 0x3020
-#define NEM_DMA_TXTAIL_PTR_ADDR 0x3028
-#define NEM_DMA_RXHEAD_PTR 0x3030
-#define NEM_DMA_TXHEAD_PTR 0x3034
-#define NEM_DMA_AXI_CTL 0x3038
-#define AXICTL_ARPROT(_x) ((_x) << 12)
-#define AXICTL_ARCACHE(_x) ((_x) << 8)
-#define AXICTL_AWPROT(_x) ((_x) << 4)
-#define AXICTL_AWCACHE(_x) ((_x) << 0)
-#define NEM_DMA_MISC_CTL 0x303c
-#define MISCCTL_RGMII_1000 (0 << 0)
-#define MISCCTL_RGMII_100 (1 << 0)
-#define MISCCTL_RGMII_10 (2 << 0)
-#define NEM_DMA_RXTAIL_PTR 0x3080
-#define NEM_DMA_TXTAIL_PTR 0x3084
-#define NEM_DMA_STATUS 0x3088
-#define NEM_DMA_INTL_STATUS 0x3100
-#define INTL_BAD_PARAM (1 << 0)
-#define NEM_DMA_INTL_MASK 0x3104
-#define NEM_DMA_INTL_INV 0x3108
-#define NEM_DMA_INTL_NOMASK 0x310c
-#define NEM_DMA_INTE_STATUS 0x3110
-#define INTE_RX_DONE (1 << 9)
-#define INTE_TX_DONE (1 << 8)
-#define INTE_ERR_MASK 0x7f
-#define INTE_RXDMA_WERR (1 << 6)
-#define INTE_RXDMA_FIFO_ERR (1 << 5)
-#define INTE_RXDESC_RERR (1 << 4)
-#define INTE_TXDMA_RERR (1 << 3)
-#define INTE_TXDMA_WERR (1 << 2)
-#define INTE_TXDMA_FIFO_ERR (1 << 1)
-#define INTE_TXDESC_RERR (1 << 0)
-#define NEM_DMA_INTE_MASK 0x3114
-#define NEM_DMA_INTE_INV 0x3118
-#define NEM_DMA_INTE_NOMASK 0x311c
-#define NEM_DMA_INTE_RAW 0x3120
+#define NEM_DMA_CTL 0x3000
+#define DMACTL_RST (1 << 31)
+#define DMACTL_RX_DISABLE_PREALIGN (1 << 19)
+#define DMACTL_TX_DISABLE_PREALIGN (1 << 18)
+#define DMACTL_TX_FORCE_ORDERING (1 << 17)
+#define DMACTL_EN (1 << 16)
+#define DMACTL_ALLOW_TX_PAUSE (1 << 15)
+#define DMACTL_RX_FORCE_ORDERING (1 << 14)
+#define DMACTL_TX_TAIL_PTR_EN (1 << 13)
+#define DMACTL_RX_TAIL_PTR_EN (1 << 12)
+#define DMACTL_AXI_BURST(_n) ((_n) << 8)
+#define DMACTL_PTI_BURST(_n) ((_n) << 4)
+#define DMACTL_ARB(_x) ((_x) << 0)
+#define ARB_RR 0 /* Round robin */
+#define ARB_PRIO_RX 1 /* Prioritize receive */
+#define ARB_PRIO_TX 2 /* Prioritize transmit */
+#define NEM_DMA_ENABLE 0x3004
+#define RXDMA_EN (1 << 17)
+#define TXDMA_EN (1 << 16)
+#define NEM_DMA_RXQ_ADDR 0x3008
+#define NEM_DMA_TXQ_ADDR 0x3010
+#define NEM_DMA_RXQ_SIZE 0x3018
+#define NEM_DMA_TXQ_SIZE 0x301c
+#define NEM_DMA_RXTAIL_PTR_ADDR 0x3020
+#define NEM_DMA_TXTAIL_PTR_ADDR 0x3028
+#define NEM_DMA_RXHEAD_PTR 0x3030
+#define NEM_DMA_TXHEAD_PTR 0x3034
+#define NEM_DMA_AXI_CTL 0x3038
+#define AXICTL_ARPROT(_x) ((_x) << 12)
+#define AXICTL_ARCACHE(_x) ((_x) << 8)
+#define AXICTL_AWPROT(_x) ((_x) << 4)
+#define AXICTL_AWCACHE(_x) ((_x) << 0)
+#define NEM_DMA_MISC_CTL 0x303c
+#define MISCCTL_RGMII_1000 (0 << 0)
+#define MISCCTL_RGMII_100 (1 << 0)
+#define MISCCTL_RGMII_10 (2 << 0)
+#define NEM_DMA_RXTAIL_PTR 0x3080
+#define NEM_DMA_TXTAIL_PTR 0x3084
+#define NEM_DMA_STATUS 0x3088
+#define NEM_DMA_INTL_STATUS 0x3100
+#define INTL_BAD_PARAM (1 << 0)
+#define NEM_DMA_INTL_MASK 0x3104
+#define NEM_DMA_INTL_INV 0x3108
+#define NEM_DMA_INTL_NOMASK 0x310c
+#define NEM_DMA_INTE_STATUS 0x3110
+#define INTE_RX_DONE (1 << 9)
+#define INTE_TX_DONE (1 << 8)
+#define INTE_ERR_MASK 0x7f
+#define INTE_RXDMA_WERR (1 << 6)
+#define INTE_RXDMA_FIFO_ERR (1 << 5)
+#define INTE_RXDESC_RERR (1 << 4)
+#define INTE_TXDMA_RERR (1 << 3)
+#define INTE_TXDMA_WERR (1 << 2)
+#define INTE_TXDMA_FIFO_ERR (1 << 1)
+#define INTE_TXDESC_RERR (1 << 0)
+#define NEM_DMA_INTE_MASK 0x3114
+#define NEM_DMA_INTE_INV 0x3118
+#define NEM_DMA_INTE_NOMASK 0x311c
+#define NEM_DMA_INTE_RAW 0x3120
enum nem_stats_tx_counter_def {
TX_OCTETS = 0x00, /* Total Octets: octets in all frames. */
--
2.7.4
--
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