From: Imre Deak <imre.d...@intel.com> commit 67856d4d3ccdd4612bcef3a7b624aa33e5b6828d upstream
It's possible that BIOS enables PHY1 only to read out the GRC value from it to be used in PHY0 and then disables PHY1. In this case we can't use the PHY1 GRC value for state verification, so use instead the one in PHY0 always. Signed-off-by: Imre Deak <imre.d...@intel.com> Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461174366-16758-2-git-send-email-imre.d...@intel.com Signed-off-by: Jukka Laitinen <jukka.laiti...@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 2a66843..11bd63b 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1777,7 +1777,7 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, DRM_DEBUG_DRIVER("DDI PHY %d already enabled, " "won't reprogram it\n", phy); /* Still read out the GRC value for state verification */ - if (phy == DPIO_PHY1) + if (phy == DPIO_PHY0) dev_priv->bxt_phy_grc = broxton_get_grc(dev_priv, phy); return; -- 2.7.4 -- _______________________________________________ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
