On 13 July 2017 at 05:22, Bruce Ashfield <bruce.ashfi...@windriver.com> wrote: > On 2017-07-04 11:29 AM, Nathan Rossi wrote: >> >> Create configs for the qemumicroblazeeb machine. This includes both >> -standard and -tiny configs. >> >> Signed-off-by: Nathan Rossi <nat...@nathanrossi.com> >> --- >> bsp/qemumicroblaze/qemumicroblazeeb-standard.scc | 15 +++++++++++++++ >> bsp/qemumicroblaze/qemumicroblazeeb-tiny.scc | 12 ++++++++++++ >> bsp/qemumicroblaze/qemumicroblazeeb.cfg | 15 +++++++++++++++ >> 3 files changed, 42 insertions(+) >> create mode 100644 bsp/qemumicroblaze/qemumicroblazeeb-standard.scc >> create mode 100644 bsp/qemumicroblaze/qemumicroblazeeb-tiny.scc >> create mode 100644 bsp/qemumicroblaze/qemumicroblazeeb.cfg >> >> diff --git a/bsp/qemumicroblaze/qemumicroblazeeb-standard.scc >> b/bsp/qemumicroblaze/qemumicroblazeeb-standard.scc >> new file mode 100644 >> index 0000000000..ae93b49a11 >> --- /dev/null >> +++ b/bsp/qemumicroblaze/qemumicroblazeeb-standard.scc >> @@ -0,0 +1,15 @@ >> +define KMACHINE qemumicroblazeeb >> +define KTYPE standard >> +define KARCH microblaze >> + >> +include ktypes/standard/standard.scc >> + >> +include arch/microblaze/microblaze.scc >> +kconf hardware qemumicroblazeeb.cfg >> + >> +include bsp/xilinx/soc/drivers-softip.scc >> +include bsp/xilinx/board-common.scc >> + >> +# default policy for standard kernels >> +include features/latencytop/latencytop.scc >> +include features/profiling/profiling.scc >> diff --git a/bsp/qemumicroblaze/qemumicroblazeeb-tiny.scc >> b/bsp/qemumicroblaze/qemumicroblazeeb-tiny.scc >> new file mode 100644 >> index 0000000000..2d1bb74132 >> --- /dev/null >> +++ b/bsp/qemumicroblaze/qemumicroblazeeb-tiny.scc >> @@ -0,0 +1,12 @@ >> +define KMACHINE qemumicroblazeeb >> +define KTYPE tiny >> +define KARCH microblaze >> + >> +include ktypes/tiny/tiny.scc >> + >> +include arch/microblaze/microblaze.scc >> +kconf hardware qemumicroblazeeb.cfg >> + >> +include bsp/xilinx/soc/drivers-softip.scc >> +include bsp/xilinx/board-common.scc >> + >> diff --git a/bsp/qemumicroblaze/qemumicroblazeeb.cfg >> b/bsp/qemumicroblaze/qemumicroblazeeb.cfg >> new file mode 100644 >> index 0000000000..0f635c1652 >> --- /dev/null >> +++ b/bsp/qemumicroblaze/qemumicroblazeeb.cfg >> @@ -0,0 +1,15 @@ >> + >> +CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan3" > > > Out curiosity, is it this config that actually dictates > the endianess ?
This config just populates the fpga family. It does control some instruction flags for very old microblaze cpu versions [0]. But otherwise just embeds a string that can be read at run time. > > I ask, because I didn't see anything else obvious that would > trigger this to build BE. There is no kernel config to switch endianess, it is defined by the toolchain used. You can see how the arch picks based on compiler defines e.g. [1], [2]. The compiler defines are gcc specific [3]. [0] - http://elixir.free-electrons.com/linux/latest/source/arch/microblaze/Makefile#L26 [1] - http://elixir.free-electrons.com/linux/latest/source/arch/microblaze/include/uapi/asm/byteorder.h#L4 [2] - http://elixir.free-electrons.com/linux/latest/source/arch/microblaze/lib/libgcc.h#L17 [3] - https://github.com/gcc-mirror/gcc/blob/master/gcc/config/microblaze/microblaze-c.c#L45 Regards, Nathan -- _______________________________________________ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
