On Tue, Aug 20, 2019 at 07:29:20PM +0800, Kevin Hao wrote: > This adds the cfg&scc files to support the Marvell OCTEON TX2 > CN96XX multicore arm64 SoC.
Ping... Thanks, Kevin > > Signed-off-by: Kevin Hao <kexin....@windriver.com> > --- > bsp/marvell-cn96xx/marvell-cn96xx-standard.scc | 7 ++ > bsp/marvell-cn96xx/marvell-cn96xx.cfg | 104 > +++++++++++++++++++++++++ > bsp/marvell-cn96xx/marvell-cn96xx.scc | 6 ++ > 3 files changed, 117 insertions(+) > create mode 100644 bsp/marvell-cn96xx/marvell-cn96xx-standard.scc > create mode 100644 bsp/marvell-cn96xx/marvell-cn96xx.cfg > create mode 100644 bsp/marvell-cn96xx/marvell-cn96xx.scc > > diff --git a/bsp/marvell-cn96xx/marvell-cn96xx-standard.scc > b/bsp/marvell-cn96xx/marvell-cn96xx-standard.scc > new file mode 100644 > index 000000000000..8d92dc15f87b > --- /dev/null > +++ b/bsp/marvell-cn96xx/marvell-cn96xx-standard.scc > @@ -0,0 +1,7 @@ > +define KMACHINE marvell-cn96xx > +define KTYPE standard > +define KARCH arm64 > + > +include ktypes/standard > + > +include marvell-cn96xx.scc > diff --git a/bsp/marvell-cn96xx/marvell-cn96xx.cfg > b/bsp/marvell-cn96xx/marvell-cn96xx.cfg > new file mode 100644 > index 000000000000..6b83cd0659aa > --- /dev/null > +++ b/bsp/marvell-cn96xx/marvell-cn96xx.cfg > @@ -0,0 +1,104 @@ > +.......................................................................... > +. WARNING > +. > +. This file is a kernel configuration fragment, and not a full kernel > +. configuration file. The final kernel configuration is made up of > +. an assembly of processed fragments, each of which is designed to > +. capture a specific part of the final configuration (e.g. platform > +. configuration, feature configuration, and board specific hardware > +. configuration). For more information on kernel configuration, please > +. consult the product documentation. > +. > +.......................................................................... > + > +CONFIG_ARM64=y > +CONFIG_ARM64_VA_BITS_48=y > +CONFIG_ARM_SMMU_V3=y > +CONFIG_NR_CPUS=24 > +CONFIG_ARCH_THUNDER=y > + > +# uboot set "coherent_pool=16M" kernel parameter by default, so we need to > +# make sure CONFIG_FORCE_MAX_ZONEORDER is big enough > +CONFIG_ARM64_64K_PAGES=y > +CONFIG_TRANSPARENT_HUGEPAGE=y > + > +# PCIe > +CONFIG_PCI=y > +CONFIG_PCIEPORTBUS=y > +CONFIG_HOTPLUG_PCI=y > +CONFIG_HOTPLUG_PCI_PCIE=y > +CONFIG_PCI_IOV=y > + > +CONFIG_PCI_HOST_GENERIC=y > +CONFIG_PCI_HOST_THUNDER_PEM=y > +CONFIG_PCI_HOST_OCTEONTX2_PEM=y > + > +# Ethernet > +CONFIG_OCTEONTX2_AF=y > +CONFIG_OCTEONTX2_PF=y > +CONFIG_OCTEONTX2_VF=y > +CONFIG_USB_USBNET=y > +CONFIG_USB_NET_AX88179_178A=y > + > +# NVMe > +CONFIG_BLK_DEV_NVME=y > + > +# DMA > +CONFIG_OCTEONTX2_DPI_PF=y > + > +# MTD > +CONFIG_MTD=y > +CONFIG_MTD_SPI_NOR=y > +CONFIG_MTD_M25P80=y > +CONFIG_MTD_BLOCK=y > + > +# USB > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > + > +# SPI > +CONFIG_SPI=y > +CONFIG_SPI_OCTEONTX2=y > + > +# I2C > +CONFIG_I2C=y > +CONFIG_I2C_THUNDERX=y > + > +# Serial > +CONFIG_SERIAL_AMBA_PL011=y > +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y > + > +# Watchdog > +CONFIG_ARM_SBSA_WATCHDOG=y > + > +# SD > +CONFIG_MMC=y > +CONFIG_MMC_CAVIUM_THUNDERX=y > + > +# GPIO > +CONFIG_GPIOLIB=y > +CONFIG_GPIO_THUNDERX=y > + > +# HWMON > +CONFIG_SENSORS_MAX6697=y > +CONFIG_SENSORS_JC42=y > + > +# RTC > +CONFIG_RTC_CLASS=y > +CONFIG_RTC_DRV_DS1307=y > + > +# Regulator > +CONFIG_REGULATOR=y > +CONFIG_REGULATOR_FIXED_VOLTAGE=y > +CONFIG_REGULATOR_GPIO=y > + > +# VFIO > +CONFIG_VFIO=y > +CONFIG_VFIO_PCI=y > + > +# Misc > +CONFIG_EEPROM_AT24=y > +CONFIG_HW_RANDOM=y > +CONFIG_HW_RANDOM_CAVIUM=y > +CONFIG_OCTEONTX2_RM=y > +CONFIG_OCTEONTX2_RM_DOM_SYSFS=y > diff --git a/bsp/marvell-cn96xx/marvell-cn96xx.scc > b/bsp/marvell-cn96xx/marvell-cn96xx.scc > new file mode 100644 > index 000000000000..0d104fad583b > --- /dev/null > +++ b/bsp/marvell-cn96xx/marvell-cn96xx.scc > @@ -0,0 +1,6 @@ > +kconf hardware marvell-cn96xx.cfg > +kconf hardware features/edac/edac.cfg > + > +include cfg/usb-mass-storage.scc > + > +include features/hugetlb/hugetlb.scc > -- > 2.14.4 >
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