Uniflash to the rescue! Haven't gotten around to porting devbios to MTD yet...sigh.
I have to say, wow that was easy! Linuxbios really is modular. Change the superio, flash size, and off you go. Kudos!
Any ideas about the etherboot no heap found?
Cheers,
Jeremy
LinuxBIOS-1.0.0 Tue Aug 24 10:17:36 EDT 2004 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Tue Aug 24 10:17:36 EDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7190] PCI: 00:01.0 [8086/7191] PCI: 00:07.0 [8086/7110] PCI: 00:07.1 [8086/7111] PCI: 00:07.2 [8086/7112] PCI: 00:07.3 [8086/7113] PCI: 00:0f.0 [8086/1229] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1023/9750] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:00.0 10 <- [0xe0000000 - 0xefffffff] prefmem PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xf0a00000 - 0xf09fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xf0000000 - 0xf08fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf0000000 - 0xf03fffff] mem PCI: 01:00.0 14 <- [0xf0800000 - 0xf081ffff] mem PCI: 01:00.0 18 <- [0xf0400000 - 0xf07fffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:07.1 20 <- [0x00001040 - 0x0000104f] io PCI: 00:07.2 20 <- [0x00001000 - 0x0000101f] io PCI: 00:0f.0 10 <- [0xf0a00000 - 0xf0a00fff] prefmem PCI: 00:0f.0 14 <- [0x00001020 - 0x0000103f] io PCI: 00:0f.0 18 <- [0xf0900000 - 0xf09fffff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 cmd <- 07 PCI: 00:07.1 cmd <- 01 PCI: 00:07.2 cmd <- 01 PCI: 00:07.3 cmd <- 01 PCI: 00:0f.0 cmd <- 03 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized totalram: 16M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 16MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 2 Vendor ID : GenuineIntel Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x05 Processor Mask : 0x00 Processor Stepping : 0x01 Feature flags : 0x0183fbff
Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Gesc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size
.TRR check
.ixed MTRRs : Enabled
Variable MTRRs: Enabled
.
../ ...
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O/.
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....
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.
/Disabling local apic...done.
CPU #0 Initialized
intel_mainboard_fixup()
Testing SMI
SMI disabled
Enabling IDE...0x40 = 0x8000
0x42 = 0x8000
Enabled IDE for channels 1 and 2
Enabling Legacy IDE
Word at 4 is now 0x0001
enabling smbus
enable pm functions
Setting up RTC
RTC Init
Invalid CMOS LB checksum
done.
Enabling extended BIOS access
Enabling Full ISA Mode
Enabling IRQ8
Enabling Mouse IRQ12 on piix4e
done.
Checking IRQ routing tables...
/data/build/linuxbios/freebios/src/arch/i386/lib/pirq_routing.c: 30:check_pi
done.
Copying IRQ routing tables to 0xf0000...done.
Verifing priq routing tables copy at 0xf0000...failed
Wrote linuxbios table at: 00000500 - 00000688 checksum db75
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f
Found ELF candiate at offset 0
Loading Etherboot version: 5.2.5
Dropping non PT_LOAD segment
New segment addr 0x20000 size 0xe740 offset 0xb0 filesize 0x63dc
(cleaned up) New segment addr 0x20000 size 0xe740 offset 0xb0 filesize 0x63dc cLoading Segment: addr: 0x0000000000f80f68 memsz: 0x000000000000e740 filesz: 0x0
Clearing Segment: addr: 0x0000000000f87344 memsz: 0x0000000000008364
Jumping to boot code at 0x20000
ROM segment 0x0f0f length 0x161e reloc 0x00020000
CPU 360 Mhz
Etherboot 5.2.5 (GPL) http://etherboot.org Tagged ELF for [EEPRO100]
init_heap: No heap found.
ron minnich wrote:
On Tue, 24 Aug 2004, Jeremy Jackson wrote:
Hi,
I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an instant to start.
10 is an early post. C1 I will have to look up. Anyone who wants to make up a post code table is welcome ...
you should try to hook up serial.
ron
-- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net _______________________________________________ Linuxbios mailing list [EMAIL PROTECTED] http://www.clustermatic.org/mailman/listinfo/linuxbios
