On Mon, 12 Feb 2001 16:53:08 -0500 (EST), [EMAIL PROTECTED] wrote:
>> no never mind. I have looked at the effects of this on instrumented
>> DIMMS so I can say it works as documented.
>This sounds like the "right thing". RAMTEST with no cache is
>SSSSLLLOOOOWWWWWWWWW! ...and doesn't test burst.
>
We were just noticing that today while chaseing down some RAM chip selects that are
incorrectly wired. We were wondering if our board had some other issues that were
causing
that. Good to know that thats the proper behaviour.
But exactly why is it so slow? I mean the ram test routine is only about 20 or so
assembly
instructions and reading from flash is still pretty quick... Is there a bunch of ISA
wait
states in there or something?
--
Richard A. Smith Bitworks, Inc.
[EMAIL PROTECTED] 501.846.5777
Sr. Design Engineer http://www.bitworks.com
