This is a diff of exactly what I am running against the current
linuxbios tree label BEFORE_ERIC_MAJOR_MERGE. Ron since you want
diffs per directory I will send them to you, against the current CVS
tommorrow.
My typo was in the ldscripts and since I had problems I rexamined
them, and that whole branch of the code is much cleaner now.
This diff is about 1/2 alpha code and about 1/2 code cleanups
so anyone especially tyson who is looking at cleaning things up
please have a look.
Eric
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/Config freebios/src/arch/alpha/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/Config Tue Mar 20 20:25:07 2001
@@ -0,0 +1,2 @@
+dir boot
+dir lib
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot/Config freebios/src/arch/alpha/boot/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/boot/Config Mon Mar 19 18:19:08 2001
@@ -0,0 +1 @@
+object boot.o
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot/boot.c freebios/src/arch/alpha/boot/boot.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot/boot.c Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/boot/boot.c Mon Mar 12 21:22:19 2001
@@ -0,0 +1,197 @@
+#include <boot/uniform_boot.h>
+#include <boot/elf.h>
+#include <arch/boot/hwrpb.h>
+
+/* FIXME remove the hardcodes
+ * MAX_ASM, CMD_LINE, SYSNAME, CYCLE_FREQ, CPU, SYS_VARIATION, SYS_TYPE
+ */
+
+#ifndef CMD_LINE
+#define CMD_LINE ""
+#endif
+
+/* Magic values.
+ * Hard code these for the DS10 for now.
+ */
+#define HWRPB_SIGNATURE 0x4857525042000000
+#define HWRPB_SYS_TYPE ST_DEC_TSUNAMI
+#define HWRPB_SYS_VARIATION (7 << 10)
+#define HWRPB_CPU EV6_CPU
+#define HWRPB_CYCLE_FREQ 462962962
+#define HWRPB_INTR_FREQ (4096*1024)
+#define HWRPB_SYSNAME "linuxBIOS DS10"
+#define HWRPB_COMMAND_LINE CMD_LINE
+#define HWRPB_MAX_ASN 255
+
+#define OFFSET(x, y) ((unsigned long)(((char *)&(x)) - ((char *)&(y))))
+#define ELEMENTS(x) (sizeof(x)/sizeof((x)[0]))
+#define ADDR(x) ((unsigned long)&(x))
+
+struct sysname_struct {
+ unsigned long length;
+ unsigned char name[30];
+};
+
+static struct boot_data {
+ struct hwrpb_struct hwrpb;
+ struct dsr_struct dsr;
+ struct sysname_struct sysname;
+ struct percpu_struct cpu[1];
+ struct memdesc_struct mem;
+ struct memclust_struct mem_cluster[2];
+} boot_data =
+{
+ .hwrpb = {
+ .phys_addr = ADDR(boot_data.hwrpb),
+ .id = HWRPB_SIGNATURE,
+ .revision = 6,
+ .size = sizeof(boot_data.hwrpb),
+ .cpuid = 0,
+ .pagesize = 8192,
+ .pa_bits = 13,
+ .max_asn = HWRPB_MAX_ASN,
+ .ssn = "MILO-LinuxBIOS",
+ .sys_type = HWRPB_SYS_TYPE,
+ .sys_variation = HWRPB_SYS_VARIATION,
+ .sys_revision = 0,
+ .intr_freq = HWRPB_INTR_FREQ,
+ .cycle_freq = HWRPB_CYCLE_FREQ,
+ .vptb = 0,
+ .res1 = 0,
+ .tbhb_offset = 0,
+ .nr_processors = ELEMENTS(boot_data.cpu),
+ .processor_size = sizeof(boot_data.cpu[0]),
+ .processor_offset = OFFSET(boot_data.cpu, boot_data.hwrpb),
+ .ctb_nr = 0,
+ .ctb_size = 0,
+ .ctbt_offset = 0,
+ .mddt_offset = OFFSET(boot_data.mem, boot_data.hwrpb),
+ .cdb_offset = 0,
+ .frut_offset = 0,
+ .save_terminal = 0,
+ .save_terminal_data = 0,
+ .restore_terminal = 0,
+ .restore_terminal_data = 0,
+ .CPU_restart = 0,
+ .CPU_restart_data = 0,
+ .res2 = 0,
+ .res3 = 0,
+ .chksum = 0,
+ .rxrdy = 0,
+ .txrdy = 0,
+ .dsr_offset = OFFSET(boot_data.dsr, boot_data.hwrpb),
+ },
+ .dsr = {
+ .smm = 0,
+ .lurt_off = 0,
+ .sysname_off = OFFSET(boot_data.sysname, boot_data.dsr),
+ },
+ .sysname = {
+ .length = sizeof(HWRPB_SYSNAME) -1,
+ .name = HWRPB_SYSNAME,
+ },
+
+ .cpu = {
+ {
+ .serial_no = {
+ 0x73695f78756e694c,
+ 0x002174616572475f,
+ },
+ .type = HWRPB_CPU,
+ }
+ },
+ .mem = {
+ .chksum = 0,
+ .optional_pa = ADDR(boot_data.mem),
+ .numclusters = ELEMENTS(boot_data.mem_cluster),
+ },
+ .mem_cluster = {
+ {
+ .start_pfn = 0,
+ .numpages = 128,
+ .numtested = 0,
+ .bitmap_va = 0,
+ .bitmap_pa = 0,
+ .bitmap_chksum = 0,
+ .usage = 1, /* console/PALcode reserved */
+ },
+ {
+ .start_pfn = 128,
+ .numpages = 0,
+ .numtested = 0,
+ .bitmap_va = 0,
+ .bitmap_pa = 0,
+ .bitmap_chksum = 0,
+ .usage = 0,
+ },
+ },
+};
+
+
+static struct {
+ struct uniform_boot_header header;
+ struct {
+ struct ube_hwrpb hwrpb;
+ } env;
+ unsigned char command_line[1024];
+} ube_all = {
+ .header = {
+ .header_bytes = sizeof(ube_all.header),
+ .header_checksum = 0,
+ .arg = (unsigned long)&ube_all.command_line,
+ .arg_bytes = sizeof(ube_all.command_line),
+ .env = (unsigned long)&ube_all.env,
+ .env_bytes = sizeof(ube_all.env),
+ },
+ .env = {
+ .hwrpb = {
+ .tag = UBE_TAG_HWRPB,
+ .size = sizeof(ube_all.env.hwrpb),
+ .hwrpb = (unsigned long)&boot_data.hwrpb,
+ },
+ },
+ .command_line = HWRPB_COMMAND_LINE,
+};
+
+static unsigned long hwrpb_compute_checksum(struct hwrpb_struct *hwrpb)
+{
+ unsigned long sum = 0, *l;
+ for (l = (unsigned long *)hwrpb; l <= (unsigned long *) &hwrpb->chksum; ++l)
+ sum += *l;
+ return sum;
+
+}
+
+
+void *get_ube_pointer(unsigned long totalram)
+{
+ /* Set the amount of RAM I have */
+ boot_data.mem_cluster[1].numpages = (totalram >> 3) -
+ boot_data.mem_cluster[1].start_pfn;
+ boot_data.hwrpb.chksum = 0;
+ boot_data.hwrpb.chksum = hwrpb_compute_checksum(&boot_data.hwrpb);
+ ube_all.header.header_checksum = 0;
+ ube_all.header.header_checksum =
+ uniform_boot_compute_header_checksum(&ube_all.header);
+ return &ube_all;
+}
+
+
+int elf_check_arch(Elf_ehdr *ehdr)
+{
+ return (
+ (ehdr->e_machine == EM_ALPHA) &&
+ (ehdr->e_ident[EI_CLASS] == ELFCLASS64) &&
+ (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
+ );
+}
+
+void jmp_to_elf_entry(void *entry, void *ptr)
+{
+ void (*kernel_entry)(void *ptr);
+ kernel_entry = entry;
+
+ /* Jump to kernel */
+ kernel_entry(ptr);
+}
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot.c freebios/src/arch/alpha/boot.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/boot.c Mon Mar 12 21:22:19 2001
+++ freebios/src/arch/alpha/boot.c Wed Dec 31 17:00:00 1969
@@ -1,197 +0,0 @@
-#include <boot/uniform_boot.h>
-#include <boot/elf.h>
-#include <arch/boot/hwrpb.h>
-
-/* FIXME remove the hardcodes
- * MAX_ASM, CMD_LINE, SYSNAME, CYCLE_FREQ, CPU, SYS_VARIATION, SYS_TYPE
- */
-
-#ifndef CMD_LINE
-#define CMD_LINE ""
-#endif
-
-/* Magic values.
- * Hard code these for the DS10 for now.
- */
-#define HWRPB_SIGNATURE 0x4857525042000000
-#define HWRPB_SYS_TYPE ST_DEC_TSUNAMI
-#define HWRPB_SYS_VARIATION (7 << 10)
-#define HWRPB_CPU EV6_CPU
-#define HWRPB_CYCLE_FREQ 462962962
-#define HWRPB_INTR_FREQ (4096*1024)
-#define HWRPB_SYSNAME "linuxBIOS DS10"
-#define HWRPB_COMMAND_LINE CMD_LINE
-#define HWRPB_MAX_ASN 255
-
-#define OFFSET(x, y) ((unsigned long)(((char *)&(x)) - ((char *)&(y))))
-#define ELEMENTS(x) (sizeof(x)/sizeof((x)[0]))
-#define ADDR(x) ((unsigned long)&(x))
-
-struct sysname_struct {
- unsigned long length;
- unsigned char name[30];
-};
-
-static struct boot_data {
- struct hwrpb_struct hwrpb;
- struct dsr_struct dsr;
- struct sysname_struct sysname;
- struct percpu_struct cpu[1];
- struct memdesc_struct mem;
- struct memclust_struct mem_cluster[2];
-} boot_data =
-{
- .hwrpb = {
- .phys_addr = ADDR(boot_data.hwrpb),
- .id = HWRPB_SIGNATURE,
- .revision = 6,
- .size = sizeof(boot_data.hwrpb),
- .cpuid = 0,
- .pagesize = 8192,
- .pa_bits = 13,
- .max_asn = HWRPB_MAX_ASN,
- .ssn = "MILO-LinuxBIOS",
- .sys_type = HWRPB_SYS_TYPE,
- .sys_variation = HWRPB_SYS_VARIATION,
- .sys_revision = 0,
- .intr_freq = HWRPB_INTR_FREQ,
- .cycle_freq = HWRPB_CYCLE_FREQ,
- .vptb = 0,
- .res1 = 0,
- .tbhb_offset = 0,
- .nr_processors = ELEMENTS(boot_data.cpu),
- .processor_size = sizeof(boot_data.cpu[0]),
- .processor_offset = OFFSET(boot_data.cpu, boot_data.hwrpb),
- .ctb_nr = 0,
- .ctb_size = 0,
- .ctbt_offset = 0,
- .mddt_offset = OFFSET(boot_data.mem, boot_data.hwrpb),
- .cdb_offset = 0,
- .frut_offset = 0,
- .save_terminal = 0,
- .save_terminal_data = 0,
- .restore_terminal = 0,
- .restore_terminal_data = 0,
- .CPU_restart = 0,
- .CPU_restart_data = 0,
- .res2 = 0,
- .res3 = 0,
- .chksum = 0,
- .rxrdy = 0,
- .txrdy = 0,
- .dsr_offset = OFFSET(boot_data.dsr, boot_data.hwrpb),
- },
- .dsr = {
- .smm = 0,
- .lurt_off = 0,
- .sysname_off = OFFSET(boot_data.sysname, boot_data.dsr),
- },
- .sysname = {
- .length = sizeof(HWRPB_SYSNAME) -1,
- .name = HWRPB_SYSNAME,
- },
-
- .cpu = {
- {
- .serial_no = {
- 0x73695f78756e694c,
- 0x002174616572475f,
- },
- .type = HWRPB_CPU,
- }
- },
- .mem = {
- .chksum = 0,
- .optional_pa = ADDR(boot_data.mem),
- .numclusters = ELEMENTS(boot_data.mem_cluster),
- },
- .mem_cluster = {
- {
- .start_pfn = 0,
- .numpages = 128,
- .numtested = 0,
- .bitmap_va = 0,
- .bitmap_pa = 0,
- .bitmap_chksum = 0,
- .usage = 1, /* console/PALcode reserved */
- },
- {
- .start_pfn = 128,
- .numpages = 0,
- .numtested = 0,
- .bitmap_va = 0,
- .bitmap_pa = 0,
- .bitmap_chksum = 0,
- .usage = 0,
- },
- },
-};
-
-
-static struct {
- struct uniform_boot_header header;
- struct {
- struct ube_hwrpb hwrpb;
- } env;
- unsigned char command_line[1024];
-} ube_all = {
- .header = {
- .header_bytes = sizeof(ube_all.header),
- .header_checksum = 0,
- .arg = (unsigned long)&ube_all.command_line,
- .arg_bytes = sizeof(ube_all.command_line),
- .env = (unsigned long)&ube_all.env,
- .env_bytes = sizeof(ube_all.env),
- },
- .env = {
- .hwrpb = {
- .tag = UBE_TAG_HWRPB,
- .size = sizeof(ube_all.env.hwrpb),
- .hwrpb = (unsigned long)&boot_data.hwrpb,
- },
- },
- .command_line = HWRPB_COMMAND_LINE,
-};
-
-static unsigned long hwrpb_compute_checksum(struct hwrpb_struct *hwrpb)
-{
- unsigned long sum = 0, *l;
- for (l = (unsigned long *)hwrpb; l <= (unsigned long *) &hwrpb->chksum; ++l)
- sum += *l;
- return sum;
-
-}
-
-
-void *get_ube_pointer(unsigned long totalram)
-{
- /* Set the amount of RAM I have */
- boot_data.mem_cluster[1].numpages = (totalram >> 3) -
- boot_data.mem_cluster[1].start_pfn;
- boot_data.hwrpb.chksum = 0;
- boot_data.hwrpb.chksum = hwrpb_compute_checksum(&boot_data.hwrpb);
- ube_all.header.header_checksum = 0;
- ube_all.header.header_checksum =
- uniform_boot_compute_header_checksum(&ube_all.header);
- return &ube_all;
-}
-
-
-int elf_check_arch(Elf_ehdr *ehdr)
-{
- return (
- (ehdr->e_machine == EM_ALPHA) &&
- (ehdr->e_ident[EI_CLASS] == ELFCLASS64) &&
- (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
- );
-}
-
-void jmp_to_elf_entry(void *entry, void *ptr)
-{
- void (*kernel_entry)(void *ptr);
- kernel_entry = entry;
-
- /* Jump to kernel */
- kernel_entry(ptr);
-}
-
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/crt0.base freebios/src/arch/alpha/config/crt0.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/crt0.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/config/crt0.base Wed Mar 21 18:01:27 2001
@@ -0,0 +1,146 @@
+/*
+ * $ $
+ *
+ */
+
+.set noat
+.set noreorder
+.text
+
+#include <arch/cpu.h>
+
+#if USE_CPU_EV4
+#include <cpu/ev4/start.inc>
+#elif USE_CPU_EV5
+#include <cpu/ev5/start.inc>
+#elif USE_CPU_EV6
+#include <cpu/ev6/start.inc>
+#else
+#error Uknown alpha cpu type
+#endif
+
+ /* __fatal_error_pal Called with:
+ * a0 - Exception handler address that caught the exception
+ * a1 - Address where the exception occured.
+ * a2 - Potentially valid return address from the code
+ * that took the exception.
+ */
+ FETCH_BLOCK_ALIGN
+__fatal_error_non_pal:
+ /* Resetup the global pointers */
+ ldgp gp, 0(pv)
+ lda sp, _estack
+ /* Display an error message */
+ jsr ra, fatal_error
+ br zero, .-4
+
+ /* On entry to kernel_mode_start.
+ * a0 - Signature (0xDEC?????) likely (0xDECB001)
+ * a1 - Memory size in bytes
+ * a2 - Cpu speed in picoseconds
+ *
+ * These parameters should be available on the 164 & the 264.
+ */
+ FETCH_BLOCK_ALIGN
+kernel_mode_start:
+ /* Setup the global pointers */
+ ldgp gp, 0(pv)
+ lda sp, _estack
+
+ /* Zero the Bss */
+ lda t1, _bss
+ lda t2, _ebss
+ subq t2, t1, t2
+ br Zstart
+Zero: subq t2, 8, t2
+ stq zero, 0(t1)
+Zstart: bne t2, Zero
+
+
+ /* Test for the srom valid signature */
+ lda t1, 0xDEC(zero)
+ srl a0, 20, t2
+ cmpeq t1, t2, t3
+ beq t3, 1f
+
+ /* Compute the number of cpu clocks per bit out to the srom
+ * debug port.
+ */
+ bis a2, a2, t11
+ ldq t10, picosecs_per_srom_clock
+ jsr t9, __divq
+ lda t11, srom_wait_reps
+ stq t12, 0(t11)
+
+1:
+ /* Jump to main */
+ jsr ra, hardwaremain
+ br zero, .-4 /* spin in place */
+
+
+ .p2align 3
+picosecs_per_srom_clock:
+ .quad 104166666 /* Pico seconds per tick of a 9600Hz clock */
+srom_wait_reps:
+ .quad 0 /* 48562 on a 466Mhz EV6 */
+
+ /* Wait bit time is private and should not be called from C */
+ FETCH_BLOCK_ALIGN
+wait_bit_time:
+#if USE_CPU_EV6
+ lda t8, 0x1(zero)
+ sll t8, 32, t8 /* t8 = 1.0000.0000 */
+ hw_mtpr t8, EV6__CC_CTL /* clear cycle count */
+ bis zero,zero,zero /* nop */
+ bis zero,zero,zero /* nop */
+ bis zero,zero,zero /* nop */
+ hw_mtpr zero, (EV6__EXC_ADDR+32) /* dummy IPR write - sets SCBD bit 5 (to stall untill cc_ctl gets written) */
+#else
+ hw_mtpr t8, ccCtl /* clear cycle count */
+ STALL /* wait 3 cycles to avoid palcode */
+ STALL /* violation */
+ STALL
+ STALL
+#endif
+wait: /* REPEAT */
+ rpcc t8 /* : read the cycle count */
+ zapnot t8, 0x0f, t8 /* : clear the high longword */
+ cmplt t12, t8, t8 /* : */
+ beq t8, wait /* UNTIL we have waited time specified */
+ ret zero, (t10)
+
+GLOBL(srom_tx_byte)
+ /* Initialze routine variables */
+ ldgp gp, 0(pv)
+ ldq t12, (srom_wait_reps - srom_tx_byte)(pv)
+ lda t11, 16(zero) /* 1 high + 1 start + 8 data + */
+ /* 6 stop (5 extra for delay). */
+ lda a0, 0x3F00(a0) /* add stop bits at the end and */
+ s4addq a0, 1, a0 /* then add start and high bit */
+
+#if USE_CPU_EV6
+ FETCH_BLOCK_ALIGN /* align with nop instructions */
+data_bit: /* REPEAT */
+ hw_mfpr t9, EV6__I_CTL /* get current I_CTL value */
+ lda t8, 0x1(zero) /* t8 - mask for sl_xmit bit */
+ sll t8, EV6__I_CTL__SL_XMIT__S, t8 /* move to the correct position */
+ bic t9, t8, t9 /* clear sl_xmit bit in old I_CTL value */
+ blbc a0, send_bit /* check the new sl_xmit bit */
+ bis t9, t8, t9 /* set sl_xmit bit in old I_CTL value */
+send_bit: /* continue */
+ hw_mtpr t9, EV6__I_CTL /* EV6 Send the data bit */
+#else
+ sll a0, (SLXMIT_V_TMT), a0 /* Put bits into position */
+data_bit: /* REPEAT */
+ hw_mtpr a0, slXmit /* EV5 Send the first bit */
+#endif
+ srl a0, 1, a0 /* Shift right, to the next bit. */
+ subq t11, 1, t11 /* Decrement the bit count. */
+
+ bsr t10, wait_bit_time /* Wait for a bit time */
+ bne t11, data_bit /* UNTIL all data sent */
+ ret zero, (ra)
+
+
+
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/ldscript.base freebios/src/arch/alpha/config/ldscript.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/ldscript.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/config/ldscript.base Wed Mar 21 17:43:23 2001
@@ -0,0 +1,100 @@
+OUTPUT_FORMAT("elf64-alpha")
+ENTRY(__start_offset)
+PHDRS { kernel PT_LOAD AT(0x310000); }
+__start_offset = start + 0x310000;
+SECTIONS
+{
+ . = _ROMBASE;
+ /*
+ * First we place the code and read only data (typically const declared).
+ * This get placed in rom.
+ */
+ .text : {
+ _text = .;
+ *(.text)
+ _etext = .;
+ } : kernel
+ .rodata : {
+ _rodata = .;
+ *(.rodata);
+ _erodata = .;
+ } : kernel
+
+ . = _RAMBASE;
+ /* Global data */
+ .data : {
+ _data = .;
+ *(.data.cacheline_aligned)
+ *(.data) CONSTRUCTORS
+ *(.got)
+ *(.sdata)
+ _edata = .;
+ }
+ _ldata = LOADADDR(.data);
+ _eldata = LOADADDR(.data) + SIZEOF(.data);
+
+
+ /* Important align _bss so bss may be zeroed with quadword access */
+ . = ALIGN(8);
+ .bss : {
+ _bss = .;
+ *(.sbss)
+ *(.scommon)
+ *(.bss)
+ *(COMMON)
+ /* Important align _ebss so bss may be zeroed with quadword access */
+ . = ALIGN(8);
+ _ebss = .;
+ }
+ _end = .;
+
+ /* Align the heap to a quadword boundary */
+ . = ALIGN(8);
+ .heap : {
+ _heap = .;
+ /* Reserve a meg for the heap */
+ . = . + 1024*1024;
+ . = ALIGN(8);
+ _eheap = .;
+ }
+ . = ALIGN(8);
+ .stack : {
+ _stack = .;
+ /* Allocate an 8k stack that grows backwards into the heap */
+ . = . + 8192;
+ . = ALIGN(8);
+ _estack = .;
+ }
+
+ /DISCARD/ : {
+ /* Comment sections */
+ *(.mdebug)
+ *(.note)
+ *(.comment)
+ /* DWARF 1 */
+ *(.debug)
+ *(.line)
+ /* GNU DWARF 1 extensions */
+ *(.debug_srcinfo)
+ *(.debug_sfnames)
+ /* DWARF 1.1 and DWARF 2 */
+ *(.debug_aranges)
+ *(.debug_pubnames)
+ /* DWARF 2 */
+ *(.debug_info)
+ *(.debug_abbrev)
+ *(.debug_line)
+ *(.debug_frame)
+ *(.debug_str)
+ *(.debug_loc)
+ *(.debug_macinfo)
+ /* SGI/MIPS DWARF 2 extensions */
+ *(.debug_weaknames)
+ *(.debug_funcnames)
+ *(.debug_typenames)
+ *(.debug_varnames)
+ /* Kernel module cleanup sections */
+ *(.text.exit)
+ *(.data.exit)
+ }
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/make.base freebios/src/arch/alpha/config/make.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/config/make.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/config/make.base Wed Mar 21 18:06:17 2001
@@ -0,0 +1,35 @@
+biosbase 0
+rambase 0x10000
+makedefine LINK = ld -T ldscript.ld -o $@ crt0.o linuxbios.a
+makedefine CPPFLAGS= -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include $(CPUFLAGS)
+makedefine CFLAGS= $(CPU_OPT) $(CPPFLAGS) -O2 -nostdinc -nostdlib -fno-builtin -Wall
+makedefine CC=cc
+makerule all : linuxbios.rom ;
+makerule linuxbios.rom: linuxbios.strip makerom ; ./makerom -l0x310000 -i7 -v linuxbios.strip -o linuxbios.rom
+makerule linuxbios.strip: linuxbios ; objcopy -O binary -R .note -R .comment -S linuxbios linuxbios.strip
+makerule linuxbios: linuxbios.a ; @rm -f biosobject
+addaction linuxbios $(LINK)
+addaction linuxbios nm -n linuxbios > linuxbios.map
+
+makerule linuxbios.a : $(OBJECTS) ; rm -f linuxbios.a
+addaction linuxbios.a ar cr linuxbios.a $(OBJECTS)
+
+makerule crt0.s: crt0.S ; $(CC) $(CPPFLAGS) -I$(TOP)/src -E $< > crt0.s
+
+makerule crt0.o : crt0.s; $(CC) $(CPU_OPT) -c crt0.s
+#makerule makerom: $(TOP)/util/makerom/makerom.c $(TOP)/util/makerom/compress.c ; $(CC) -o makerom $(TOP)/util/makerom/makerom.c $(TOP)/util/makerom/compress.c
+
+makerule clean : ; rm -f linuxbios.* *.o mkrom xa? *~
+addaction clean rm -f linuxbios crt0.s
+addaction clean rm -f a.out *.s *.l
+addaction clean rm -f TAGS tags
+addaction clean rm -f docipl
+
+
+# do standard config files that the user need not specify
+# for now, this is just 'lib', but it may be more later.
+dir /src/arch/alpha
+dir /src/lib
+dir /src/boot
+dir /src/rom
+dir /util/makerom
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/asm.h freebios/src/arch/alpha/include/arch/asm.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/asm.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/include/arch/asm.h Tue Mar 20 21:23:52 2001
@@ -0,0 +1,18 @@
+#ifndef ALPHA_ARCH_ASM_H
+#define ALPHA_ARCH_ASM_H
+
+/* assembly language utility macros */
+
+/* Load immediate signed constants */
+#define LOAD_CONSTANT16(reg, constant) \
+ lda reg, (constant)(zero)
+
+#define LOAD_CONSTANT32(reg, constant) \
+ ldah reg, ((constant + 0x8000) >> 16)(zero) ; \
+ lda reg, (constant & 0xffff)(reg)
+
+/* Declare a global symbol */
+#define GLOBL(label) .globl label ; label:
+
+
+#endif /* ALPHA_ARCH_ASM_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/compiler.h freebios/src/arch/alpha/include/arch/compiler.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/compiler.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/include/arch/compiler.h Thu Mar 15 15:04:22 2001
@@ -0,0 +1,84 @@
+#ifndef ALPHA_COMPILER_H
+#define ALPHA_COMPILER_H
+
+/*
+ * Herein are macros we use when describing various patterns we want to GCC.
+ * In all cases we can get better schedules out of the compiler if we hide
+ * as little as possible inside inline assembly. However, we want to be
+ * able to know what we'll get out before giving up inline assembly. Thus
+ * these tests and macros.
+ */
+
+#if 0
+#define __kernel_insbl(val, shift) \
+ (((unsigned long)(val) & 0xfful) << ((shift) * 8))
+#define __kernel_inswl(val, shift) \
+ (((unsigned long)(val) & 0xfffful) << ((shift) * 8))
+#define __kernel_insql(val, shift) \
+ ((unsigned long)(val) << ((shift) * 8))
+#else
+#define __kernel_insbl(val, shift) \
+ ({ unsigned long __kir; \
+ __asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
+ __kir; })
+#define __kernel_inswl(val, shift) \
+ ({ unsigned long __kir; \
+ __asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
+ __kir; })
+#define __kernel_insql(val, shift) \
+ ({ unsigned long __kir; \
+ __asm__("insql %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
+ __kir; })
+#endif
+
+#if 0 && (__GNUC__ > 2 || __GNUC_MINOR__ >= 92)
+#define __kernel_extbl(val, shift) (((val) >> (((shift) & 7) * 8)) & 0xfful)
+#define __kernel_extwl(val, shift) (((val) >> (((shift) & 7) * 8)) & 0xfffful)
+#else
+#define __kernel_extbl(val, shift) \
+ ({ unsigned long __kir; \
+ __asm__("extbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
+ __kir; })
+#define __kernel_extwl(val, shift) \
+ ({ unsigned long __kir; \
+ __asm__("extwl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
+ __kir; })
+#endif
+
+
+/*
+ * Beginning with EGCS 1.1, GCC defines __alpha_bwx__ when the BWX
+ * extension is enabled. Previous versions did not define anything
+ * we could test during compilation -- too bad, so sad.
+ */
+
+#if defined(__alpha_bwx__)
+#define __kernel_ldbu(mem) (mem)
+#define __kernel_ldwu(mem) (mem)
+#define __kernel_stb(val,mem) ((mem) = (val))
+#define __kernel_stw(val,mem) ((mem) = (val))
+#else
+#define __kernel_ldbu(mem) \
+ ({ unsigned char __kir; \
+ __asm__("ldbu %0,%1" : "=r"(__kir) : "m"(mem)); \
+ __kir; })
+#define __kernel_ldwu(mem) \
+ ({ unsigned short __kir; \
+ __asm__("ldwu %0,%1" : "=r"(__kir) : "m"(mem)); \
+ __kir; })
+#define __kernel_stb(val,mem) \
+ __asm__("stb %1,%0" : "=m"(mem) : "r"(val))
+#define __kernel_stw(val,mem) \
+ __asm__("stw %1,%0" : "=m"(mem) : "r"(val))
+#endif
+
+/* Somewhere in the middle of the GCC 2.96 development cycle, we implemented
+ a mechanism by which the user can annotate likely branch directions and
+ expect the blocks to be reordered appropriately. Define __builtin_expect
+ to nothing for earlier compilers. */
+
+#if __GNUC__ == 2 && __GNUC_MINOR__ < 96
+#define __builtin_expect(x, expected_value) (x)
+#endif
+
+#endif /* ALPHA_COMPILER_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/cpu.h freebios/src/arch/alpha/include/arch/cpu.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/cpu.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/include/arch/cpu.h Tue Mar 20 21:20:06 2001
@@ -0,0 +1,64 @@
+#ifndef ALPHA_CPU_H
+#define ALPHA_CPU_H
+
+/* Alpha Logical Register Definitions
+ * =========================================================
+ */
+
+/* Return value */
+#define v0 $0
+/* temporaries */
+#define t0 $1
+#define t1 $2
+#define t2 $3
+#define t3 $4
+#define t4 $5
+#define t5 $6
+#define t6 $7
+#define t7 $8
+#define t8 $22
+#define t9 $23
+#define t10 $24
+#define t11 $25
+#define t12 $27
+/* Saved registers */
+#define s0 $9
+#define s1 $10
+#define s2 $11
+#define s3 $12
+#define s4 $13
+#define s5 $14
+#define s6 $15
+/* Frame pointer */
+#define fp $15
+/* Argument registers */
+#define a0 $16
+#define a1 $17
+#define a2 $18
+#define a3 $19
+#define a4 $20
+#define a5 $21
+/* return address */
+#define ra $26
+/* Procedure value */
+#define pv $27
+/* Assember temporary */
+#define at $28
+/* Global pointer */
+#define gp $29
+/* Stack Pointer */
+#define sp $30
+/* zero */
+#define zero $31
+
+#if USE_CPU_EV4
+#include <cpu/ev4/dc21064.h>
+#elif USE_CPU_EV5
+#include <cpu/ev5/dc21164.h>
+#elif USE_CPU_EV6
+#include <cpu/ev6/dc21264.h>
+#else
+#error Uknown alpha cpu type
+#endif
+
+#endif /* ALPHA_CPU_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/io.h freebios/src/arch/alpha/include/arch/io.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/io.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/include/arch/io.h Thu Mar 15 15:04:18 2001
@@ -0,0 +1,29 @@
+#ifndef ALPHA_IO_H
+#define ALPHA_IO_H
+
+#include <arch/compiler.h>
+
+#define mb() \
+__asm__ __volatile__("mb": : :"memory")
+
+#define rmb() \
+__asm__ __volatile__("mb": : :"memory")
+
+#define wmb() \
+__asm__ __volatile__("wmb": : :"memory")
+
+/*
+ * Virtual -> physical identity mapping starts at this offset
+ */
+#ifdef USE_48_BIT_KSEG
+#define IDENT_ADDR 0xffff800000000000
+#else
+#define IDENT_ADDR 0xfffffc0000000000
+#endif
+
+#if defined(USE_CORE_TSUNAMI)
+#include <northbridge/alpha/tsunami/core_tsunami.h>
+#else
+#error "What system is this?"
+#endif
+#endif /* ALPHA_IO_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/pal.h freebios/src/arch/alpha/include/arch/pal.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/include/arch/pal.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/include/arch/pal.h Thu Mar 15 22:24:45 2001
@@ -0,0 +1,51 @@
+#ifndef __ALPHA_PAL_H
+#define __ALPHA_PAL_H
+
+/*
+ * Common PAL-code
+ */
+#define PAL_halt 0
+#define PAL_cflush 1
+#define PAL_draina 2
+#define PAL_bpt 128
+#define PAL_bugchk 129
+#define PAL_chmk 131
+#define PAL_callsys 131
+#define PAL_imb 134
+#define PAL_rduniq 158
+#define PAL_wruniq 159
+#define PAL_gentrap 170
+#define PAL_nphalt 190
+
+/*
+ * VMS specific PAL-code
+ */
+#define PAL_swppal 10
+#define PAL_mfpr_vptb 41
+
+/*
+ * OSF specific PAL-code
+ */
+#define PAL_cserve 9
+#define PAL_wripir 13
+#define PAL_rdmces 16
+#define PAL_wrmces 17
+#define PAL_wrfen 43
+#define PAL_wrvptptr 45
+#define PAL_jtopal 46
+#define PAL_swpctx 48
+#define PAL_wrval 49
+#define PAL_rdval 50
+#define PAL_tbi 51
+#define PAL_wrent 52
+#define PAL_swpipl 53
+#define PAL_rdps 54
+#define PAL_wrkgp 55
+#define PAL_wrusp 56
+#define PAL_wrperfmon 57
+#define PAL_rdusp 58
+#define PAL_whami 60
+#define PAL_rtsys 61
+#define PAL_rti 63
+
+#endif /* __ALPHA_PAL_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/Config freebios/src/arch/alpha/lib/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/lib/Config Tue Mar 20 20:34:51 2001
@@ -0,0 +1,9 @@
+object hardwaremain.o
+
+makedefine OBJECTS+= __divqu.o __remqu.o __divlu.o __remlu.o
+
+makerule __divqu.o: $(TOP)/src/arch/alpha/lib/divide.S; $(CC) $(CFLAGS) -DDIV -c -o __divqu.o $<
+makerule __remqu.o: $(TOP)/src/arch/alpha/lib/divide.S; $(CC) $(CFLAGS) -DREM -c -o __remqu.o $<
+makerule __divlu.o: $(TOP)/src/arch/alpha/lib/divide.S; $(CC) $(CFLAGS) -DDIV -DINTSIZE -c -o __divlu.o $<
+makerule __remlu.o: $(TOP)/src/arch/alpha/lib/divide.S; $(CC) $(CFLAGS) -DREM -DINTSIZE -c -o __remlu.o $<
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/divide.S freebios/src/arch/alpha/lib/divide.S
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/divide.S Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/lib/divide.S Thu Mar 15 16:07:26 2001
@@ -0,0 +1,195 @@
+/*
+ * cpu/ev6/divide.S
+ *
+ * (C) 1995 Linus Torvalds
+ *
+ * Alpha division..
+ */
+
+/*
+ * The alpha chip doesn't provide hardware division, so we have to do it
+ * by hand. The compiler expects the functions
+ *
+ * __divqu: 64-bit unsigned long divide
+ * __remqu: 64-bit unsigned long remainder
+ * __divqs/__remqs: signed 64-bit
+ * __divlu/__remlu: unsigned 32-bit
+ * __divls/__remls: signed 32-bit
+ *
+ * These are not normal C functions: instead of the normal
+ * calling sequence, these expect their arguments in registers
+ * $24 and $25, and return the result in $27. Register $28 may
+ * be clobbered (assembly temporary), anything else must be saved.
+ *
+ * In short: painful.
+ *
+ * This is a rather simple bit-at-a-time algorithm: it's very good
+ * at dividing random 64-bit numbers, but the more usual case where
+ * the divisor is small is handled better by the DEC algorithm
+ * using lookup tables. This uses much less memory, though, and is
+ * nicer on the cache.. Besides, I don't know the copyright status
+ * of the DEC code.
+ */
+
+/*
+ * My temporaries:
+ * $0 - current bit
+ * $1 - shifted divisor
+ * $2 - modulus/quotient
+ *
+ * $23 - return address
+ * $24 - dividend
+ * $25 - divisor
+ *
+ * $27 - quotient/modulus
+ * $28 - compare status
+ */
+
+#define halt .long 0
+
+/*
+ * Select function type and registers
+ */
+#define mask $0
+#define divisor $1
+#define compare $28
+#define tmp1 $3
+#define tmp2 $4
+
+#ifdef DIV
+#define DIV_ONLY(x,y...) x,##y
+#define MOD_ONLY(x,y...)
+#define func(x) __div##x
+#define modulus $2
+#define quotient $27
+#define GETSIGN(x) xor $24,$25,x
+#define STACK 48
+#else
+#define DIV_ONLY(x,y...)
+#define MOD_ONLY(x,y...) x,##y
+#define func(x) __rem##x
+#define modulus $27
+#define quotient $2
+#define GETSIGN(x) bis $24,$24,x
+#define STACK 32
+#endif
+
+/*
+ * For 32-bit operations, we need to extend to 64-bit
+ */
+#ifdef INTSIZE
+#define ufunction func(lu)
+#define sfunction func(l)
+#define LONGIFY(x) zapnot x,15,x
+#define SLONGIFY(x) addl x,0,x
+#else
+#define ufunction func(qu)
+#define sfunction func(q)
+#define LONGIFY(x)
+#define SLONGIFY(x)
+#endif
+
+.set noat
+.align 3
+.globl ufunction
+.ent ufunction
+ufunction:
+ subq $30,STACK,$30
+ .frame $30,STACK,$23
+ .prologue 0
+
+7: stq $1, 0($30)
+ bis $25,$25,divisor
+ stq $2, 8($30)
+ bis $24,$24,modulus
+ stq $0,16($30)
+ bis $31,$31,quotient
+ LONGIFY(divisor)
+ stq tmp1,24($30)
+ LONGIFY(modulus)
+ bis $31,1,mask
+ DIV_ONLY(stq tmp2,32($30))
+ beq divisor, 9f /* div by zero */
+
+#ifdef INTSIZE
+ /*
+ * shift divisor left, using 3-bit shifts for
+ * 32-bit divides as we can't overflow. Three-bit
+ * shifts will result in looping three times less
+ * here, but can result in two loops more later.
+ * Thus using a large shift isn't worth it (and
+ * s8add pairs better than a sll..)
+ */
+1: cmpult divisor,modulus,compare
+ s8addq divisor,$31,divisor
+ s8addq mask,$31,mask
+ bne compare,1b
+#else
+1: cmpult divisor,modulus,compare
+ blt divisor, 2f
+ addq divisor,divisor,divisor
+ addq mask,mask,mask
+ bne compare,1b
+ unop
+#endif
+
+ /* ok, start to go right again.. */
+2: DIV_ONLY(addq quotient,mask,tmp2)
+ srl mask,1,mask
+ cmpule divisor,modulus,compare
+ subq modulus,divisor,tmp1
+ DIV_ONLY(cmovne compare,tmp2,quotient)
+ srl divisor,1,divisor
+ cmovne compare,tmp1,modulus
+ bne mask,2b
+
+9: ldq $1, 0($30)
+ ldq $2, 8($30)
+ ldq $0,16($30)
+ ldq tmp1,24($30)
+ DIV_ONLY(ldq tmp2,32($30))
+ addq $30,STACK,$30
+ ret $31,($23),1
+ .end ufunction
+
+/*
+ * Uhh.. Ugly signed division. I'd rather not have it at all, but
+ * it's needed in some circumstances. There are different ways to
+ * handle this, really. This does:
+ * -a / b = a / -b = -(a / b)
+ * -a % b = -(a % b)
+ * a % -b = a % b
+ * which is probably not the best solution, but at least should
+ * have the property that (x/y)*y + (x%y) = x.
+ */
+.align 3
+.globl sfunction
+.ent sfunction
+sfunction:
+ subq $30,STACK,$30
+ .frame $30,STACK,$23
+ .prologue 0
+ bis $24,$25,$28
+ SLONGIFY($28)
+ bge $28,7b
+ stq $24,0($30)
+ subq $31,$24,$28
+ stq $25,8($30)
+ cmovlt $24,$28,$24 /* abs($24) */
+ stq $23,16($30)
+ subq $31,$25,$28
+ stq tmp1,24($30)
+ cmovlt $25,$28,$25 /* abs($25) */
+ unop
+ bsr $23,ufunction
+ ldq $24,0($30)
+ ldq $25,8($30)
+ GETSIGN($28)
+ subq $31,$27,tmp1
+ SLONGIFY($28)
+ ldq $23,16($30)
+ cmovlt $28,tmp1,$27
+ ldq tmp1,24($30)
+ addq $30,STACK,$30
+ ret $31,($23),1
+ .end sfunction
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/hardwaremain.c freebios/src/arch/alpha/lib/hardwaremain.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/alpha/lib/hardwaremain.c Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/alpha/lib/hardwaremain.c Tue Mar 20 22:29:02 2001
@@ -0,0 +1,29 @@
+#include <stdlib.h>
+#include <boot/elf.h>
+#include <printk.h>
+#include <subr.h>
+
+void hardwaremain(unsigned long signature, unsigned long memsize,
+ unsigned long cpu_speed)
+{
+ early_mainboard_init();
+ displayinit();
+
+ printk("\n\nsignature=0x%016lx memsize=0x%016lx cpu_speed=0x%016lx\n",
+ signature, memsize, cpu_speed);
+ elfboot(memsize >> 10 /* In kilobytes */);
+ printk("\n after elfboot\n");
+}
+
+void fatal_error(unsigned long exception_handler, unsigned long exception_at,
+ unsigned long return_address)
+{
+ /* Just in case we are totally messed up */
+ early_mainboard_init();
+ displayinit();
+ printk("\n\nFault: 0x%0lx\n", exception_handler);
+ printk("PC: 0x%0lx\n", exception_at);
+ printk("RA: 0x%0lx\n", return_address);
+ /* Now spin forever */
+ while(1) {;}
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/Config freebios/src/arch/i386/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/Config Mon Mar 12 21:22:19 2001
+++ freebios/src/arch/i386/Config Fri Mar 16 17:39:45 2001
@@ -1,2 +1,2 @@
-makedefine ARCH=i386
dir boot
+dir lib
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/crt0.base freebios/src/arch/i386/config/crt0.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/crt0.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/config/crt0.base Wed Mar 21 17:05:04 2001
@@ -0,0 +1,109 @@
+/*
+ * $ $
+ *
+ */
+
+#include <asm.h>
+#include <intel.h>
+
+#include <pciconf.h>
+/*
+ * This is the entry code (the mkrom(8) utility makes a jumpvector
+ * to this adddess.
+ *
+ * When we get here we are in x86 real mode.
+ *
+ * %cs = 0xf000 %ip = 0x0000
+ * %ds = 0x0000 %es = 0x0000
+ * %dx = 0x0yxx (y = 3 for i386, 5 for pentium, 6 for P6,
+ * where x is undefined)
+ * %fl = 0x0002
+ */
+ .text
+ .code16
+
+#include <cpu/p5/start32.inc>
+
+#include <pc80/i8259.inc>
+
+CRT0_PARAMETERS
+
+/* Turn on mtrr for faster boot */
+#include <cpu/p6/earlymtrr.inc>
+
+/*
+ * Copy data into RAM and clear the BSS. Since these segments
+ * isn\'t really that big we just copy/clear using bytes, not
+ * double words.
+ */
+ intel_chip_post_macro(0x11) /* post 11 */
+
+#ifdef SERIAL_CONSOLE
+ TTYS0_TX_STRING($str_after_ram)
+#endif /* SERIAL_CONSOLE */
+
+ cld /* clear direction flag */
+
+ /* copy data segment from FLASH ROM to RAM */
+ leal EXT(_ldata), %esi
+ leal EXT(_data), %edi
+ movl $EXT(_eldata), %ecx
+ subl %esi, %ecx
+ jz .Lnodata /* should not happen */
+ rep
+ movsb
+.Lnodata:
+ intel_chip_post_macro(0x12) /* post 12 */
+
+#ifdef SERIAL_CONSOLE
+ TTYS0_TX_STRING($str_after_ram)
+#endif /* SERIAL_CONSOLE */
+
+ /** clear stack */
+ leal EXT(_stack), %edi
+ movl $EXT(_estack), %ecx
+ subl %edi, %ecx
+ xorl %eax, %eax
+ rep
+ stosb
+
+ /** clear bss */
+ leal EXT(_bss), %edi
+ movl $EXT(_ebss), %ecx
+ subl %edi, %ecx
+ jz .Lnobss
+ xorl %eax, %eax
+ rep
+ stosb
+.Lnobss:
+
+/*
+ * Now we are finished. Memory is up, data is copied and
+ * bss is cleared. Now we call the main routine and
+ * let it do the rest.
+ */
+ intel_chip_post_macro(0xfe) /* post fe */
+
+#ifdef SERIAL_CONSOLE
+ TTYS0_TX_STRING($str_pre_main)
+#endif /* SERIAL_CONSOLE */
+
+
+/* memory is up. Let\'s do the rest in C -- much easier. */
+
+ /* set new stack */
+ movl $_estack, %esp
+
+ intel_chip_post_macro(0xfd) /* post fe */
+ call EXT(intel_main)
+ /*NOTREACHED*/
+.Lhlt:
+ intel_chip_post_macro(0xee) /* post fe */
+ hlt
+ jmp .Lhlt
+
+ttyS0_test: .string "\r\n\r\nHello world!!\r\n"
+str_after_ram: .string "Ram Initialize?\r\n"
+str_after_copy: .string "after copy?\r\n"
+str_pre_main: .string "before main\r\n"
+newline: .string "\r\n"
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/ldscript.base freebios/src/arch/i386/config/ldscript.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/ldscript.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/config/ldscript.base Wed Mar 21 17:13:17 2001
@@ -0,0 +1,116 @@
+/*
+ * Memory map:
+ *
+ * _RAMBASE
+ * : data segment
+ * : bss segment
+ * : heap
+ * : stack
+ * _ROMBASE
+ * : linuxbios text
+ * : readonly text
+ */
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ * $Id: ldscript.base,v 1.2 2001/01/11 04:03:42 rminnich Exp $
+ *
+ */
+
+/*
+ * Written by Johan Rydberg, based on work by Daniel Kahlin.
+ * Rewritten by Eric Biederman
+ */
+/*
+ * We use ELF as output format. So that we can
+ * debug the code in some form.
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+/* oh, barf. This wont work if all you use is .o's. -- RGM */
+
+
+ /* These are now set by the config tool
+ _RAMBASE = 0x04000;
+ _ROMBASE = 0x80000;
+ */
+
+/*
+ * Entry point is not really nececary, since the mkrom(8)
+ * tool creates a entry point that jumps to $0xc000:0x0000.
+ */
+/* baloney, but ... RGM*/
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * First we place the code and read only data (typically const declared).
+ * This get placed in rom.
+ */
+ .text _ROMBASE : {
+ _text = .;
+ *(.text);
+ _etext = .;
+ }
+ .rodata (.) : {
+ _rodata = .;
+ *(.rodata);
+ _erodata = .;
+ }
+
+ . = _RAMBASE;
+ /*
+ * After the code we place initialized data (typically initialized
+ * global variables). This gets copied into ram by startup code.
+ * __data_start and __data_end shows where in ram this should be placed,
+ * whereas __data_loadstart and __data_loadend shows where in rom to
+ * copy from.
+ */
+ .data (.): AT (_erodata) {
+ _data = .;
+ *(.data)
+ *(.sdata)
+ *(.sdata2)
+ *(.got)
+ _edata = .;
+ }
+ _ldata = LOADADDR(.data);
+ _eldata = LOADADDR(.data) + SIZEOF(.data);
+
+ /*
+ * bss does not contain data, it is just a space that should be zero
+ * initialized on startup. (typically uninitialized global variables)
+ * crt0.S fills between _bss and _ebss with zeroes.
+ */
+ .bss (.): {
+ _bss = .;
+ *(.bss)
+ *(.sbss)
+ *(COMMON)
+ _ebss = .;
+ }
+ _end = .;
+
+ .heap (.): {
+ _heap = .;
+ /* Reserve 64K for the heap */
+ . = . + 0x10000;
+ _eheap = .;
+ }
+ .stack (.) : {
+ _stack = .;
+ /* Resever 64k for the stack */
+ . = . + 0x10000;
+ _estack = .;
+ }
+}
+
+/*
+ * This provides the start and end address for the whole image
+ */
+_image = LOADADDR(.text);
+_eimage = LOADADDR(.data) + SIZEOF(.data);
+
+/* EOF */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/make.base freebios/src/arch/i386/config/make.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/config/make.base Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/config/make.base Wed Mar 21 18:07:20 2001
@@ -0,0 +1,41 @@
+biosbase 0xf0000
+rambase 0x4000
+makedefine LINK = ld -T ldscript.ld -o $@ crt0.o linuxbios.a
+makedefine CPPFLAGS= -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include $(CPUFLAGS)
+makedefine CFLAGS= $(CPU_OPT) $(CPPFLAGS) -O2 -nostdinc -nostdlib -fno-builtin -Wall
+makedefine CC=cc
+makerule all : romimage ;
+makerule floppy : all ; mcopy -o romimage a:
+makerule romimage : linuxbios.rom vmlinux.bin.gz.block ; cat vmlinux.bin.gz.block linuxbios.rom > romimage
+makerule linuxbios.rom: linuxbios.strip mkrom ; ./mkrom -s 64 -f -o linuxbios.rom linuxbios.strip
+makerule linuxbios.strip: linuxbios ; objcopy -O binary -R .note -R .comment -S linuxbios linuxbios.strip
+makerule linuxbios: linuxbios.a vmlinux.bin.gz ; @rm -f biosobject
+addaction linuxbios $(LINK)
+addaction linuxbios nm -n linuxbios > linuxbios.map
+
+makerule linuxbios.a : $(OBJECTS) ; rm -f linuxbios.a
+addaction linuxbios.a ar cr linuxbios.a $(OBJECTS)
+
+makerule crt0.s: crt0.S ; $(CC) $(CPPFLAGS) -I$(TOP)/src -E $< > crt0.s
+
+makerule crt0.o : crt0.s; $(CC) $(CPU_OPT) -c crt0.s
+makerule mkrom: $(TOP)/mkrom/mkrom.c ; $(CC) -o mkrom $<
+
+makerule clean : ; rm -f linuxbios.* vmlinux.* *.o mkrom xa? *~
+addaction clean rm -f linuxbios romimage crt0.s
+addaction clean rm -f a.out *.s *.l
+addaction clean rm -f TAGS tags
+addaction clean rm -f docipl
+
+
+makerule vmlinux.bin.gz.block : vmlinux.bin.gz ; dd conv=sync bs=448k if=vmlinux.bin.gz of=vmlinux.bin.gz.block
+makerule vmlinux.bin.gz: vmlinux.bin ;gzip -f -3 vmlinux.bin
+makerule vmlinux.bin: $(LINUX)/vmlinux ; objcopy -O binary -R .note -R .comment -S $< vmlinux.bin
+
+
+# do standard config files that the user need not specify
+# for now, this is just 'lib', but it may be more later.
+dir /src/arch/i386
+dir /src/lib
+dir /src/boot
+dir /src/rom
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/include/arch/io.h freebios/src/arch/i386/include/arch/io.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/include/arch/io.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/include/arch/io.h Fri Mar 16 17:38:05 2001
@@ -0,0 +1 @@
+#include <cpu/p5/io.h>
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/include/i386_subr.h freebios/src/arch/i386/include/i386_subr.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/include/i386_subr.h Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/include/i386_subr.h Thu Mar 15 12:44:06 2001
@@ -0,0 +1,41 @@
+#ifndef I386_SUBR_H
+#define I386_SUBR_H
+
+/*
+ * Read/Write the special configuration registers on the INTEL
+ */
+// TODO: split this thing up. Delete the intel_ names
+// that really are not intel-specific, e.g. intel_conf_readb should
+// be conf_readb -- those addresses are defined in the PCI spec.
+unsigned char intel_conf_readb(unsigned long port);
+void intel_conf_writeb(unsigned long port, unsigned char value);
+
+void intel_keyboard_on();
+void intel_smpblock(void *v);
+void intel_nvram_on();
+
+void intel_conf_writeb(unsigned long port, unsigned char value);
+unsigned char intel_conf_readb(unsigned long port);
+void intel_cache_on(unsigned long base, unsigned long totalram);
+void intel_interrupts_on(void);
+void pc_keyboard_init(void);
+void intel_mainboard_fixup(void);
+unsigned long sizeram(void);
+
+#ifdef INTEL_PPRO_MTRR
+void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK);
+#endif
+
+#include <pci.h>
+/* FIXME: how should we handle other architectures for pci access here ?? */
+#include <pci-i386.h>
+
+#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
+#define PIRQ_VERSION 0x0100
+
+extern const struct irq_routing_table intel_irq_routing_table;
+
+void intel_zero_irq_settings(void);
+void intel_check_irq_routing_table(void);
+
+#endif /* I386_SUBR_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/Config freebios/src/arch/i386/lib/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/lib/Config Fri Mar 16 17:40:20 2001
@@ -0,0 +1,3 @@
+object i386_subr.o
+object params.o
+object hardwaremain.o
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/hardwaremain.c freebios/src/arch/i386/lib/hardwaremain.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/hardwaremain.c Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/lib/hardwaremain.c Wed Mar 21 00:13:26 2001
@@ -0,0 +1,197 @@
+/*
+This software and ancillary information (herein called SOFTWARE )
+called LinuxBIOS is made available under the terms described
+here. The SOFTWARE has been approved for release with associated
+LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
+been authored by an employee or employees of the University of
+California, operator of the Los Alamos National Laboratory under
+Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
+U.S. Government has rights to use, reproduce, and distribute this
+SOFTWARE. The public may copy, distribute, prepare derivative works
+and publicly display this SOFTWARE without charge, provided that this
+Notice and any statement of authorship are reproduced on all copies.
+Neither the Government nor the University makes any warranty, express
+or implied, or assumes any liability or responsibility for the use of
+this SOFTWARE. If SOFTWARE is modified to produce derivative works,
+such modified SOFTWARE should be clearly marked, so as not to confuse
+it with the version available from LANL.
+ */
+/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
+ * [EMAIL PROTECTED]
+ */
+
+
+/*
+ * C Bootstrap code for the INTEL
+ * $Id: hardwaremain.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $
+ *
+ */
+
+#define LINUXBIOS
+#ifndef lint
+static char rcsid[] = "$Id: hardwaremain.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $";
+#endif
+
+#include <cpu/p5/io.h>
+#include <intel.h>
+#include <pciconf.h>
+#include <cpu/p5/cpuid.h>
+#include <cpu/p6/ioapic.h>
+#include <subr.h>
+#include <printk.h>
+
+void intel_main()
+{
+ // These are only used here, so don't bother putting them in a .h
+ void mainboard_fixup(void);
+ void nvram_on(void);
+ void keyboard_on(void);
+ void framebuffer_on(void);
+ void intel_copy_irq_routing_table(void);
+
+#ifdef FINAL_MAINBOARD_FIXUP
+ void final_mainboard_fixup(void);
+#endif /* FINAL_MAINBOARD_FIXUP */
+
+#ifdef CONFIGURE_L2_CACHE
+ int intel_l2_configure();
+#endif /* CONFIGURE_L2_CACHE */
+
+#ifdef UPDATE_MICROCODE
+ void intel_display_cpuid_microcode(void);
+#endif /* UPDATE_MICROCODE */
+
+ /* the order here is a bit tricky. We don't want to do much of
+ * anything that uses config registers until after PciAllocateResources
+ * since that function also figures out what kind of config strategy
+ * to use (type 1 or type 2).
+ * so we turn on cache, then worry about PCI setup, then do other
+ * things, so that the other work can use the PciRead* and PciWrite*
+ * functions.
+ */
+ unsigned long totalram = 0;
+ extern void linuxbiosmain(unsigned long membase, unsigned long totalram);
+
+ /* displayinit MUST PRECEDE ALL PRINTK! */
+ displayinit();
+
+ post_code(0x39);
+
+ printk(KERN_INFO "Reached intel_main().\n");
+
+ post_code(0x40);
+
+#ifdef UPDATE_MICROCODE
+ post_code(0x41);
+ printk(KERN_INFO "Updating microcode\n");
+ intel_display_cpuid_microcode();
+#endif /* UPDATE_MICROCODE */
+ post_code(0x42);
+
+ // pick how to scan the bus. This is first so we can get at memory size.
+ printk(KERN_INFO "Finding PCI confiuration type...\n");
+ pci_set_method();
+ post_code(0x5f);
+
+ printk(KERN_INFO "Scanning PCI bus...");
+ pci_enumerate();
+ post_code(0x66);
+ printk(KERN_INFO "done\n");
+
+ // The framebuffer can change how much memory you have.
+ // So you really need to run this before you size ram.
+#ifdef HAVE_FRAMEBUFFER
+ framebuffer_on();
+#endif /* HAVE_FRAMEBUFFER */
+
+ totalram = sizeram();
+ post_code(0x70);
+ printk(KERN_INFO "totalram: %ldM\n", totalram/1024);
+
+ // can't size just yet ...
+ // mainboard totalram sizing may not be up yet. If it is not ready,
+ // take a default of 64M
+ if (!totalram)
+ totalram = 64 * 1024;
+
+ // Turn on cache before configuring the bus.
+ printk(KERN_INFO "Enabling cache...");
+ intel_cache_on(0, totalram);
+ post_code(0x80);
+ printk(KERN_INFO "done.\n");
+
+ printk(KERN_INFO "Allocating PCI resources...");
+ // Now do the real bus
+ // we round the total ram up a lot for thing like the SISFB, which
+ // shares high memory with the CPU.
+ pci_configure();
+ post_code(0x88);
+ pci_enable();
+ post_code(0x90);
+ printk(KERN_INFO "done.\n");
+
+ /* set up the IO-APIC for the clock interrupt. */
+ post_code(0x92);
+ setup_ioapic();
+
+ // generic mainboard fixup
+ mainboard_fixup();
+
+#ifndef MAINBOARD_FIXUP_IN_CHARGE
+
+ nvram_on();
+
+ intel_display_cpuid();
+ intel_mtrr_check();
+
+#ifndef NO_KEYBOARD
+ keyboard_on();
+#endif /* NO_KEYBOARD */
+
+#ifdef MUST_ENABLE_FLOPPY
+ enable_floppy();
+ post_code(0x95);
+#endif /* MUST_ENABLE_FLOPPY */
+
+#ifdef SMP
+ /* copy the smp block to address 0 */
+ intel_smpblock((void *)16);
+ post_code(0x96);
+#endif /* SMP */
+
+ intel_zero_irq_settings();
+ intel_check_irq_routing_table();
+ intel_copy_irq_routing_table();
+
+ post_code(0x9a);
+
+ /* to do: intel_serial_on(); */
+ intel_interrupts_on();
+
+
+#ifdef FINAL_MAINBOARD_FIXUP
+ printk(KERN_INFO "Final mainboard fixup for ");
+ post_code(0xec);
+ final_mainboard_fixup();
+ printk(KERN_INFO "done.\n");
+#endif /* FINAL_MAINBOARD_FIXUP */
+
+#ifdef CONFIGURE_L2_CACHE
+ /* now that everything is really up, enable the l2 cache if desired.
+ * The enable can wait until this point, because linuxbios and it's
+ * data areas are tiny, easily fitting into the L1 cache.
+ */
+ printk(KERN_INFO "Configuring L2 cache...");
+ intel_l2_configure();
+ printk(KERN_INFO "done.\n");
+#endif /* CONFIGURE_L2_CACHE */
+
+#endif /* MAINBOARD_FIXUP_IN_CHARGE */
+
+#ifdef LINUXBIOS
+ printk(KERN_INFO "Jumping to linuxbiosmain()...\n");
+ // we could go to argc, argv, for main but it seems like overkill.
+ post_code(0xed);
+ linuxbiosmain(0, totalram);
+#endif /* LINUXBIOS */
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/i386_subr.c freebios/src/arch/i386/lib/i386_subr.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/i386_subr.c Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/lib/i386_subr.c Thu Mar 15 15:06:24 2001
@@ -0,0 +1,163 @@
+#include <cpu/p5/io.h>
+#include <cpu/p5/macros.h>
+#include <cpu/p6/msr.h>
+
+#include <printk.h>
+#include <pci.h>
+#include <subr.h>
+#include <string.h>
+
+void intel_cache_on(unsigned long base, unsigned long totalram)
+{
+ post_code(0x60);
+
+ /* we need an #ifdef i586 here at some point ... */
+ __asm__ __volatile__("mov %cr0, %eax\n\t"
+ "and $0x9fffffff,%eax\n\t"
+ "mov %eax, %cr0\n\t");
+ /* turns out cache isn't really on until you set MTRR registers on
+ * 686 and later.
+ * NOTHING FANCY. Linux does a much better job anyway.
+ * so absolute minimum needed to get it going.
+ */
+ /* OK, linux it turns out does nothing. We have to do it ... */
+#ifdef i686
+ // totalram here is in linux sizing, i.e. units of KB.
+ // set_mtrr is responsible for getting it into the right units!
+ intel_set_mtrr(base, totalram);
+#endif
+ post_code(0x6A);
+}
+
+void intel_interrupts_on()
+{
+
+ /* this is so interrupts work. This is very limited scope --
+ * linux will do better later, we hope ...
+ */
+ /* this is the first way we learned to do it. It fails on real SMP
+ * stuff. So we have to do things differently ...
+ * see the Intel mp1.4 spec, page A-3
+ */
+#ifdef SMP
+ unsigned long reg, *regp;
+#define SVR 0xfee000f0
+#define LVT1 0xfee00350
+#define LVT2 0xfee00360
+#define APIC_ENABLED 0x100
+
+ printk(KERN_INFO "Enabling interrupts...");
+
+ regp = (unsigned long *) SVR;
+ reg = *regp;
+ reg &= (~0xf0);
+ reg |= APIC_ENABLED;
+ *regp = reg;
+
+ regp = (unsigned long *) LVT1;
+ reg = *regp;
+ reg &= 0xfffe00ff;
+ reg |= 0x5700;
+ *regp = reg;
+
+ regp = (unsigned long *) LVT2;
+ reg = *regp;
+ reg &= 0xfffe00ff;
+ reg |= 0x5400;
+ *regp = reg;
+#else
+ unsigned long low, high;
+
+ printk(KERN_INFO "Enabling interrupts...");
+
+ rdmsr(0x1b, low, high);
+ low &= ~0x800;
+ wrmsr(0x1b, low, high);
+#endif
+
+ printk(KERN_INFO "done.\n");
+ post_code(0x9b);
+}
+
+
+/* These functions should be chip-set independent -tds */
+void intel_zero_irq_settings(void)
+{
+ struct pci_dev *pcidev;
+ unsigned char line;
+
+ printk(KERN_INFO "Zeroing IRQ settings...");
+
+ pcidev = pci_devices;
+
+ while (pcidev) {
+ pci_read_config_byte(pcidev, 0x3d, &line);
+ if (line) {
+ pci_write_config_byte(pcidev, 0x3c, 0);
+ }
+ pcidev = pcidev->next;
+ }
+ printk(KERN_INFO "done.\n");
+}
+
+void intel_check_irq_routing_table(void)
+{
+#ifdef HAVE_PIRQ_TABLE
+ const u8 *addr;
+ const struct irq_routing_table *rt;
+ int i;
+ u8 sum;
+
+ printk(KERN_INFO "Checking IRQ routing tables...");
+
+ rt = &intel_irq_routing_table;
+ addr = (u8 *)rt;
+
+ sum = 0;
+ for (i = 0; i < rt->size; i++)
+ sum += addr[i];
+
+ DBG("%s:%6d:%s() - irq_routing_table located at: 0x%p\n",
+ __FILE__, __LINE__, __FUNCTION__, addr);
+
+ sum = (unsigned char)(rt->checksum-sum);
+
+ if (sum != rt->checksum) {
+ printk(KERN_WARNING "%s:%6d:%s() - "
+ "checksum is: 0x%02x but should be: 0x%02x\n",
+ __FILE__, __LINE__, __FUNCTION__, rt->checksum, sum);
+ }
+
+ if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
+ rt->size % 16 || rt->size < sizeof(struct irq_routing_table)) {
+ printk(KERN_WARNING "%s:%6d:%s() - "
+ "Interrupt Routing Table not valid\n",
+ __FILE__, __LINE__, __FUNCTION__);
+ return;
+ }
+
+ sum = 0;
+ for (i=0; i<rt->size; i++)
+ sum += addr[i];
+
+ if (sum) {
+ printk(KERN_WARNING "%s:%6d:%s() - "
+ "checksum error in irq routing table\n",
+ __FILE__, __LINE__, __FUNCTION__);
+ }
+
+ printk(KERN_INFO "done.\n");
+#endif /* #ifdef HAVE_PIRQ_TABLE */
+}
+
+#define RTABLE_DEST 0xf0000
+
+void intel_copy_irq_routing_table(void)
+{
+#ifdef HAVE_PIRQ_TABLE
+ printk(KERN_INFO "Copying IRQ routing tables...");
+ memcpy((char *) RTABLE_DEST, &intel_irq_routing_table, intel_irq_routing_table.size);
+ printk(KERN_INFO "done.\n");
+#endif
+}
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/params.c freebios/src/arch/i386/lib/params.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/arch/i386/lib/params.c Wed Dec 31 17:00:00 1969
+++ freebios/src/arch/i386/lib/params.c Tue Mar 13 17:40:36 2001
@@ -0,0 +1,166 @@
+#include <string.h>
+
+/*
+This software and ancillary information (herein called SOFTWARE )
+called LinuxBIOS is made available under the terms described
+here. The SOFTWARE has been approved for release with associated
+LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
+been authored by an employee or employees of the University of
+California, operator of the Los Alamos National Laboratory under
+Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
+U.S. Government has rights to use, reproduce, and distribute this
+SOFTWARE. The public may copy, distribute, prepare derivative works
+and publicly display this SOFTWARE without charge, provided that this
+Notice and any statement of authorship are reproduced on all copies.
+Neither the Government nor the University makes any warranty, express
+or implied, or assumes any liability or responsibility for the use of
+this SOFTWARE. If SOFTWARE is modified to produce derivative works,
+such modified SOFTWARE should be clearly marked, so as not to confuse
+it with the version available from LANL.
+ */
+/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
+ * [EMAIL PROTECTED]
+ */
+
+#ifndef lint
+static char rcsid[] = "$Id: params.c,v 1.5 2001/03/13 04:22:19 rminnich Exp $";
+#endif
+
+struct screen_info {
+ unsigned char orig_x; /* 0x00 */
+ unsigned char orig_y; /* 0x01 */
+ unsigned short dontuse1; /* 0x02 -- EXT_MEM_K sits here */
+ unsigned short orig_video_page; /* 0x04 */
+ unsigned char orig_video_mode; /* 0x06 */
+ unsigned char orig_video_cols; /* 0x07 */
+ unsigned short unused2; /* 0x08 */
+ unsigned short orig_video_ega_bx; /* 0x0a */
+ unsigned short unused3; /* 0x0c */
+ unsigned char orig_video_lines; /* 0x0e */
+ unsigned char orig_video_isVGA; /* 0x0f */
+ unsigned short orig_video_points; /* 0x10 */
+
+ /* VESA graphic mode -- linear frame buffer */
+ unsigned short lfb_width; /* 0x12 */
+ unsigned short lfb_height; /* 0x14 */
+ unsigned short lfb_depth; /* 0x16 */
+ unsigned long lfb_base; /* 0x18 */
+ unsigned long lfb_size; /* 0x1c */
+ unsigned short dontuse2, dontuse3; /* 0x20 -- CL_MAGIC and CL_OFFSET here */
+ unsigned short lfb_linelength; /* 0x24 */
+ unsigned char red_size; /* 0x26 */
+ unsigned char red_pos; /* 0x27 */
+ unsigned char green_size; /* 0x28 */
+ unsigned char green_pos; /* 0x29 */
+ unsigned char blue_size; /* 0x2a */
+ unsigned char blue_pos; /* 0x2b */
+ unsigned char rsvd_size; /* 0x2c */
+ unsigned char rsvd_pos; /* 0x2d */
+ unsigned short vesapm_seg; /* 0x2e */
+ unsigned short vesapm_off; /* 0x30 */
+ unsigned short pages; /* 0x32 */
+ /* 0x34 -- 0x3f reserved for future expansion */
+};
+
+#define E820MAP 0x2d0 /* our map */
+#define E820MAX 32 /* number of entries in E820MAP */
+#define E820NR 0x1e8 /* # entries in E820MAP */
+
+/* sigh, this is not a struct or include file thing. */
+#ifdef i386
+/* from linux 2.2.13 */
+/*
+ * This is set up by the setup-routine at boot-time
+ */
+#define PARAM ((unsigned char *)empty_zero_page)
+#define SCREEN_INFO (*(struct screen_info *) (PARAM+0))
+#define EXT_MEM_K (*(unsigned short *) (PARAM+2))
+#define ALT_MEM_K (*(unsigned long *) (PARAM+0x1e0))
+#define E820_MAP_NR (*(char*) (PARAM+E820NR))
+#define E820_MAP ((unsigned long *) (PARAM+E820MAP))
+#define APM_BIOS_INFO (*(struct apm_bios_info *) (PARAM+0x40))
+#define DRIVE_INFO (*(struct drive_info_struct *) (PARAM+0x80))
+#define SYS_DESC_TABLE (*(struct sys_desc_table_struct*)(PARAM+0xa0))
+#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2))
+#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8))
+#define ORIG_ROOT_DEV (*(unsigned short *) (PARAM+0x1FC))
+#define AUX_DEVICE_INFO (*(unsigned char *) (PARAM+0x1FF))
+#define LOADER_TYPE (*(unsigned char *) (PARAM+0x210))
+#define KERNEL_START (*(unsigned long *) (PARAM+0x214))
+#define INITRD_START (*(unsigned long *) (PARAM+0x218))
+#define INITRD_SIZE (*(unsigned long *) (PARAM+0x21c))
+#define COMMAND_LINE ((char *) (PARAM+2048))
+#define COMMAND_LINE_SIZE 256
+
+#endif
+/* this is support for passing parameters to the linux kernel.
+ * you can pass memory size, command lines, and so on.
+ */
+
+void
+init_params(unsigned char *empty_zero_page)
+{
+ memset(PARAM, 0, 4096 /*XXXXXXXXXXXXXXXXX */ );
+}
+
+void
+set_memory_size(unsigned char *empty_zero_page, unsigned long ext_memory_size,
+ unsigned long alt_memory_size)
+{
+ /* for now, we do not have an 820 map (who cares, 8x0 chipsets are dead! */
+ E820_MAP_NR = 0;
+ EXT_MEM_K = ext_memory_size;
+ ALT_MEM_K = alt_memory_size;
+}
+
+void
+set_root_rdonly(unsigned char *empty_zero_page)
+{
+ MOUNT_ROOT_RDONLY = 1;
+}
+
+/* see the lilo doc */
+void
+set_command_line(unsigned char *empty_zero_page, unsigned char *cmdline)
+{
+ int i;
+ /* no strncpy ...
+ strncpy(COMMAND_LINE, cmdline, COMMAND_LINE_SIZE);
+ */
+ for (i = 0; (i < COMMAND_LINE_SIZE) && (cmdline[i]); i++)
+ COMMAND_LINE[i] = cmdline[i];
+ *(unsigned short *) 0x90020 = 0xa33f;
+ *(unsigned short *) 0x90022 = 2048;
+}
+
+unsigned char *
+get_empty_zero_page()
+{
+ /* gosh, I thought we had to do get at empty_zero_page, and we don't.
+ * silly me. We just have to get to 0x90000
+ */
+ /* we'll leave this hook in for now. We may need it someday */
+// unsigned long l = *(unsigned long *) 0xffffc;
+
+ return (unsigned char *) 0x90000;
+}
+
+/* I am pretty sure we only need to set rows and cols for now.
+ * All the rest is BIOS stuff. If it gets worse we'll have to make this a
+ * screen_info * as the param
+ */
+void
+set_display(unsigned char *empty_zero_page, int rows, int cols)
+{
+ struct screen_info *sc = &SCREEN_INFO;
+ sc->orig_video_cols = cols;
+ sc->orig_video_lines = rows;
+}
+
+void
+set_initrd(unsigned char *empty_zero_page, unsigned long start, unsigned long size)
+{
+ INITRD_START = start;
+ INITRD_SIZE = size;
+ LOADER_TYPE = 1;
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/Config freebios/src/cpu/ev6/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/cpu/ev6/Config Tue Mar 20 20:26:08 2001
@@ -0,0 +1,2 @@
+makedefine CPU_OPT=-mcpu=ev6 -Wa,-m21264
+option USE_CPU_EV6=1
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/dc21264.h freebios/src/cpu/ev6/dc21264.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/dc21264.h Mon Mar 12 21:22:19 2001
+++ freebios/src/cpu/ev6/dc21264.h Tue Mar 20 21:23:46 2001
@@ -55,7 +55,7 @@
#define EV6_SCB__DTB_TAG1 ((1 << 1) | (1 << 5))
#define EV6_SCB__DTB_PTE0 ((1 << 0) | (1 << 4))
#define EV6_SCB__DTB_PTE1 ((1 << 3) | (1 << 7))
-#define EV6_SCB__DTB_ALTMODE (1 << 6)
+#define EV6_SCB__DTB_ALT_MODE (1 << 6)
#define EV6_SCB__DTB_IAP (1 << 7)
#define EV6_SCB__DTB_IA (1 << 7)
#define EV6_SCB__DTB_IS0 (1 << 6)
@@ -80,7 +80,7 @@
* =========================================================
*/
#define EV6__CC ((0xC0 << 8) | EV6_SCB__CC)
-#define EV6__CTL ((0xC1 << 8) | EV6_SCB__CTL)
+#define EV6__CC_CTL ((0xC1 << 8) | EV6_SCB__CC_CTL)
#define EV6__VA ((0xC2 << 8) | EV6_SCB__VA)
#define EV6__VA_CTL ((0xC4 << 8) | EV6_SCB__VA_CTL)
#define EV6__VA_FORM ((0xC3 << 8) | EV6_SCB__VA_FORM)
@@ -121,7 +121,7 @@
#define EV6__DTB_TAG1 ((0xA0 << 8) | EV6_SCB__DTB_TAG1)
#define EV6__DTB_PTE0 ((0x21 << 8) | EV6_SCB__DTB_PTE0)
#define EV6__DTB_PTE1 ((0xA1 << 8) | EV6_SCB__DTB_PTE1)
-#define EV6__DTB_ALTMODE ((0x26 << 8) | EV6_SCB__DTB_ALTMODE)
+#define EV6__DTB_ALT_MODE ((0x26 << 8) | EV6_SCB__DTB_ALT_MODE)
#define EV6__DTB_IAP ((0xA2 << 8) | EV6_SCB__DTB_IAP)
#define EV6__DTB_IA ((0xA3 << 8) | EV6_SCB__DTB_IA)
#define EV6__DTB_IS0 ((0x24 << 8) | EV6_SCB__DTB_IS0)
@@ -420,6 +420,14 @@
#define EV6__I_CTL__VPTB__V 18
#define EV6__I_CTL__VPTB__M ((1 << EV6__I_CTL__VPTB__V) -1)
+/* EV6__I_STAT */
+#define EV6__I_STAT__TPE__S 29
+#define EV6__I_STAT__TPE__V 1
+#define EV6__I_STAT__TPE__M ((1 << EV6__I_STAT__TPE__V) -1)
+#define EV6__I_STAT__DPE__S 30
+#define EV6__I_STAT__DPE__V 1
+#define EV6__I_STAT__DPE__M ((1 << EV6__I_STAT__DPE__V) -1)
+
/* EV6__IC_FLUSH (no subfields) */
/* EV6__IC_FLUSH_ASM (no subfields) */
/* EV6__CLR_MAP (no subfields */
@@ -634,4 +642,199 @@
/* EV6__C_DATA (no subfields) */
/* EV6__C_SHIFT (no subfields) */
-#endif /* DC21264_H */
+/*
+ * Palcode entry points
+ * =========================================================
+ */
+
+/* Exception pal entry points */
+#define EV6__DTBM_DOUBLE_3_ENTRY 0x100
+#define EV6__DTBM_DOUBLE_4_ENTRY 0x180
+#define EV6__FEN_ENTRY 0x200
+#define EV6__UNALIGN_ENTRY 0x280
+#define EV6__DTBM_SINGLE_ENTRY 0x300
+#define EV6__DFAULT_ENTRY 0x380
+#define EV6__OPCDEC_ENTRY 0x400
+#define EV6__IACV_ENTRY 0x480
+#define EV6__MCHK_ENTRY 0x500
+#define EV6__ITB_MISS_ENTRY 0x580
+#define EV6__ARITH_ENTRY 0x600
+#define EV6__INTERRUPT_ENTRY 0x680
+#define EV6__MT_FPCR_ENTRY 0x700
+#define EV6__RESET_ENTRY 0x780
+/* Privelidged pal entry points */
+#define EV6__CALL_PAL_00_ENTRY 0x2000 /* aka Halt */
+#define EV6__CALL_PAL_01_ENTRY 0x2040
+#define EV6__CALL_PAL_02_ENTRY 0x2080
+#define EV6__CALL_PAL_03_ENTRY 0x20C0
+#define EV6__CALL_PAL_04_ENTRY 0x2100
+#define EV6__CALL_PAL_05_ENTRY 0x2140
+#define EV6__CALL_PAL_06_ENTRY 0x2180
+#define EV6__CALL_PAL_07_ENTRY 0x21C0
+#define EV6__CALL_PAL_08_ENTRY 0x2200
+#define EV6__CALL_PAL_09_ENTRY 0x2240
+#define EV6__CALL_PAL_0A_ENTRY 0x2280
+#define EV6__CALL_PAL_0B_ENTRY 0x22C0
+#define EV6__CALL_PAL_0C_ENTRY 0x2300
+#define EV6__CALL_PAL_0D_ENTRY 0x2340
+#define EV6__CALL_PAL_0E_ENTRY 0x2380
+#define EV6__CALL_PAL_0F_ENTRY 0x23C0
+#define EV6__CALL_PAL_10_ENTRY 0x2400
+#define EV6__CALL_PAL_11_ENTRY 0x2440
+#define EV6__CALL_PAL_12_ENTRY 0x2480
+#define EV6__CALL_PAL_13_ENTRY 0x24C0
+#define EV6__CALL_PAL_14_ENTRY 0x2500
+#define EV6__CALL_PAL_15_ENTRY 0x2540
+#define EV6__CALL_PAL_16_ENTRY 0x2580
+#define EV6__CALL_PAL_17_ENTRY 0x25C0
+#define EV6__CALL_PAL_18_ENTRY 0x2600
+#define EV6__CALL_PAL_19_ENTRY 0x2640
+#define EV6__CALL_PAL_1A_ENTRY 0x2680
+#define EV6__CALL_PAL_1B_ENTRY 0x26C0
+#define EV6__CALL_PAL_1C_ENTRY 0x2700
+#define EV6__CALL_PAL_1D_ENTRY 0x2740
+#define EV6__CALL_PAL_1E_ENTRY 0x2780
+#define EV6__CALL_PAL_1F_ENTRY 0x27C0
+#define EV6__CALL_PAL_20_ENTRY 0x2800
+#define EV6__CALL_PAL_21_ENTRY 0x2840
+#define EV6__CALL_PAL_22_ENTRY 0x2880
+#define EV6__CALL_PAL_23_ENTRY 0x28C0
+#define EV6__CALL_PAL_24_ENTRY 0x2900
+#define EV6__CALL_PAL_25_ENTRY 0x2940
+#define EV6__CALL_PAL_26_ENTRY 0x2980
+#define EV6__CALL_PAL_27_ENTRY 0x29C0
+#define EV6__CALL_PAL_28_ENTRY 0x2A00
+#define EV6__CALL_PAL_29_ENTRY 0x2A40
+#define EV6__CALL_PAL_2A_ENTRY 0x2A80
+#define EV6__CALL_PAL_2B_ENTRY 0x2AC0
+#define EV6__CALL_PAL_2C_ENTRY 0x2B00
+#define EV6__CALL_PAL_2D_ENTRY 0x2B40
+#define EV6__CALL_PAL_2E_ENTRY 0x2B80
+#define EV6__CALL_PAL_2F_ENTRY 0x2BC0
+#define EV6__CALL_PAL_30_ENTRY 0x2C00
+#define EV6__CALL_PAL_31_ENTRY 0x2C40
+#define EV6__CALL_PAL_32_ENTRY 0x2C80
+#define EV6__CALL_PAL_33_ENTRY 0x2CC0
+#define EV6__CALL_PAL_34_ENTRY 0x2D00
+#define EV6__CALL_PAL_35_ENTRY 0x2D40
+#define EV6__CALL_PAL_36_ENTRY 0x2D80
+#define EV6__CALL_PAL_37_ENTRY 0x2DC0
+#define EV6__CALL_PAL_38_ENTRY 0x2E00
+#define EV6__CALL_PAL_39_ENTRY 0x2E40
+#define EV6__CALL_PAL_3A_ENTRY 0x2E80
+#define EV6__CALL_PAL_3B_ENTRY 0x2EC0
+#define EV6__CALL_PAL_3C_ENTRY 0x2F00
+#define EV6__CALL_PAL_3D_ENTRY 0x2F40
+#define EV6__CALL_PAL_3E_ENTRY 0x2F80
+#define EV6__CALL_PAL_3F_ENTRY 0x2FC0
+/* Unpriveledged pal entry points */
+#define EV6__CALL_PAL_80_ENTRY 0x3000
+#define EV6__CALL_PAL_81_ENTRY 0x3040
+#define EV6__CALL_PAL_82_ENTRY 0x3080
+#define EV6__CALL_PAL_83_ENTRY 0x30C0
+#define EV6__CALL_PAL_84_ENTRY 0x3100
+#define EV6__CALL_PAL_85_ENTRY 0x3140
+#define EV6__CALL_PAL_86_ENTRY 0x3180
+#define EV6__CALL_PAL_87_ENTRY 0x31C0
+#define EV6__CALL_PAL_88_ENTRY 0x3200
+#define EV6__CALL_PAL_89_ENTRY 0x3240
+#define EV6__CALL_PAL_8A_ENTRY 0x3280
+#define EV6__CALL_PAL_8B_ENTRY 0x32C0
+#define EV6__CALL_PAL_8C_ENTRY 0x3300
+#define EV6__CALL_PAL_8D_ENTRY 0x3340
+#define EV6__CALL_PAL_8E_ENTRY 0x3380
+#define EV6__CALL_PAL_8F_ENTRY 0x33C0
+#define EV6__CALL_PAL_90_ENTRY 0x3400
+#define EV6__CALL_PAL_91_ENTRY 0x3440
+#define EV6__CALL_PAL_92_ENTRY 0x3480
+#define EV6__CALL_PAL_93_ENTRY 0x34C0
+#define EV6__CALL_PAL_94_ENTRY 0x3500
+#define EV6__CALL_PAL_95_ENTRY 0x3540
+#define EV6__CALL_PAL_96_ENTRY 0x3580
+#define EV6__CALL_PAL_97_ENTRY 0x35C0
+#define EV6__CALL_PAL_98_ENTRY 0x3600
+#define EV6__CALL_PAL_99_ENTRY 0x3640
+#define EV6__CALL_PAL_9A_ENTRY 0x3680
+#define EV6__CALL_PAL_9B_ENTRY 0x36C0
+#define EV6__CALL_PAL_9C_ENTRY 0x3700
+#define EV6__CALL_PAL_9D_ENTRY 0x3740
+#define EV6__CALL_PAL_9E_ENTRY 0x3780
+#define EV6__CALL_PAL_9F_ENTRY 0x37C0
+#define EV6__CALL_PAL_A0_ENTRY 0x3800
+#define EV6__CALL_PAL_A1_ENTRY 0x3840
+#define EV6__CALL_PAL_A2_ENTRY 0x3880
+#define EV6__CALL_PAL_A3_ENTRY 0x38C0
+#define EV6__CALL_PAL_A4_ENTRY 0x3900
+#define EV6__CALL_PAL_A5_ENTRY 0x3940
+#define EV6__CALL_PAL_A6_ENTRY 0x3980
+#define EV6__CALL_PAL_A7_ENTRY 0x39C0
+#define EV6__CALL_PAL_A8_ENTRY 0x3A00
+#define EV6__CALL_PAL_A9_ENTRY 0x3A40
+#define EV6__CALL_PAL_AA_ENTRY 0x3A80
+#define EV6__CALL_PAL_AB_ENTRY 0x3AC0
+#define EV6__CALL_PAL_AC_ENTRY 0x3B00
+#define EV6__CALL_PAL_AD_ENTRY 0x3B40
+#define EV6__CALL_PAL_AE_ENTRY 0x3B80
+#define EV6__CALL_PAL_AF_ENTRY 0x3BC0
+#define EV6__CALL_PAL_B0_ENTRY 0x3C00
+#define EV6__CALL_PAL_B1_ENTRY 0x3C40
+#define EV6__CALL_PAL_B2_ENTRY 0x3C80
+#define EV6__CALL_PAL_B3_ENTRY 0x3CC0
+#define EV6__CALL_PAL_B4_ENTRY 0x3D00
+#define EV6__CALL_PAL_B5_ENTRY 0x3D40
+#define EV6__CALL_PAL_B6_ENTRY 0x3D80
+#define EV6__CALL_PAL_B7_ENTRY 0x3DC0
+#define EV6__CALL_PAL_B8_ENTRY 0x3E00
+#define EV6__CALL_PAL_B9_ENTRY 0x3E40
+#define EV6__CALL_PAL_BA_ENTRY 0x3E80
+#define EV6__CALL_PAL_BB_ENTRY 0x3EC0
+#define EV6__CALL_PAL_BC_ENTRY 0x3F00
+#define EV6__CALL_PAL_BD_ENTRY 0x3F40
+#define EV6__CALL_PAL_BE_ENTRY 0x3F80
+#define EV6__CALL_PAL_BF_ENTRY 0x3FC0
+/* All other pall call entry points are handled by OPCDEC entry */
+
+
+/* Alpha Logical Register Definitions
+ * =========================================================
+ */
+
+/* PAL Shadow Registers */
+#define p0 $4
+#define p1 $5
+#define p2 $6
+#define p3 $7
+#define p4 $20
+#define p5 $21
+#define p6 $22
+#define p7 $23
+
+/* Alpha Logical Instruction Definitions
+ * =========================================================
+ */
+
+#define mtpr hw_mtpr
+#define mfpr hw_mfpr
+
+#define ldl_p hw_ldl/p
+#define ldq_p hw_ldq/p
+#define stl_p hw_stl/p
+#define stq_p hw_stq/p
+
+/* Virtual PTE fetch variants of HW_LD.
+ */
+#define ld_vpte hw_ldq/v
+
+/*
+ * Physical mode load-lock and store-conditional variants of
+ * HW_LD and HW_ST.
+ */
+#define ldq_lp hw_ldq/pl
+#define stq_cp hw_stq/pc
+
+#define STALL bis $31, $31, $31
+
+/* Align the code to a hardware fetch block */
+#define FETCH_BLOCK_ALIGN .p2alignl 4, 0x47ff041f
+
+#endif /* DC21264_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/start.inc freebios/src/cpu/ev6/start.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/ev6/start.inc Wed Dec 31 17:00:00 1969
+++ freebios/src/cpu/ev6/start.inc Wed Mar 21 18:02:36 2001
@@ -0,0 +1,469 @@
+#include <arch/cpu.h>
+#include <arch/pal.h>
+#include <arch/asm.h>
+.set noat
+.set noreorder
+.text
+
+#define PAL_EXCEPT(label,location) . = location ; label:
+#define PAL_EXCEPT_DUMMY(location) . = location ; mb ; mb ; mb; hw_mfpr p7, EV6__EXC_ADDR ; bsr p0, __fatal_error_pal; mb ; mb ; mb
+#define PAL_CALL_DUMMY(location) . = location ; mb ; mb ; mb ; mb ; bsr p0, __fatal_error_pal ; mb ; mb ; mb
+
+#define va_48 0
+#define mchk_en 1
+#define tb_mb_en 0
+
+#define EV6__I_STAT__W1C ((1 << EV6__I_STAT__TPE__S) | (1 << EV6__I_STAT__DPE__S))
+#define EV6__DC_STAT__W1C ( \
+ (1 << EV6__DC_STAT__TPERR_P0__S) | \
+ (1 << EV6__DC_STAT__TPERR_P1__S) | \
+ (1 << EV6__DC_STAT__ECC_ERR_ST__S) | \
+ (1 << EV6__DC_STAT__ECC_ERR_LD__S) | \
+ (1 << EV6__DC_STAT__SEO__S))
+
+#define EV6__I_CTL__INIT (\
+ (3 << EV6__I_CTL__IC_EN__S) | \
+ (2 << (EV6__I_CTL__SPE__S + va_48)) | \
+ (2 << EV6__I_CTL__SDE__S) | \
+ (3 << EV6__I_CTL__SBE__S) | \
+ (va_48 << EV6__I_CTL__VA_48__S) | \
+ (1 << EV6__I_CTL__CALL_PAL_R23__S) | \
+ (mchk_en << EV6__I_CTL__MCHK_EN__S) | \
+ (tb_mb_en << EV6__I_CTL__TB_MB_EN__S))
+
+#define EV6__PCTX__INIT (1 << EV6__PCTX__FPE__S)
+
+#define EV6__M_CTL__INIT (2 << (EV6__M_CTL__SPE__S+va_48))
+
+#define EV6__IER__INIT 0
+
+#define EV6__HW_INT_CLR__INIT ( \
+ (1 << (EV6__HW_INT_CLR__MCHK_D__S - EV6__HW_INT_CLR__MCHK_D__S)) | \
+ (3 << (EV6__HW_INT_CLR__PC__S - EV6__HW_INT_CLR__MCHK_D__S)) | \
+ (1 << (EV6__HW_INT_CLR__CR__S - EV6__HW_INT_CLR__MCHK_D__S)) | \
+ (1 << (EV6__HW_INT_CLR__SL__S - EV6__HW_INT_CLR__MCHK_D__S)))
+
+#define EV6__VA_CTL__INIT (va_48 << EV6__VA_CTL__VA_48__S)
+
+EntryPoint:
+ /* On startup
+ * R19 - Signature (0xDEC?????) likely (0xDECB001)
+ * R23 - Memory size in bytes.
+ * r22 - CPU speed in picoseconds.
+ * R25 - Chip revision.
+ * excAddr - Address of ICache flush code to execute in PALmode.
+ */
+
+ /* Palcode switching entry point */
+ mb
+ bis a3, a3, a0 /* Signature */
+ bis t9, t9, a1 /* Memory size in bytes */
+ bis t8, t8, a2 /* CPU speed in picoseconds */
+ br zero, pal_mode_start
+ mb
+ mb
+ mb
+
+PAL_EXCEPT_DUMMY(EV6__DTBM_DOUBLE_3_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__DTBM_DOUBLE_4_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__FEN_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__UNALIGN_ENTRY)
+
+ /* DTBM */
+PAL_EXCEPT(DTBM_SINGLE, EV6__DTBM_SINGLE_ENTRY)
+ hw_mfpr p7, EV6__EXC_ADDR /* (0L,1) get exception address */
+ hw_mfpr p2, EV6__VA /* (4-7,1L,3) get original va */
+
+ lda p1, 0x3301(zero) /* all r/w enable */
+ srl p2, 13, p0 /* shift out the byte offset */
+ sll p0, EV6__DTB_PTE0__PFN__S, p0 /* get pfn into position */
+ bis p0, p1, p0 /* produce the pte */
+
+ FETCH_BLOCK_ALIGN
+ hw_mtpr p2, EV6__DTB_TAG0 /* (2&6,0L) write tag0 */
+ hw_mtpr p2, EV6__DTB_TAG1 /* (1&5,1L) write tag1 */
+ hw_mtpr p0, EV6__DTB_PTE0 /* (0,4,2,6) (0L) write pte0 */
+ hw_mtpr p0, EV6__DTB_PTE1 /* (3,7,1,5) (1L) write pte1 */
+
+ hw_mtpr zero, EV6__MM_STAT /* (4-7,0L) start outside IQ */
+ FETCH_BLOCK_ALIGN
+ hw_ret (p7) /* return with jmp */
+ br zero, .-4 /* stop predictor */
+
+PAL_EXCEPT_DUMMY(EV6__DFAULT_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__OPCDEC_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__IACV_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__MCHK_ENTRY)
+
+ /* *ITBM* */
+PAL_EXCEPT(ITB_MISS, EV6__ITB_MISS_ENTRY)
+ hw_mfpr p7, EV6__EXC_ADDR /* (0L,1) get exception address */
+ srl p7, 13, p2 /* shift out the byte offset */
+ lda p1, 0x301(zero) /* all read enable */
+ sll p2, EV6__ITB_PTE__PFN__S, p2 /* get pfn into position */
+ bis p2, p1, p2 /* produce the pte */
+
+ FETCH_BLOCK_ALIGN
+ hw_mtpr p7, EV6__ITB_TAG /* (2&6,0L) write tag0 */
+ hw_mtpr p2, EV6__ITB_PTE /* (0&4,0L) write pte0 */
+ FETCH_BLOCK_ALIGN
+ hw_ret/stall (p7) /* (0L) return */
+ br zero, .-4
+
+PAL_EXCEPT_DUMMY(EV6__ARITH_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__INTERRUPT_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__MT_FPCR_ENTRY)
+PAL_EXCEPT_DUMMY(EV6__RESET_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_00_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_01_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_02_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_03_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_04_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_05_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_06_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_07_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_08_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_09_ENTRY)
+
+#if 0
+PAL_CALL_DUMMY(EV6__CALL_PAL_0A_ENTRY)
+#else
+ /* swppal */
+PAL_EXCEPT(SWPPAL, EV6__CALL_PAL_0A_ENTRY)
+#define OSF_P_MISC__SWITCH__S 62
+ /* new pal base is in a0 */
+ bis a0, a0, p1 /* base in p1 */
+ lda p0, 0x7fff(zero) /* check for pal base */
+ and p1, p0, p0 /* get low 15 bits */
+ cmpeq p0, 0, v0 /* check for non-zero bits */
+
+ blbc v0, call_pal__swppal_fail /* if not clear say unknown */
+
+ bis zero, 1, p0 /* get a '1' */
+ sll p0, OSF_P_MISC__SWITCH__S, p0 /* switch bit into position */
+ bis zero, p0, p6 /* mark switch */
+
+ bis zero, zero, v0 /* status success */
+ bis p1, 1, p1 /* set pal mode bit */
+ hw_ret (p1) /* go to it */
+ bis zero, zero, zero /* nop */
+
+call_pal__swppal_fail:
+ bis zero, 1, v0 /* failure */
+ hw_ret (p7)
+ bis zero, zero, zero /* nop */
+ bis zero, zero, zero /* nop */
+#endif
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_0B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_0C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_0D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_0E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_0F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_10_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_11_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_12_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_13_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_14_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_15_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_16_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_17_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_18_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_19_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1A_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_1F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_20_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_21_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_22_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_23_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_24_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_25_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_26_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_27_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_28_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_29_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2A_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_2F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_30_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_31_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_32_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_33_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_34_ENTRY)
+
+#if 0
+PAL_CALL_DUMMY(EV6__CALL_PAL_35_ENTRY)
+#else
+ /* swpipl */
+PAL_EXCEPT(SWPIPL, EV6__CALL_PAL_35_ENTRY)
+ /* Fake the swpipl call just return the maximum ipl
+ * I'm not going to enable interrupts anyway.
+ */
+ bis zero, 7, v0
+ hw_ret/stall(p7)
+#endif
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_36_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_37_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_38_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_39_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3A_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_3F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_80_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_81_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_82_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_83_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_84_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_85_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_86_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_87_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_88_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_89_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8A_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_8F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_90_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_91_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_92_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_93_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_94_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_95_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_96_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_97_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_98_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_99_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9A_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9B_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9C_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9D_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9E_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_9F_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_A0_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A1_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A2_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A3_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A4_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A5_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A6_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A7_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A8_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_A9_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AA_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AB_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AC_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AD_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AE_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_AF_ENTRY)
+
+PAL_CALL_DUMMY(EV6__CALL_PAL_B0_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B1_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B2_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B3_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B4_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B5_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B6_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B7_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B8_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_B9_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BA_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BB_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BC_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BD_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BE_ENTRY)
+PAL_CALL_DUMMY(EV6__CALL_PAL_BF_ENTRY)
+
+PAL_EXCEPT(dummy, EV6__CALL_PAL_BF_ENTRY + 0x80)
+
+/* Data for pal_mode_start
+ * I can't use the magic linker gp magic here so roll my own.
+ * Note: The linker script ensures that EntryPoint _edata & _end
+ * are all 8 byte aligned.
+ */
+EntryPoint_addr:
+ .quad EntryPoint
+_edata_addr:
+ .quad _edata
+_end_addr:
+ .quad _end
+kernel_mode_start_addr:
+ .quad kernel_mode_start
+__fatal_error_non_pal_addr:
+ .quad __fatal_error_non_pal
+
+pal_mode_start:
+ /* relocate to address zero */
+ /* The following move routine is not totally
+ * general. In particular it does not handle
+ * overlapping memory locations or moving to a higher
+ * address in memory.
+ */
+ br pv, relocate
+relocate:
+ lda t0,(EntryPoint - relocate)(pv)
+ ldq_p t1,(EntryPoint_addr - relocate)(pv)
+ ldq_p t2,(_edata_addr - relocate)(pv)
+ subq t2, t1, t2
+ br Mstart
+
+ /* Move the program */
+Move: ldq_p t3, 0(t0)
+ subq t2, 8, t2
+ addq t0, 8, t0
+ stq_p t3, 0(t1)
+ addq t1, 8, t1
+Mstart: bne t2, Move
+
+ /* set up pal_base register */
+ FETCH_BLOCK_ALIGN
+ ldq_p t0, (EntryPoint_addr - relocate)(pv)
+ hw_mtpr t0, EV6__PAL_BASE
+
+ /* flush ITB & DTB */
+ FETCH_BLOCK_ALIGN
+ hw_mtpr zero, EV6__ITB_IA
+ hw_mtpr zero, EV6__DTB_IA
+
+ /* clear i_stat & dc_stat */
+ LOAD_CONSTANT32(t0, EV6__I_STAT__W1C)
+ LOAD_CONSTANT16(t2, EV6__DC_STAT__W1C)
+ FETCH_BLOCK_ALIGN
+ hw_mtpr t0, EV6__I_STAT
+ hw_mtpr t2, EV6__DC_STAT
+
+ /* Initialize I_CTL */
+ LOAD_CONSTANT32(t0, EV6__I_CTL__INIT)
+ FETCH_BLOCK_ALIGN
+ hw_mtpr t0, EV6__I_CTL
+
+ /* Initialize pctx & m_ctl */
+ FETCH_BLOCK_ALIGN
+ LOAD_CONSTANT16(t0, EV6__PCTX__INIT)
+ LOAD_CONSTANT16(t2, EV6__M_CTL__INIT)
+ hw_mtpr t0, EV6__PCTX
+ hw_mtpr t2, EV6__M_CTL
+
+ /* Initialize ier_cm */
+ LOAD_CONSTANT32(t0, EV6__IER__INIT)
+ hw_mtpr t0, EV6__IER_CM
+ hw_mtpr zero, EV6__CC
+
+ /* Initialize SIRR */
+ bis zero, 1, t0
+ sll t0, 32, t0
+ hw_mtpr zero, EV6__SIRR
+ hw_mtpr $1, EV6__CC_CTL
+
+ /* Initialize int_clr */
+ LOAD_CONSTANT16(t0, EV6__HW_INT_CLR__INIT)
+ sll t0, EV6__HW_INT_CLR__MCHK_D__S, t0
+ hw_mtpr t0, EV6__HW_INT_CLR
+ hw_mtpr zero, EV6__DTB_ALT_MODE
+
+ /* set pctr_ctl & va_ctl */
+ hw_mtpr zero, EV6__PCTR_CTL
+ LOAD_CONSTANT16(t0, EV6__VA_CTL__INIT)
+ hw_mtpr t0, EV6__VA_CTL
+ FETCH_BLOCK_ALIGN
+
+ /* Clear the asn */
+ hw_mtpr zero, EV6__DTB_ASN0
+ hw_mtpr zero, EV6__DTB_ASN1
+ FETCH_BLOCK_ALIGN
+
+ /* write pctrl_ctl again to clear the 2nd stage overflow flag.
+ * and force other mtpr to retwir while we are at it.
+ */
+ hw_mtpr zero, EV6__PCTR_CTL | 0xF0
+ FETCH_BLOCK_ALIGN
+
+ /* We need to write HW_INT_CLR to avoid a interrup that can occur
+ * the counters come up in an unpredictable state near overflow.
+ */
+
+ lda t0, 3(zero)
+ sll t0, EV6__HW_INT_CLR__PC__S, t0
+ hw_mtpr t0, EV6__HW_INT_CLR
+ FETCH_BLOCK_ALIGN
+ hw_mtpr t0, EV6__HW_INT_CLR
+ FETCH_BLOCK_ALIGN
+
+ /* Clear the fpcr */
+ mt_fpcr $f31
+
+#if 0
+ /* Setup 48 bit address space */
+ FETCH_BLOCK_ALIGN
+ bis zero, 2, t0
+ hw_mtpr t0, EV6__VA_CTL
+ bis zero, 8, t0
+ hw_mtpr t0, EV6__M_CTL
+#else
+ /* Setup 40 bit address space */
+ FETCH_BLOCK_ALIGN
+ bis zero, 0, t0
+ hw_mtpr t0, EV6__VA_CTL
+ bis zero, 4, t0
+ hw_mtpr t0, EV6__M_CTL
+#endif
+
+ FETCH_BLOCK_ALIGN
+ /* Enable special pal instructions in kernel mode */
+ hw_mfpr t0, EV6__I_CTL
+ lda t1, 1(zero)
+ sll t1, EV6__I_CTL__HWE__S, t1
+ bis t0, t1, t0
+ hw_mtpr t0, EV6__I_CTL
+
+ /* Now get out of palmode */
+ FETCH_BLOCK_ALIGN
+ ldq_p pv, (kernel_mode_start_addr - relocate)(pv)
+ hw_jmp (pv)
+
+GLOBL(start)
+ br pv, __start
+__start:
+ /* Some dummy parameters for debugging */
+ bis zero, zero, t8 /* CPU speed in picoseconds */
+ lda t9, 128*1024*1024 /* Memory size in bytes 128MB */
+ bis zero, zero, t11 /* Chip revision */
+
+ lda a0, (EntryPoint - __start)(pv)
+ call_pal PAL_swppal
+ br zero, .-4 /* spin in place */
+
+ /* __fatal_error_pal Called with:
+ * p0 - Exception handler that caught the exception
+ * p7 - Address where the exception occured.
+ * ra - Potentially valid return address from the code
+ * that took the exception.
+ */
+ FETCH_BLOCK_ALIGN
+__fatal_error_pal:
+ subq p0, 0x14, a0
+ bis p7, p7, a1
+ bis ra, ra, a2
+ bsr pv, __fatal_error_pal2
+__fatal_error_pal2:
+ lda pv, (__fatal_error_non_pal - __fatal_error_pal2)(pv)
+ hw_ret (pv)
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/Config freebios/src/cpu/p5/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/Config Mon Mar 12 21:22:19 2001
+++ freebios/src/cpu/p5/Config Mon Mar 19 16:35:45 2001
@@ -1,4 +1,3 @@
option i586
object cpuid.o
#object tsc.o
-dir /arch/i386
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/cpuid.c freebios/src/cpu/p5/cpuid.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/cpuid.c Thu Feb 8 09:17:38 2001
+++ freebios/src/cpu/p5/cpuid.c Thu Mar 15 12:39:18 2001
@@ -35,7 +35,7 @@
DBG("\n");
- intel_post(0x93);
+ post_code(0x93);
return ((int) low);
}
#endif
@@ -217,5 +217,5 @@
}
DBG("\n");
- intel_post(0x92);
+ post_code(0x92);
}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/start32.inc freebios/src/cpu/p5/start32.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p5/start32.inc Tue Dec 12 20:49:26 2000
+++ freebios/src/cpu/p5/start32.inc Wed Mar 21 17:10:48 2001
@@ -153,12 +153,8 @@
movw %ax, %fs
movw %ax, %gs
#endif
- /* WARNING: The new CALLSP code trashes the stack! */
- /* I will leave this here for now, but you should also set it later. */
- /* set new stack */
- movl $_PDATABASE, %esp
-#else
+#else /* PROTECTED_MODE_STARTUP */
.align 4
.code32
intel_chip_post_macro(0x10) /* post 10 */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p6/mpspec.c freebios/src/cpu/p6/mpspec.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p6/mpspec.c Wed Dec 20 16:25:08 2000
+++ freebios/src/cpu/p6/mpspec.c Tue Mar 13 17:43:46 2001
@@ -3,6 +3,7 @@
#endif
#include <cpu/p6/mpspec.h>
+#include <string.h>
#define SMP_FLOATING_TABLE_LEN sizeof(struct intel_mp_floating)
unsigned char smp_compute_checksum(void *v, int len)
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p6/mtrr.c freebios/src/cpu/p6/mtrr.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/cpu/p6/mtrr.c Thu Feb 8 09:17:38 2001
+++ freebios/src/cpu/p6/mtrr.c Thu Mar 15 12:39:35 2001
@@ -32,6 +32,7 @@
#include <cpu/p6/msr.h>
#include <cpu/p6/mtrr.h>
#include <printk.h>
+#include <subr.h>
#define arraysize(x) (sizeof(x)/sizeof((x)[0]))
@@ -205,7 +206,7 @@
DBG("\n");
while (ramsizeK != 0 && reg <= 6) {
- intel_post(0x60 + reg);
+ post_code(0x60 + reg);
range_wb = 1 << (fms(ramsizeK - 1) + 1);
range_uc = range_wb - ramsizeK;
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/boot/elf.h freebios/src/include/boot/elf.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/boot/elf.h Mon Mar 12 21:22:19 2001
+++ freebios/src/include/boot/elf.h Thu Mar 15 15:10:19 2001
@@ -4,6 +4,7 @@
/* Standard ELF types. */
#include <stdint.h>
+#include <stddef.h>
#include <arch/boot/boot.h>
/* Type for a 16-bit quantity. */
@@ -390,4 +391,5 @@
extern int elf_check_arch(Elf_ehdr *ehdr);
extern void jmp_to_elf_entry(void *entry, void *ube);
+extern int elfboot(size_t totalram);
#endif /* elf.h */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/cpu/p6/ioapic.h freebios/src/include/cpu/p6/ioapic.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/cpu/p6/ioapic.h Wed Dec 31 17:00:00 1969
+++ freebios/src/include/cpu/p6/ioapic.h Tue Mar 13 17:47:47 2001
@@ -0,0 +1,6 @@
+#ifndef CPU_P6_IOAPIC_H
+#define CPU_P6_IOAPIC_H
+
+extern void setup_ioapic(void);
+
+#endif /* CPU_P6_IOAPIC_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/intel.h freebios/src/include/intel.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/intel.h Mon Oct 16 17:47:28 2000
+++ freebios/src/include/intel.h Wed Feb 28 19:04:51 2001
@@ -43,6 +43,7 @@
#undef FUNCTIONS
#ifndef FUNCTIONS
+
#define RET_LABEL(label) \
jmp label##_done
@@ -57,6 +58,32 @@
#define RETSP \
jmp *%esp
+
+#if USE_CACHE_RAM
+
+#define MEM_RET_LABEL(label) \
+ ret
+
+#define MEM_CALL_LABEL(label) \
+ call label
+
+#define MEM_CALLSP(func) \
+ call func
+
+#define MEM_RETSP \
+ ret
+
+#else
+
+#define MEM_RET_LABEL(label) RET_LABEL(label)
+
+#define MEM_CALL_LABEL(label) CALL_LABEL(label)
+
+#define MEM_CALLSP(func) CALLSP(func)
+
+#define MEM_RETSP RETSP
+
+#endif /* USE_CACHE_RAM */
#define DELAY(x) mov x, %ecx ;\
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/northbridge/alpha/tsunami/core_tsunami.h freebios/src/include/northbridge/alpha/tsunami/core_tsunami.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/northbridge/alpha/tsunami/core_tsunami.h Wed Dec 31 17:00:00 1969
+++ freebios/src/include/northbridge/alpha/tsunami/core_tsunami.h Thu Mar 15 15:12:56 2001
@@ -0,0 +1,431 @@
+#ifndef ALPHA_CORE_TSUNAMI_H
+#define ALPHA_CORE_TSUNAMI_H
+
+#include <arch/compiler.h>
+
+/*
+ * TSUNAMI/TYPHOON are the internal names for the core logic chipset which
+ * provides memory controller and PCI access for the 21264 based systems.
+ *
+ * This file is based on:
+ *
+ * Tsunami System Programmers Manual
+ * Preliminary, Chapters 2-5
+ *
+ */
+
+#if USE_48_BIT_KSEG
+#define TS_BIAS 0x80000000000UL
+#else
+#define TS_BIAS 0x10000000000UL
+#endif
+
+/*
+ * CChip, DChip, and PChip registers
+ */
+
+typedef struct {
+ volatile unsigned long csr __attribute__((aligned(64)));
+} tsunami_64;
+
+typedef struct {
+ tsunami_64 csc;
+ tsunami_64 mtr;
+ tsunami_64 misc;
+ tsunami_64 mpd;
+ tsunami_64 aar0;
+ tsunami_64 aar1;
+ tsunami_64 aar2;
+ tsunami_64 aar3;
+ tsunami_64 dim0;
+ tsunami_64 dim1;
+ tsunami_64 dir0;
+ tsunami_64 dir1;
+ tsunami_64 drir;
+ tsunami_64 prben;
+ tsunami_64 iic; /* a.k.a. iic0 */
+ tsunami_64 wdr; /* a.k.a. iic1 */
+ tsunami_64 mpr0;
+ tsunami_64 mpr1;
+ tsunami_64 mpr2;
+ tsunami_64 mpr3;
+ tsunami_64 mctl;
+ tsunami_64 __pad1;
+ tsunami_64 ttr;
+ tsunami_64 tdr;
+ tsunami_64 dim2;
+ tsunami_64 dim3;
+ tsunami_64 dir2;
+ tsunami_64 dir3;
+ tsunami_64 iic2;
+ tsunami_64 iic3;
+} tsunami_cchip;
+
+typedef struct {
+ tsunami_64 dsc;
+ tsunami_64 str;
+ tsunami_64 drev;
+} tsunami_dchip;
+
+typedef struct {
+ tsunami_64 wsba[4];
+ tsunami_64 wsm[4];
+ tsunami_64 tba[4];
+ tsunami_64 pctl;
+ tsunami_64 plat;
+ tsunami_64 reserved;
+ tsunami_64 perror;
+ tsunami_64 perrmask;
+ tsunami_64 perrset;
+ tsunami_64 tlbiv;
+ tsunami_64 tlbia;
+ tsunami_64 pmonctl;
+ tsunami_64 pmoncnt;
+} tsunami_pchip;
+
+#define TSUNAMI_cchip ((tsunami_cchip *)(IDENT_ADDR+TS_BIAS+0x1A0000000UL))
+#define TSUNAMI_dchip ((tsunami_dchip *)(IDENT_ADDR+TS_BIAS+0x1B0000800UL))
+#define TSUNAMI_pchip0 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x180000000UL))
+#define TSUNAMI_pchip1 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x380000000UL))
+#define TSUNAMI_tig ((volatile unsigned long *) (IDENT_ADDR+TS_BIAS+0x100000000UL))
+extern int TSUNAMI_bootcpu;
+
+/*
+ * TSUNAMI Pchip Error register.
+ */
+
+#define perror_m_lost 0x1
+#define perror_m_serr 0x2
+#define perror_m_perr 0x4
+#define perror_m_dcrto 0x8
+#define perror_m_sge 0x10
+#define perror_m_ape 0x20
+#define perror_m_ta 0x40
+#define perror_m_rdpe 0x80
+#define perror_m_nds 0x100
+#define perror_m_rto 0x200
+#define perror_m_uecc 0x400
+#define perror_m_cre 0x800
+#define perror_m_addrl 0xFFFFFFFF0000UL
+#define perror_m_addrh 0x7000000000000UL
+#define perror_m_cmd 0xF0000000000000UL
+#define perror_m_syn 0xFF00000000000000UL
+union TPchipPERROR {
+ struct {
+ unsigned int perror_v_lost : 1;
+ unsigned perror_v_serr : 1;
+ unsigned perror_v_perr : 1;
+ unsigned perror_v_dcrto : 1;
+ unsigned perror_v_sge : 1;
+ unsigned perror_v_ape : 1;
+ unsigned perror_v_ta : 1;
+ unsigned perror_v_rdpe : 1;
+ unsigned perror_v_nds : 1;
+ unsigned perror_v_rto : 1;
+ unsigned perror_v_uecc : 1;
+ unsigned perror_v_cre : 1;
+ unsigned perror_v_rsvd1 : 4;
+ unsigned perror_v_addrl : 32;
+ unsigned perror_v_addrh : 3;
+ unsigned perror_v_rsvd2 : 1;
+ unsigned perror_v_cmd : 4;
+ unsigned perror_v_syn : 8;
+ } perror_r_bits;
+ int perror_q_whole [2];
+};
+
+/*
+ * TSUNAMI Pchip Window Space Base Address register.
+ */
+#define wsba_m_ena 0x1
+#define wsba_m_sg 0x2
+#define wsba_m_ptp 0x4
+#define wsba_m_addr 0xFFF00000
+#define wmask_k_sz1gb 0x3FF00000
+union TPchipWSBA {
+ struct {
+ unsigned wsba_v_ena : 1;
+ unsigned wsba_v_sg : 1;
+ unsigned wsba_v_ptp : 1;
+ unsigned wsba_v_rsvd1 : 17;
+ unsigned wsba_v_addr : 12;
+ unsigned wsba_v_rsvd2 : 32;
+ } wsba_r_bits;
+ int wsba_q_whole [2];
+};
+
+/*
+ * TSUNAMI Pchip Control Register
+ */
+#define pctl_m_fdsc 0x1
+#define pctl_m_fbtb 0x2
+#define pctl_m_thdis 0x4
+#define pctl_m_chaindis 0x8
+#define pctl_m_tgtlat 0x10
+#define pctl_m_hole 0x20
+#define pctl_m_mwin 0x40
+#define pctl_m_arbena 0x80
+#define pctl_m_prigrp 0x7F00
+#define pctl_m_ppri 0x8000
+#define pctl_m_rsvd1 0x30000
+#define pctl_m_eccen 0x40000
+#define pctl_m_padm 0x80000
+#define pctl_m_cdqmax 0xF00000
+#define pctl_m_rev 0xFF000000
+#define pctl_m_crqmax 0xF00000000UL
+#define pctl_m_ptpmax 0xF000000000UL
+#define pctl_m_pclkx 0x30000000000UL
+#define pctl_m_fdsdis 0x40000000000UL
+#define pctl_m_fdwdis 0x80000000000UL
+#define pctl_m_ptevrfy 0x100000000000UL
+#define pctl_m_rpp 0x200000000000UL
+#define pctl_m_pid 0xC00000000000UL
+#define pctl_m_rsvd2 0xFFFF000000000000UL
+
+union TPchipPCTL {
+ struct {
+ unsigned pctl_v_fdsc : 1;
+ unsigned pctl_v_fbtb : 1;
+ unsigned pctl_v_thdis : 1;
+ unsigned pctl_v_chaindis : 1;
+ unsigned pctl_v_tgtlat : 1;
+ unsigned pctl_v_hole : 1;
+ unsigned pctl_v_mwin : 1;
+ unsigned pctl_v_arbena : 1;
+ unsigned pctl_v_prigrp : 7;
+ unsigned pctl_v_ppri : 1;
+ unsigned pctl_v_rsvd1 : 2;
+ unsigned pctl_v_eccen : 1;
+ unsigned pctl_v_padm : 1;
+ unsigned pctl_v_cdqmax : 4;
+ unsigned pctl_v_rev : 8;
+ unsigned pctl_v_crqmax : 4;
+ unsigned pctl_v_ptpmax : 4;
+ unsigned pctl_v_pclkx : 2;
+ unsigned pctl_v_fdsdis : 1;
+ unsigned pctl_v_fdwdis : 1;
+ unsigned pctl_v_ptevrfy : 1;
+ unsigned pctl_v_rpp : 1;
+ unsigned pctl_v_pid : 2;
+ unsigned pctl_v_rsvd2 : 16;
+ } pctl_r_bits;
+ int pctl_q_whole [2];
+};
+
+/*
+ * TSUNAMI Pchip Error Mask Register.
+ */
+#define perrmask_m_lost 0x1
+#define perrmask_m_serr 0x2
+#define perrmask_m_perr 0x4
+#define perrmask_m_dcrto 0x8
+#define perrmask_m_sge 0x10
+#define perrmask_m_ape 0x20
+#define perrmask_m_ta 0x40
+#define perrmask_m_rdpe 0x80
+#define perrmask_m_nds 0x100
+#define perrmask_m_rto 0x200
+#define perrmask_m_uecc 0x400
+#define perrmask_m_cre 0x800
+#define perrmask_m_rsvd 0xFFFFFFFFFFFFF000UL
+union TPchipPERRMASK {
+ struct {
+ unsigned int perrmask_v_lost : 1;
+ unsigned perrmask_v_serr : 1;
+ unsigned perrmask_v_perr : 1;
+ unsigned perrmask_v_dcrto : 1;
+ unsigned perrmask_v_sge : 1;
+ unsigned perrmask_v_ape : 1;
+ unsigned perrmask_v_ta : 1;
+ unsigned perrmask_v_rdpe : 1;
+ unsigned perrmask_v_nds : 1;
+ unsigned perrmask_v_rto : 1;
+ unsigned perrmask_v_uecc : 1;
+ unsigned perrmask_v_cre : 1;
+ unsigned perrmask_v_rsvd1 : 20;
+ unsigned perrmask_v_rsvd2 : 32;
+ } perrmask_r_bits;
+ int perrmask_q_whole [2];
+};
+
+/*
+ * Memory spaces:
+ */
+#define TSUNAMI_HOSE(h) (((unsigned long)(h)) << 33)
+#define TSUNAMI_BASE (IDENT_ADDR + TS_BIAS)
+
+#define TSUNAMI_MEM(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x000000000UL)
+#define _TSUNAMI_IACK_SC(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1F8000000UL)
+#define TSUNAMI_IO(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1FC000000UL)
+#define TSUNAMI_CONF(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1FE000000UL)
+
+#define TSUNAMI_IACK_SC _TSUNAMI_IACK_SC(0) /* hack! */
+
+
+/*
+ * The canonical non-remaped I/O and MEM addresses have these values
+ * subtracted out. This is arranged so that folks manipulating ISA
+ * devices can use their familiar numbers and have them map to bus 0.
+ */
+
+#define TSUNAMI_IO_BIAS TSUNAMI_IO(0)
+#define TSUNAMI_MEM_BIAS TSUNAMI_MEM(0)
+
+/* The IO address space is larger than 0xffff */
+#define TSUNAMI_IO_SPACE (TSUNAMI_CONF(0) - TSUNAMI_IO(0))
+
+/*
+ * Data structure for handling TSUNAMI machine checks:
+ */
+struct el_TSUNAMI_sysdata_mcheck {
+};
+
+
+/*
+ * I/O functions:
+ *
+ * TSUNAMI, the 21??? PCI/memory support chipset for the EV6 (21264)
+ * can only use linear accesses to get at PCI memory and I/O spaces.
+ */
+
+#define vucp volatile unsigned char *
+#define vusp volatile unsigned short *
+#define vuip volatile unsigned int *
+#define vulp volatile unsigned long *
+
+static inline unsigned int tsunami_inb(unsigned long addr)
+{
+ /* ??? I wish I could get rid of this. But there's no ioremap
+ equivalent for I/O space. PCI I/O can be forced into the
+ correct hose's I/O region, but that doesn't take care of
+ legacy ISA crap. */
+
+ addr += TSUNAMI_IO_BIAS;
+ return __kernel_ldbu(*(vucp)addr);
+}
+
+static inline void tsunami_outb(unsigned char b, unsigned long addr)
+{
+ addr += TSUNAMI_IO_BIAS;
+ __kernel_stb(b, *(vucp)addr);
+ mb();
+}
+
+static inline unsigned int tsunami_inw(unsigned long addr)
+{
+ addr += TSUNAMI_IO_BIAS;
+ return __kernel_ldwu(*(vusp)addr);
+}
+
+static inline void tsunami_outw(unsigned short b, unsigned long addr)
+{
+ addr += TSUNAMI_IO_BIAS;
+ __kernel_stw(b, *(vusp)addr);
+ mb();
+}
+
+static inline unsigned int tsunami_inl(unsigned long addr)
+{
+ addr += TSUNAMI_IO_BIAS;
+ return *(vuip)addr;
+}
+
+static inline void tsunami_outl(unsigned int b, unsigned long addr)
+{
+ addr += TSUNAMI_IO_BIAS;
+ *(vuip)addr = b;
+ mb();
+}
+
+/*
+ * Memory functions. all accesses are done through linear space.
+ */
+
+static inline unsigned long tsunami_ioremap(unsigned long addr)
+{
+ return addr + TSUNAMI_MEM_BIAS;
+}
+
+static inline int tsunami_is_ioaddr(unsigned long addr)
+{
+ return addr >= TSUNAMI_BASE;
+}
+
+static inline unsigned long tsunami_readb(unsigned long addr)
+{
+ return __kernel_ldbu(*(vucp)addr);
+}
+
+static inline unsigned long tsunami_readw(unsigned long addr)
+{
+ return __kernel_ldwu(*(vusp)addr);
+}
+
+static inline unsigned long tsunami_readl(unsigned long addr)
+{
+ return *(vuip)addr;
+}
+
+static inline unsigned long tsunami_readq(unsigned long addr)
+{
+ return *(vulp)addr;
+}
+
+static inline void tsunami_writeb(unsigned char b, unsigned long addr)
+{
+ __kernel_stb(b, *(vucp)addr);
+}
+
+static inline void tsunami_writew(unsigned short b, unsigned long addr)
+{
+ __kernel_stw(b, *(vusp)addr);
+}
+
+static inline void tsunami_writel(unsigned int b, unsigned long addr)
+{
+ *(vuip)addr = b;
+}
+
+static inline void tsunami_writeq(unsigned long b, unsigned long addr)
+{
+ *(vulp)addr = b;
+}
+
+/*
+ * Tig bus functions.
+ */
+
+static inline unsigned long tsunami_tig_readb(unsigned long offset)
+{
+ return TSUNAMI_tig[offset << (6 - 3)] & 0xff;
+}
+
+static inline void tsunami_tig_writeb(unsigned char b, unsigned long offset)
+{
+ TSUNAMI_tig[offset << (6 - 3)] = b & 0xff;
+}
+
+
+#undef vucp
+#undef vusp
+#undef vuip
+#undef vulp
+
+#define inb(p) tsunami_inb((unsigned long)(p))
+#define inw(p) tsunami_inw((unsigned long)(p))
+#define inl(p) tsunami_inl((unsigned long)(p))
+#define outb(x,p) tsunami_outb((x),(unsigned long)(p))
+#define outw(x,p) tsunami_outw((x),(unsigned long)(p))
+#define outl(x,p) tsunami_outl((x),(unsigned long)(p))
+#define readb(a) tsunami_readb((unsigned long)(a))
+#define readw(a) tsunami_readw((unsigned long)(a))
+#define readl(a) tsunami_readl((unsigned long)(a))
+#define readq(a) tsunami_readq((unsigned long)(a))
+#define writeb(x,a) tsunami_writeb((x),(unsigned long)(a))
+#define writew(x,a) tsunami_writew((x),(unsigned long)(a))
+#define writel(x,a) tsunami_writel((x),(unsigned long)(a))
+#define writeq(x,a) tsunami_writeq((x),(unsigned long)(a))
+#define ioremap(a) tsunami_ioremap((unsigned long)(a))
+#define is_ioaddr(a) tsunami_is_ioaddr((unsigned long)(a))
+
+#endif /* ALPHA_CORE_TSUNAMI_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/rom/fill_inbuf.h freebios/src/include/rom/fill_inbuf.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/rom/fill_inbuf.h Wed Dec 31 17:00:00 1969
+++ freebios/src/include/rom/fill_inbuf.h Tue Mar 13 13:53:53 2001
@@ -0,0 +1,13 @@
+#ifndef ROM_FILL_INBUF_H
+#define ROM_FILL_INBUF_H
+
+extern unsigned char *inbuf; /* input buffer */
+extern unsigned int insize; /* valid bytes in inbuf */
+extern unsigned int inptr; /* index of next byte to be processed in inbuf */
+
+extern int fill_inbuf(void);
+
+#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
+
+
+#endif /* ROM_FILL_INBUF_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/serial_subr.h freebios/src/include/serial_subr.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/serial_subr.h Mon Oct 16 17:47:28 2000
+++ freebios/src/include/serial_subr.h Thu Mar 15 15:14:06 2001
@@ -1,10 +1,7 @@
#ifndef _SERIAL_SUBR_H_
#define _SERIAL_SUBR_H_
-void ttys0_tx_char(char data);
-void ttys0_tx_string(char *data);
-void ttys0_tx_hex_digit(char data);
-void ttys0_tx_hex(unsigned int data, int digits);
-void ttys0_tx_int(int data);
+void ttys0_init(void);
+void ttys0_tx_byte(unsigned char data);
#endif /* _SERIAL_SUBR_H_ */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/stdlib.h freebios/src/include/stdlib.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/stdlib.h Mon Mar 12 21:22:19 2001
+++ freebios/src/include/stdlib.h Tue Mar 20 20:41:51 2001
@@ -6,4 +6,9 @@
extern void *malloc(size_t size);
void free(void *ptr);
+/* Extensions to malloc... */
+typedef size_t malloc_mark_t;
+void malloc_mark(malloc_mark_t *place);
+void malloc_release(malloc_mark_t *place);
+
#endif /* STDLIB_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/string.h freebios/src/include/string.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/string.h Thu Jan 18 16:11:26 2001
+++ freebios/src/include/string.h Tue Mar 13 16:26:16 2001
@@ -1,3 +1,8 @@
+#ifndef STRING_H
+#define STRING_H
+
+#include <stddef.h>
+
// yes, linux has fancy ones. We don't care. This stuff gets used
// hardly at all. And the pain of including those files is just too high.
@@ -5,8 +10,7 @@
//extern inline int strlen(char *src) { int i = 0; while (*src++) i++; return i;}
-#if 1
-extern inline int strnlen(const char *src, int max) {
+static inline size_t strnlen(const char *src, size_t max) {
int i = 0;
if (max<0) {
while (*src++)
@@ -19,23 +23,9 @@
return i;
}
}
-#else
-static inline size_t strnlen(const char * s, size_t count)
-{
-int d0;
-register int __res;
-__asm__ __volatile__(
- "movl %2,%0\n\t"
- "jmp 2f\n"
- "1:\tcmpb $0,(%0)\n\t"
- "je 3f\n\t"
- "incl %0\n"
- "2:\tdecl %1\n\t"
- "cmpl $-1,%1\n\t"
- "jne 1b\n"
- "3:\tsubl %2,%0"
- :"=a" (__res), "=&d" (d0)
- :"c" (s),"1" (count));
-return __res;
-}
-#endif
+
+extern void *memcpy(void *dest, const void *src, size_t n);
+extern void *memset(void *s, int c, size_t n);
+extern int memcmp(const void *s1, const void *s2, size_t n);
+
+#endif /* STRING_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/subr.h freebios/src/include/subr.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/include/subr.h Mon Mar 12 21:22:19 2001
+++ freebios/src/include/subr.h Thu Mar 15 12:35:06 2001
@@ -1,48 +1,11 @@
#ifndef SUBR_H_
#define SUBR_H_
-/*
- * Read/Write the special configuration registers on the INTEL
- */
-// TODO: split this thing up. Delete the intel_ names
-// that really are not intel-specific, e.g. intel_conf_readb should
-// be conf_readb -- those addresses are defined in the PCI spec.
-unsigned char intel_conf_readb(unsigned long port);
-void intel_conf_writeb(unsigned long port, unsigned char value);
-
-void intel_keyboard_on();
-void intel_smpblock(void *v);
-void intel_nvram_on();
+#include <stdint.h>
void displayinit(void);
void display(char msg[]);
-void printnibl(unsigned long nibl);
-void printchar(unsigned char x);
-void printint(unsigned long x);
void error(char errmsg[]);
-void intel_post(unsigned char value);
-void intel_conf_writeb(unsigned long port, unsigned char value);
-unsigned char intel_conf_readb(unsigned long port);
-void intel_cache_on(unsigned long base, unsigned long totalram);
-void intel_interrupts_on(void);
-void pc_keyboard_init(void);
-void intel_mainboard_fixup(void);
-unsigned long sizeram(void);
-
-#ifdef INTEL_PPRO_MTRR
-void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK);
-#endif
-
-#include <pci.h>
-/* FIXME: how should we handle other architectures for pci access here ?? */
-#include <pci-i386.h>
-
-#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
-#define PIRQ_VERSION 0x0100
-
-extern const struct irq_routing_table intel_irq_routing_table;
-
-void intel_zero_irq_settings(void);
-void intel_check_irq_routing_table(void);
+void post_code(uint8_t value);
#endif /* SUBR_H_ */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/Config freebios/src/lib/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/Config Mon Nov 27 21:44:10 2000
+++ freebios/src/lib/Config Mon Mar 19 20:11:21 2001
@@ -1,10 +1,14 @@
-object fill_inbuf.o
-object hardwaremain.o
object linuxbiosmain.o
object linuxpci.o
object newpci.o
-object params.o
object printk.o
object serial_subr.o
object subr.o
object vsprintf.o
+object memset.o
+object memcpy.o
+object memcmp.o
+object malloc.o
+object elfboot.o
+object do_inflate.o
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/do_inflate.c freebios/src/lib/do_inflate.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/do_inflate.c Wed Dec 31 17:00:00 1969
+++ freebios/src/lib/do_inflate.c Mon Mar 19 20:56:43 2001
@@ -0,0 +1,101 @@
+#include <printk.h>
+#include <string.h>
+#include <stdlib.h>
+#include <rom/fill_inbuf.h>
+#include <subr.h>
+#include "definitions.h"
+#include "do_inflate.h"
+
+#define MALLOC_WINDOW 1
+/*
+ * gzip support routine declartions..
+ * =========================================================
+ */
+
+static void flush_window(void);
+
+static long bytes_out; /* total bytes compressed */
+static unsigned outcnt; /* bytes in output buffer */
+
+#define WSIZE 0x8000 /* Window size must be at least 32k, and a power of two */
+#if !MALLOC_WINDOW
+static unsigned char window[WSIZE]; /* Sliding window buffer */
+#else
+static unsigned char *window; /* Sliding window buffer */
+#endif
+
+
+/*
+ * gzip declarations
+ */
+
+#define OF(args) args
+#define STATIC static
+
+
+#define memzero(s, n) memset ((s), 0, (n))
+
+typedef unsigned char uch;
+typedef unsigned short ush;
+typedef unsigned long ulg;
+
+
+#ifdef TRACEV
+# define Trace(x) printk(KERN_DDEBUG x)
+# define Tracev(x) {if (verbose) printk(KERN_DDEBUG x);}
+# define Tracevv(x) {if (verbose>1) printk(KERN_DDEBUG x);}
+# define Tracec(c,x) {if (verbose && (c)) printk(KERN_DDEBUG x);}
+# define Tracecv(c,x) {if (verbose>1 && (c)) printk(KERN_DDEBUG x);}
+#else
+# define Trace(x)
+# define Tracev(x)
+# define Tracevv(x)
+# define Tracec(c,x)
+# define Tracecv(c,x)
+#endif
+
+#include "inflate.c"
+
+/* Variables that gunzip doesn't need to see... */
+static unsigned char *output_data;
+static unsigned long output_ptr;
+
+
+/* ===========================================================================
+ * Write the output window window[0..outcnt-1] and update crc and bytes_out.
+ * (Used for the decompressed data only.)
+ */
+static void flush_window(void)
+{
+ ulg c = crc; /* temporary variable */
+ unsigned n;
+ uch *in, *out, ch;
+
+ in = window;
+ out = &output_data[output_ptr];
+ DBG("flush 0x%08x count 0x%08x\n", (unsigned long) out, outcnt);
+
+ for (n = 0; n < outcnt; n++) {
+ ch = *out++ = *in++;
+ c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8);
+ }
+ crc = c;
+ bytes_out += (ulg) outcnt;
+ output_ptr += (ulg) outcnt;
+ outcnt = 0;
+}
+
+void gunzip_setup(void)
+{
+ /* common globals -- don't rely on init! */
+ outcnt = 0;
+ bytes_out = 0;
+ output_ptr = 0;
+
+#if MALLOC_WINDOW
+ window = malloc(WSIZE);
+#endif
+ output_data = (char *) KERNEL_START;
+ DBG("output data is 0x%08x\n", (unsigned long) output_data);
+ makecrc();
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/do_inflate.h freebios/src/lib/do_inflate.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/do_inflate.h Wed Dec 31 17:00:00 1969
+++ freebios/src/lib/do_inflate.h Mon Mar 19 20:32:10 2001
@@ -0,0 +1,6 @@
+#ifndef DO_INFLATE_H
+#define DO_INFLATE_H
+
+extern void gunzip_setup(void);
+extern int gunzip(void);
+#endif /* DO_INFLATE_H */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/elfboot.c freebios/src/lib/elfboot.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/elfboot.c Wed Dec 31 17:00:00 1969
+++ freebios/src/lib/elfboot.c Thu Mar 15 15:15:01 2001
@@ -0,0 +1,144 @@
+#if USE_ELF_BOOT
+#include <printk.h>
+#include <boot/elf.h>
+#include <boot/uniform_boot.h>
+#include <rom/fill_inbuf.h>
+#include <string.h>
+#include <subr.h>
+
+int elfboot(size_t totalram)
+{
+ static unsigned char header[ELF_HEAD_SIZE];
+ unsigned long offset;
+ Elf_ehdr *ehdr;
+ Elf_phdr *phdr;
+ void *ptr, *entry;
+ int i;
+
+ printk("\n");
+ printk("Welcome to elfboot, the open sourced starter.\n");
+ printk("Febuary 2001, Eric Biederman.\n");
+ printk("Version 0.99\n");
+ printk("\n");
+ ptr = get_ube_pointer(totalram);
+
+ post_code(0xf8);
+ /* Read in the initial 512 bytes */
+ for(offset = 0; offset < 512; offset++) {
+ header[offset] = get_byte();
+ }
+ ehdr = (Elf_ehdr *)(&header[0]);
+ entry = (void *)(ehdr->e_entry);
+
+ /* Sanity check the elf header */
+ if ((memcmp(ehdr->e_ident, ELFMAG, 4) != 0) ||
+ (ehdr->e_type != ET_EXEC) ||
+ (!elf_check_arch(ehdr)) ||
+ (ehdr->e_ident[EI_VERSION] != EV_CURRENT) ||
+ (ehdr->e_version != EV_CURRENT) ||
+ (ehdr->e_phoff > ELF_HEAD_SIZE) ||
+ (ehdr->e_phentsize != sizeof(Elf_phdr)) ||
+ ((ehdr->e_phoff + (ehdr->e_phentsize * ehdr->e_phnum)) >
+ ELF_HEAD_SIZE)) {
+ goto out;
+ }
+
+ phdr = (Elf_phdr *)&header[ehdr->e_phoff];
+ offset = 0;
+ while(1) {
+ Elf_phdr *cur_phdr = 0;
+ int i,len;
+ unsigned long start_offset;
+ unsigned char *dest, *middle, *end;
+ /* Find the program header that descibes the current piece
+ * of the file.
+ */
+ for(i = 0; i < ehdr->e_phnum; i++) {
+ if (phdr[i].p_type != PT_LOAD) {
+ continue;
+ }
+ if (phdr[i].p_filesz > phdr[i].p_memsz) {
+ continue;
+ }
+ if (phdr[i].p_offset >= offset) {
+ if (!cur_phdr ||
+ (cur_phdr->p_offset > phdr[i].p_offset)) {
+ cur_phdr = &phdr[i];
+ }
+ }
+ }
+ /* If we are out of sections we are done */
+ if (!cur_phdr) {
+ break;
+ }
+ printk("Loading Section: addr: 0x%08x memsz: 0x%08x filesz: 0x%08x\n",
+ cur_phdr->p_paddr, cur_phdr->p_memsz, cur_phdr->p_filesz);
+
+ /* Compute the boundaries of the section */
+ dest = (unsigned char *)(cur_phdr->p_paddr);
+ end = dest + cur_phdr->p_memsz;
+ len = cur_phdr->p_filesz;
+ if (len > cur_phdr->p_memsz) {
+ len = cur_phdr->p_memsz;
+ }
+ middle = dest + len;
+ start_offset = cur_phdr->p_offset;
+
+ /* Skip intial buffer unused bytes */
+ if (offset < ELF_HEAD_SIZE) {
+ if (start_offset < ELF_HEAD_SIZE) {
+ offset = start_offset;
+ } else {
+ offset = ELF_HEAD_SIZE;
+ }
+ }
+
+ /* Skip the unused bytes */
+ while(offset < start_offset) {
+ offset++;
+ get_byte();
+ }
+
+ /* Copy data from the initial buffer */
+ if (offset < ELF_HEAD_SIZE) {
+ size_t len;
+ if ((cur_phdr->p_filesz + start_offset) > ELF_HEAD_SIZE) {
+ len = ELF_HEAD_SIZE - start_offset;
+ }
+ else {
+ len = cur_phdr->p_filesz;
+ }
+ memcpy(dest, &header[start_offset], len);
+ dest += len;
+ }
+
+ /* Read the section into memory */
+ while(dest < middle) {
+ *(dest++) = get_byte();
+ }
+ offset += cur_phdr->p_filesz;
+ /* Zero the extra bytes */
+ while(dest < end) {
+ *(dest++) = 0;
+ }
+ }
+
+ DBG("Jumping to boot code\n");
+ post_code(0xfe);
+
+ /* Jump to kernel */
+ jmp_to_elf_entry(entry, ptr);
+
+ out:
+ printk("Bad ELF Image\n");
+ for(i = 0; i < sizeof(*ehdr); i++) {
+ if ((i & 0xf) == 0) {
+ printk("\n");
+ }
+ printk("%02x ", header[i]);
+ }
+ printk("\n");
+
+ return 0;
+}
+#endif /* USE_ELF_BOOT */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/fill_inbuf.c freebios/src/lib/fill_inbuf.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/fill_inbuf.c Mon Mar 12 21:22:19 2001
+++ freebios/src/lib/fill_inbuf.c Wed Dec 31 17:00:00 1969
@@ -1,240 +0,0 @@
-/* fill_inbuf.c: Fill the input buffer. The input buffer is used by gunzip for its "input" i.e.
- * the compressed data to be uncompressed. This is called only when the buffer is empty
- * and at least one byte is really needed.
- *
- * If the INBUF_COPY is not defined, there is actually no "input buffer" at all. The gunzip
- * reads the compressed data from NVRAM directly. This is used for "traditional flash"
- * configuration.
- *
- * $Id: fill_inbuf.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $
- */
-#ifndef lint
-static char rcsid[] = "$Id: fill_inbuf.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $";
-#endif
-
-#include <cpu/p5/io.h>
-#include <printk.h>
-#include <types.h>
-
-#ifdef USE_DOC_MIL
-#define DOC_KERNEL_START 65536
-#endif
-
-#ifndef ZKERNEL_START
-#define ZKERNEL_START 0xfff80000
-#endif
-
-#ifndef ZKERNEL_MASK
-#define ZKERNEL_MASK 0x0000ffff
-#endif
-
-static unsigned char *zkernel_start = (unsigned char *)ZKERNEL_START;
-static unsigned long zkernel_mask = ZKERNEL_MASK;
-
-
-static unsigned char *nvram;
-static int block_count;
-int firstfill;
-
-#ifdef USE_DOC_MIL
-void memcpy_from_doc_mil(void *dest, const void *src, size_t n);
-unsigned char *doc_mil = (unsigned char *) 0xffffe000;
-#ifdef CHECK_DOC_MIL
-unsigned char *checkbuf;
-#endif /* CHECK_DOC_MIL */
-#endif /* USE_DOC_MIL */
-
-#if defined(INBUF_COPY) || defined(USE_DOC_MIL)
-static unsigned char *ram;
-extern char *malloc();
-#endif
-
-#define K64 (64 * 1024)
-
-#ifndef USE_DOC_MIL
-int fill_inbuf(void)
-{
- extern unsigned char *inbuf;
- extern unsigned int insize;
- extern unsigned int inptr;
-
- if (firstfill) {
- block_count = 0;
- firstfill = 0;
-#ifdef INBUF_COPY
- ram = malloc(K64);
-#endif
- }
-
- if (block_count > 31) {
- printk(KERN_EMERG "%6d:%s() - overflowed source buffer\n",
- __LINE__, __FUNCTION__);
- inbuf = zkernel_start;
- inptr = 0;
- insize = 0;
- return (0);
- }
-
- if (!block_count) {
- nvram = zkernel_start;
-
-#ifdef INBUF_COPY
- if (!ram) {
- printk(KERN_EMERG "%6d:%s() - "
- "ram malloc failed\n",
- __LINE__, __FUNCTION__);
- inbuf = zkernel_start;
- inptr = 0;
- insize = 0;
- return (0);
- }
-
- DBG("%6d:%s() - ram buffer:0x%08x\n",
- __LINE__, __FUNCTION__, ram);
-#endif
- DBG("%6d:%s() - zkernel_start:0x%08x "
- "zkernel_mask:0x%08x\n",
- __LINE__, __FUNCTION__,
- zkernel_start, zkernel_mask);
- } else {
- nvram += K64;
-
- while (!(zkernel_mask & (1 << block_count))) {
- DBG("%6d:%s() - skipping block %d\n",
- __LINE__, __FUNCTION__, block_count);
-
- block_count++;
- nvram += K64;
-
- if (block_count > 31) {
- printk(KERN_EMERG "%6d:%s() - "
- "overflowed source buffer\n",
- __LINE__, __FUNCTION__);
- inbuf = zkernel_start;
- inptr = 0;
- insize = 1;
- return (0);
- }
- }
- }
-
-#ifdef INBUF_COPY
- memcpy(ram, nvram, K64);
-#endif
- DBG("%6d:%s() - nvram:0x%p block_count:%d\n",
- __LINE__, __FUNCTION__, nvram, block_count);
-
-#ifdef INBUF_COPY
- inbuf = ram;
-#else
- inbuf = nvram;
-#endif
- insize = K64;
- inptr = 1;
- intel_post(0xd0 + block_count);
- block_count++;
- return inbuf[0];
-}
-
-#else /* USE_DOC_MIL */
-
-int fill_inbuf(void)
-{
- extern unsigned char *inbuf;
- extern unsigned int insize;
- extern unsigned int inptr;
-
- if (firstfill) {
- if ((ram = malloc(K64)) == NULL) {
- printk(KERN_EMERG "%6d:%s() - ram malloc failed\n",
- __LINE__, __FUNCTION__);
- return (0);
- }
-
-#ifdef CHECK_DOC_MIL
- if ((checkbuf = malloc(K64)) == NULL) {
- printk(KERN_EMERG "%6d:%s() - checkbuf malloc failed\n",
- __LINE__, __FUNCTION__);
- printk(KERN_EMERG "Checking disabled\n");
- }
-#endif
-
- DBG("%6d:%s() - ram buffer:0x%p\n",
- __LINE__, __FUNCTION__, ram);
-
- block_count = 0;
- firstfill = 0;
- nvram = (unsigned char *) DOC_KERNEL_START;
- }
-
- memcpy_from_doc_mil(ram, nvram, K64);
-#ifdef CHECK_DOC_MIL
- if (checkbuf) {
- memcpy_from_doc_mil(checkbuf, nvram, K64);
- if (memcmp(checkbuf, ram, K64)) {
- printk("CHECKBUF FAILS for doc mil!\n");
- printk(KERN_EMERG "address 0x%x\n", nvram);
- }
- }
- {
- int i;
- printk(KERN_INFO "First 16 bytes of block: ");
- for(i = 0; i < 16; i++)
- printk("0x%x ", ram[i]);
- printk(KERN_INFO "\n");
- }
-#endif
- DBG("%6d:%s() - nvram:0x%p block_count:%d\n",
- __LINE__, __FUNCTION__, nvram, block_count);
-
- nvram += K64;
- inbuf = ram;
- insize = K64;
- inptr = 1;
-
- intel_post(0xd0 + block_count);
- block_count++;
- return inbuf[0];
-}
-
-void memcpy_from_doc_mil(void *dest, const void *src, size_t n)
-{
- int i;
- unsigned long address = (unsigned long) src;
-
- for (i = n; i >= 0; i -= 0x200) {
- unsigned short c = 0x1000;
- volatile unsigned char dummy;
-
- /* issue Read00 flash command */
- *(unsigned char *) (doc_mil + 0x1004) = 0x03;
- *(unsigned char *) (doc_mil + 0x800) = 0x00;
- *(unsigned char *) (doc_mil + 0x101e) = 0x00;
- *(unsigned char *) (doc_mil + 0x1004) = 0x01;
-
- /* issue Address to flash */
- *(unsigned char *) (doc_mil + 0x1004) = 0x05;
- *(unsigned char *) (doc_mil + 0x800) = address & 0xff;
- *(unsigned char *) (doc_mil + 0x800) = (address >> 9) & 0xff;
- *(unsigned char *) (doc_mil + 0x800) = (address >> 17) & 0xff;
- *(unsigned char *) (doc_mil + 0x101e) = 0x00;
- *(unsigned char *) (doc_mil + 0x1004) = 0x01;
-
- /* We are using the "side effect" of the assignment to force GCC reload
- * *(doc_mil + 0x1004) on each iteration */
- while (!((dummy = *(unsigned char *) (doc_mil + 0x1004)) & 0x80) && --c)
- /* wait for chip response */;
-
- /* copy 512 bytes of data from CDSN_IO registers */
- dummy = *(unsigned char *) (doc_mil + 0x101d);
- memcpy(dest, doc_mil + 0x800, 0x200);
-
- dest += 0x200;
- address += 0x200;
- }
-}
-#endif /* USE_DOC_MIL */
-
-
-
-
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/hardwaremain.c freebios/src/lib/hardwaremain.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/hardwaremain.c Mon Mar 12 21:22:19 2001
+++ freebios/src/lib/hardwaremain.c Wed Dec 31 17:00:00 1969
@@ -1,200 +0,0 @@
-/*
-This software and ancillary information (herein called SOFTWARE )
-called LinuxBIOS is made available under the terms described
-here. The SOFTWARE has been approved for release with associated
-LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
-been authored by an employee or employees of the University of
-California, operator of the Los Alamos National Laboratory under
-Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
-U.S. Government has rights to use, reproduce, and distribute this
-SOFTWARE. The public may copy, distribute, prepare derivative works
-and publicly display this SOFTWARE without charge, provided that this
-Notice and any statement of authorship are reproduced on all copies.
-Neither the Government nor the University makes any warranty, express
-or implied, or assumes any liability or responsibility for the use of
-this SOFTWARE. If SOFTWARE is modified to produce derivative works,
-such modified SOFTWARE should be clearly marked, so as not to confuse
-it with the version available from LANL.
- */
-/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
- * [EMAIL PROTECTED]
- */
-
-
-/*
- * C Bootstrap code for the INTEL
- * $Id: hardwaremain.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $
- *
- */
-
-#define LINUXBIOS
-#ifndef lint
-static char rcsid[] = "$Id: hardwaremain.c,v 1.14 2001/03/13 04:22:19 rminnich Exp $";
-#endif
-
-#include <cpu/p5/io.h>
-#include <intel.h>
-#include <pciconf.h>
-#include <cpu/p5/cpuid.h>
-#include <subr.h>
-#include <printk.h>
-
-void intel_main()
-{
- // These are only used here, so don't bother putting them in a .h
- void mainboard_fixup(void);
- void nvram_on(void);
- void keyboard_on(void);
- void framebuffer_on(void);
- void intel_copy_irq_routing_table(void);
-
-#ifdef FINAL_MAINBOARD_FIXUP
- void final_mainboard_fixup(void);
-#endif /* FINAL_MAINBOARD_FIXUP */
-
-#ifdef CONFIGURE_L2_CACHE
- int intel_l2_configure();
-#endif /* CONFIGURE_L2_CACHE */
-
-#ifdef UPDATE_MICROCODE
- void intel_display_cpuid_microcode(void);
-#endif /* UPDATE_MICROCODE */
-
- /* the order here is a bit tricky. We don't want to do much of
- * anything that uses config registers until after PciAllocateResources
- * since that function also figures out what kind of config strategy
- * to use (type 1 or type 2).
- * so we turn on cache, then worry about PCI setup, then do other
- * things, so that the other work can use the PciRead* and PciWrite*
- * functions.
- */
- unsigned long totalram = 0;
- extern void linuxbiosmain(unsigned long membase, unsigned long totalram);
- extern void malloc_init(unsigned long start, unsigned long end);
-
- /* displayinit MUST PRECEDE ALL PRINTK! */
- displayinit();
-
- intel_post(0x39);
-
- printk(KERN_INFO "Reached intel_main().\n");
-
- intel_post(0x40);
-
- /* segment 3,4,5,6 are used for malloc memory */
- malloc_init(0x30000, 0x70000);
-
-#ifdef UPDATE_MICROCODE
- intel_post(0x41);
- printk(KERN_INFO "Updating microcode\n");
- intel_display_cpuid_microcode();
-#endif /* UPDATE_MICROCODE */
- intel_post(0x42);
-
- // pick how to scan the bus. This is first so we can get at memory size.
- printk(KERN_INFO "Finding PCI confiuration type...\n");
- pci_set_method();
- intel_post(0x5f);
-
- printk(KERN_INFO "Scanning PCI bus...");
- pci_enumerate();
- intel_post(0x66);
- printk(KERN_INFO "done\n");
-
- // The framebuffer can change how much memory you have.
- // So you really need to run this before you size ram.
-#ifdef HAVE_FRAMEBUFFER
- framebuffer_on();
-#endif /* HAVE_FRAMEBUFFER */
-
- totalram = sizeram();
- intel_post(0x70);
- printk(KERN_INFO "totalram: %ldM\n", totalram/1024);
-
- // can't size just yet ...
- // mainboard totalram sizing may not be up yet. If it is not ready,
- // take a default of 64M
- if (!totalram)
- totalram = 64 * 1024;
-
- // Turn on cache before configuring the bus.
- printk(KERN_INFO "Enabling cache...");
- intel_cache_on(0, totalram);
- intel_post(0x80);
- printk(KERN_INFO "done.\n");
-
- printk(KERN_INFO "Allocating PCI resources...");
- // Now do the real bus
- // we round the total ram up a lot for thing like the SISFB, which
- // shares high memory with the CPU.
- pci_configure();
- intel_post(0x88);
- pci_enable();
- intel_post(0x90);
- printk(KERN_INFO "done.\n");
-
- /* set up the IO-APIC for the clock interrupt. */
- intel_post(0x92);
- setup_ioapic();
-
- // generic mainboard fixup
- mainboard_fixup();
-
-#ifndef MAINBOARD_FIXUP_IN_CHARGE
-
- nvram_on();
-
- intel_display_cpuid();
- intel_mtrr_check();
-
-#ifndef NO_KEYBOARD
- keyboard_on();
-#endif /* NO_KEYBOARD */
-
-#ifdef MUST_ENABLE_FLOPPY
- enable_floppy();
- intel_post(0x95);
-#endif /* MUST_ENABLE_FLOPPY */
-
-#ifdef SMP
- /* copy the smp block to address 0 */
- intel_smpblock((void *)16);
- intel_post(0x96);
-#endif /* SMP */
-
- intel_zero_irq_settings();
- intel_check_irq_routing_table();
- intel_copy_irq_routing_table();
-
- intel_post(0x9a);
-
- /* to do: intel_serial_on(); */
- intel_interrupts_on();
-
-
-#ifdef FINAL_MAINBOARD_FIXUP
- printk(KERN_INFO "Final mainboard fixup for ");
- intel_post(0xec);
- final_mainboard_fixup();
- printk(KERN_INFO "done.\n");
-#endif /* FINAL_MAINBOARD_FIXUP */
-
-#ifdef CONFIGURE_L2_CACHE
- /* now that everything is really up, enable the l2 cache if desired.
- * The enable can wait until this point, because linuxbios and it's
- * data areas are tiny, easily fitting into the L1 cache.
- */
- printk(KERN_INFO "Configuring L2 cache...");
- intel_l2_configure();
- printk(KERN_INFO "done.\n");
-#endif /* CONFIGURE_L2_CACHE */
-
-#endif /* MAINBOARD_FIXUP_IN_CHARGE */
-
-#ifdef LINUXBIOS
- printk(KERN_INFO "Jumping to linuxbiosmain()...\n");
- // we could go to argc, argv, for main but it seems like overkill.
- intel_post(0xed);
- linuxbiosmain(0, totalram);
-#endif /* LINUXBIOS */
-}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/inflate.c freebios/src/lib/inflate.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/inflate.c Sun Oct 15 21:03:03 2000
+++ freebios/src/lib/inflate.c Mon Mar 19 21:06:22 2001
@@ -1,8 +1,5 @@
#define DEBG(x)
-#define DEBGINT(x)
#define DEBG1(x)
-#define DEBGH(x)
-#define DEBGDYN(x)
/* Taken from /usr/src/linux/lib/inflate.c [unmodified]
Used for start32, 1/11/2000
James Hendricks, Dale Webster */
@@ -13,6 +10,12 @@
/*
* Adapted for booting Linux by Hannu Savolainen 1993
* based on gzip-1.0.3
+ *
+ * Nicolas Pitre <[EMAIL PROTECTED]>, 1999/04/14 :
+ * Little mods for all variable to reside either into rodata or bss segments
+ * by marking constant variables with 'const' and initializing all the others
+ * at run-time only. This allows for the kernel uncompressor to run
+ * directly from Flash or ROM memory on embeded systems.
*/
/*
@@ -115,7 +118,6 @@
# include <stdlib.h>
#endif
-
#include "gzip.h"
#define STATIC
#endif /* !STATIC */
@@ -140,8 +142,8 @@
/* Function prototypes */
-STATIC int huft_build OF((unsigned *, unsigned, unsigned, const ush *,
- const ush *, struct huft **, int *));
+STATIC int huft_build OF((unsigned *, unsigned, unsigned,
+ const ush *, const ush *, struct huft **, int *));
STATIC int huft_free OF((struct huft *));
STATIC int inflate_codes OF((struct huft *, struct huft *, int, int));
STATIC int inflate_stored OF((void));
@@ -164,20 +166,20 @@
#define flush_output(w) (wp=(w),flush_window())
/* Tables for deflate from PKZIP's appnote.txt. */
-const unsigned border[] = { /* Order of the bit length code lengths */
+static const unsigned border[] = { /* Order of the bit length code lengths */
16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-const ush cplens[] = { /* Copy lengths for literal codes 257..285 */
+static const ush cplens[] = { /* Copy lengths for literal codes 257..285 */
3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
/* note: see note #13 above about the 258 in this list. */
-const ush cplext[] = { /* Extra bits for literal codes 257..285 */
+static const ush cplext[] = { /* Extra bits for literal codes 257..285 */
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 99, 99}; /* 99==invalid */
-const ush cpdist[] = { /* Copy offsets for distance codes 0..29 */
+static const ush cpdist[] = { /* Copy offsets for distance codes 0..29 */
1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
8193, 12289, 16385, 24577};
-const ush cpdext[] = { /* Extra bits for distance codes */
+static const ush cpdext[] = { /* Extra bits for distance codes */
0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6,
7, 7, 8, 8, 9, 9, 10, 10, 11, 11,
12, 12, 13, 13};
@@ -217,7 +219,7 @@
STATIC ulg bb; /* bit buffer */
STATIC unsigned bk; /* bits in bit buffer */
-const ush mask_bits[] = {
+STATIC const ush mask_bits[] = {
0x0000,
0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff,
0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff
@@ -261,8 +263,8 @@
*/
-STATIC int lbits ; /* bits in base literal/length lookup table */
-STATIC int dbits ; /* bits in base distance lookup table */
+STATIC const int lbits = 9; /* bits in base literal/length lookup table */
+STATIC const int dbits = 6; /* bits in base distance lookup table */
/* If BMAX needs to be larger than 16, then h and x[] should be ulg. */
@@ -273,14 +275,14 @@
STATIC unsigned hufts; /* track memory usage */
-STATIC int huft_build(
- unsigned *b, /* code lengths in bits (all assumed <= BMAX) */
- unsigned n, /* number of codes (assumed <= N_MAX) */
- unsigned s, /* number of simple-valued codes (0..s-1) */
- const ush *d, /* list of base values for non-simple codes */
- const ush *e, /* list of extra bits for non-simple codes */
- struct huft **t, /* result: starting table */
- int *m) /* maximum lookup bits, returns actual */
+STATIC int huft_build(b, n, s, d, e, t, m)
+unsigned *b; /* code lengths in bits (all assumed <= BMAX) */
+unsigned n; /* number of codes (assumed <= N_MAX) */
+unsigned s; /* number of simple-valued codes (0..s-1) */
+const ush *d; /* list of base values for non-simple codes */
+const ush *e; /* list of extra bits for non-simple codes */
+struct huft **t; /* result: starting table */
+int *m; /* maximum lookup bits, returns actual */
/* Given a list of code lengths and a maximum table size, make a set of
tables to decode that set of codes. Return zero on success, one if
the given code set is incomplete (the tables are still built in this
@@ -307,7 +309,7 @@
int y; /* number of dummy codes added */
unsigned z; /* number of entries in current table */
-DEBGH("huft1 ");
+DEBG("huft1 ");
/* Generate counts for each bit length */
memzero(c, sizeof(c));
@@ -320,12 +322,12 @@
} while (--i);
if (c[0] == n) /* null input--all zero length codes */
{
- *t = 0;
+ *t = (struct huft *)NULL;
*m = 0;
return 0;
}
-DEBGH("huft2 ");
+DEBG("huft2 ");
/* Find minimum and maximum length, bound *m by those */
l = *m;
@@ -343,7 +345,7 @@
l = i;
*m = l;
-DEBGH("huft3 ");
+DEBG("huft3 ");
/* Adjust last length count to fill out codes, if needed */
for (y = 1 << j; j < i; j++, y <<= 1)
@@ -353,7 +355,7 @@
return 2;
c[i] += y;
-DEBGH("huft4 ");
+DEBG("huft4 ");
/* Generate starting offsets into the value table for each length */
x[1] = j = 0;
@@ -362,7 +364,7 @@
*xp++ = (j += *p++);
}
-DEBGH("huft5 ");
+DEBG("huft5 ");
/* Make a table of values in order of bit lengths */
p = b; i = 0;
@@ -371,26 +373,26 @@
v[x[j]++] = i;
} while (++i < n);
-DEBGH("h6 ");
+DEBG("h6 ");
/* Generate the Huffman codes and for each, make the table entries */
x[0] = i = 0; /* first Huffman code is zero */
p = v; /* grab values in bit order */
h = -1; /* no tables yet--level -1 */
w = -l; /* bits decoded == (l * h) */
- u[0] = 0; /* just to keep compilers happy */
- q = (struct huft *)0; /* ditto */
+ u[0] = (struct huft *)NULL; /* just to keep compilers happy */
+ q = (struct huft *)NULL; /* ditto */
z = 0; /* ditto */
-DEBGH("h6a ");
+DEBG("h6a ");
/* go through the bit lengths (k already is bits in shortest code) */
for (; k <= g; k++)
{
-DEBGH("h6b ");
+DEBG("h6b ");
a = c[k];
while (a--)
{
-DEBGH("h6b1 ");
+DEBG("h6b1 ");
/* here i is the Huffman code of length k bits for value *p */
/* make tables up to required level */
while (k > w + l)
@@ -417,7 +419,8 @@
z = 1 << j; /* table entries for j-bit table */
/* allocate and link in new table */
- if ((q = (struct huft *)malloc((z + 1)*sizeof(struct huft))) == 0)
+ if ((q = (struct huft *)malloc((z + 1)*sizeof(struct huft))) ==
+ (struct huft *)NULL)
{
if (h)
huft_free(u[0]);
@@ -426,7 +429,7 @@
DEBG1("4 ");
hufts += z + 1; /* track memory usage */
*t = q + 1; /* link to list for huft_free() */
- *(t = &(q->v.t)) = 0;
+ *(t = &(q->v.t)) = (struct huft *)NULL;
u[h] = ++q; /* table starts after link */
DEBG1("5 ");
@@ -442,7 +445,7 @@
}
DEBG1("6 ");
}
-DEBGH("h6c ");
+DEBG("h6c ");
/* set up table entry in r */
r.b = (uch)(k - w);
@@ -459,7 +462,7 @@
r.e = (uch)e[*p - s]; /* non-simple--look up in lists */
r.v.n = d[*p++ - s];
}
-DEBGH("h6d ");
+DEBG("h6d ");
/* fill code-like entries with r */
f = 1 << (k - w);
@@ -477,12 +480,12 @@
h--; /* don't need to update q */
w -= l;
}
-DEBGH("h6e ");
+DEBG("h6e ");
}
-DEBGH("h6f ");
+DEBG("h6f ");
}
-DEBGH("huft7 ");
+DEBG("huft7 ");
/* Return true (1) if we were given an incomplete table */
return y != 0 && g != 1;
@@ -490,8 +493,8 @@
-STATIC int huft_free(
-struct huft *t) /* table to free */
+STATIC int huft_free(t)
+struct huft *t; /* table to free */
/* Free the malloc'ed tables built by huft_build(), which makes a linked
list of the tables it made, with the links in a dummy first entry of
each table. */
@@ -501,7 +504,7 @@
/* Go through linked list, freeing from the malloced (t[-1]) address. */
p = t;
- while (p != 0)
+ while (p != (struct huft *)NULL)
{
q = (--p)->v.t;
free((char*)p);
@@ -511,11 +514,9 @@
}
-STATIC int inflate_codes(
- struct huft *tl,
- struct huft *td, /* literal/length and distance decoder tables */
- int bl,
- int bd) /* number of bits decoded by tl[] and td[] */
+STATIC int inflate_codes(tl, td, bl, bd)
+struct huft *tl, *td; /* literal/length and distance decoder tables */
+int bl, bd; /* number of bits decoded by tl[] and td[] */
/* inflate (decompress) the codes in a deflated (compressed) block.
Return an error code or zero if it all goes ok. */
{
@@ -550,9 +551,6 @@
DUMPBITS(t->b)
if (e == 16) /* then it's a literal */
{
-/*
- DEBG("l");
- */
slide[w++] = (uch)t->v.n;
Tracevv((stderr, "%c", slide[w-1]));
if (w == WSIZE)
@@ -587,18 +585,10 @@
d = w - t->v.n - ((unsigned)b & mask_bits[e]);
DUMPBITS(e)
Tracevv((stderr,"\\[%d,%d]", w-d, n));
-/*
- DEBG("D");printint(w-d);printint(n);
- */
/* do the copy */
do {
n -= (e = (e = WSIZE - ((d &= WSIZE-1) > w ? d : w)) > n ? n : e);
-#if 0
- DEBG("memcpy %d to %d size %d"); printint(d); printint(w);
- printint(e);
- DEBG("\n");
-#endif
#if !defined(NOMEMCPY) && !defined(DEBUG)
if (w - d >= e) /* (this test assumes unsigned comparison) */
{
@@ -633,7 +623,7 @@
-STATIC int inflate_stored(void)
+STATIC int inflate_stored()
/* "decompress" an inflated type 0 (stored) block. */
{
unsigned n; /* number of bytes in block */
@@ -689,7 +679,7 @@
-STATIC int inflate_fixed(void)
+STATIC int inflate_fixed()
/* decompress an inflated type 1 (fixed Huffman codes) block. We should
either replace this with a custom decoder, or at least precompute the
Huffman tables. */
@@ -743,7 +733,7 @@
-STATIC int inflate_dynamic(void)
+STATIC int inflate_dynamic()
/* decompress an inflated type 2 (dynamic Huffman codes) block. */
{
int i; /* temporary variables */
@@ -766,14 +756,6 @@
register ulg b; /* bit buffer */
register unsigned k; /* number of bits in bit buffer */
-
-#if 0
- for(i = 0; i < 288+32; i++)
- if (ll[i]) {
- display("non-zero ll index at ");
- printint(i);
- }
-#endif
DEBG("<dyn");
/* make local bit buffer */
@@ -797,8 +779,8 @@
if (nl > 286 || nd > 30)
#endif
return 1; /* bad lengths */
-DEBGINT(nl); DEBGINT(nd); DEBGINT(nb);
-DEBGDYN("dyn1 ");
+
+DEBG("dyn1 ");
/* read in bit-length-code lengths */
for (j = 0; j < nb; j++)
@@ -810,17 +792,18 @@
for (; j < 19; j++)
ll[border[j]] = 0;
+DEBG("dyn2 ");
/* build decoding table for trees--single level, 7 bit lookup */
bl = 7;
- if ((i = huft_build(ll, 19, 19, 0, 0, &tl, &bl)) != 0)
+ if ((i = huft_build(ll, 19, 19, NULL, NULL, &tl, &bl)) != 0)
{
if (i == 1)
huft_free(tl);
return i; /* incomplete code set */
}
-DEBGDYN("dyn3 freemem now "); DEBGINT(free_mem_ptr);
+DEBG("dyn3 ");
/* read in literal and distance code lengths */
n = nl + nd;
@@ -832,9 +815,6 @@
j = (td = tl + ((unsigned)b & m))->b;
DUMPBITS(j)
j = td->v.n;
-/*
- DEBGDYN("j is now"); DEBGINT(j);
- */
if (j < 16) /* length of code in bits (0..15) */
ll[i++] = l = j; /* save last length in l */
else if (j == 16) /* repeat last length 3 to 6 times */
@@ -842,9 +822,6 @@
NEEDBITS(2)
j = 3 + ((unsigned)b & 3);
DUMPBITS(2)
-/*
- DEBGDYN("j second is now"); DEBGINT(j);
- */
if ((unsigned)i + j > n)
return 1;
while (j--)
@@ -855,9 +832,6 @@
NEEDBITS(3)
j = 3 + ((unsigned)b & 7);
DUMPBITS(3)
-/*
- DEBGDYN("j three is now"); DEBGINT(j);
- */
if ((unsigned)i + j > n)
return 1;
while (j--)
@@ -869,9 +843,6 @@
NEEDBITS(7)
j = 11 + ((unsigned)b & 0x7f);
DUMPBITS(7)
-/*
- DEBGDYN("j four is now"); DEBGINT(j);
- */
if ((unsigned)i + j > n)
return 1;
while (j--)
@@ -880,35 +851,35 @@
}
}
-DEBGDYN("dyn4 ");
+DEBG("dyn4 ");
/* free decoding table for trees */
huft_free(tl);
-DEBGDYN("dyn5 free mem is now");DEBGINT(free_mem_ptr);
+DEBG("dyn5 ");
/* restore the global bit buffer */
bb = b;
bk = k;
-DEBGDYN("dyn5a ");
+DEBG("dyn5a ");
/* build the decoding tables for literal/length and distance codes */
bl = lbits;
if ((i = huft_build(ll, nl, 257, cplens, cplext, &tl, &bl)) != 0)
{
-DEBGDYN("dyn5b ");
+DEBG("dyn5b ");
if (i == 1) {
error(" incomplete literal tree\n");
huft_free(tl);
}
return i; /* incomplete code set */
}
-DEBGDYN("dyn5c ");
+DEBG("dyn5c ");
bd = dbits;
if ((i = huft_build(ll + nl, nd, 0, cpdist, cpdext, &td, &bd)) != 0)
{
-DEBGDYN("dyn5d ");
+DEBG("dyn5d ");
if (i == 1) {
error(" incomplete distance tree\n");
#ifdef PKZIP_BUG_WORKAROUND
@@ -922,15 +893,13 @@
#endif
}
-DEBGDYN("dyn6 free_mem_ptr ");DEBGINT(free_mem_ptr);
+DEBG("dyn6 ");
/* decompress until an end-of-block code */
-DEBG("inflate_codes inptr is "); DEBGINT(inptr);
if (inflate_codes(tl, td, bl, bd))
return 1;
-DEBG("AFTER inflate_codes inptr is "); DEBGINT(inptr);
-DEBGDYN("dyn7 ");
+DEBG("dyn7 ");
/* free the decoding tables, return */
huft_free(tl);
@@ -942,18 +911,16 @@
-STATIC int inflate_block(
-int *e) /* last block flag */
+STATIC int inflate_block(e)
+int *e; /* last block flag */
/* decompress an inflated block */
{
unsigned t; /* block type */
register ulg b; /* bit buffer */
register unsigned k; /* number of bits in bit buffer */
- DEBG("<blk(");
- DEBGINT(inptr);
- DEBG(")");
-
+ DEBG("<blk");
+
/* make local bit buffer */
b = bb;
k = bk;
@@ -991,13 +958,13 @@
-STATIC int inflate(void)
+STATIC int inflate()
/* decompress an inflated entry */
{
int e; /* last block flag */
int r; /* result code */
unsigned h; /* maximum struct huft's malloc'ed */
- void *ptr;
+ malloc_mark_t mark;
/* initialize window, bit buffer */
wp = 0;
@@ -1009,12 +976,12 @@
h = 0;
do {
hufts = 0;
- gzip_mark(&ptr);
+ malloc_mark(&mark);
if ((r = inflate_block(&e)) != 0) {
- gzip_release(&ptr);
+ malloc_release(&mark);
return r;
}
- gzip_release(&ptr);
+ malloc_release(&mark);
if (hufts > h)
h = hufts;
} while (!e);
@@ -1043,9 +1010,7 @@
**********************************************************************/
static ulg crc_32_tab[256];
-/* note that this fails for NVRAM! */
-/* do assign below in makecrc */
-static ulg crc ; /*= (ulg)0xffffffffL; shift register contents */
+static ulg crc; /* initialized in makecrc() so it'll reside in bss */
#define CRC_VALUE (crc ^ 0xffffffffL)
/*
@@ -1064,12 +1029,8 @@
int k; /* byte being shifted into crc apparatus */
/* terms of polynomial defining this crc (except x^32): */
- const int p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
+ static const int p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
- /* move init of the lbits and dbits here, I know this is hokey -- rgm */
- lbits = 9; /* bits in base literal/length lookup table */
- dbits = 6; /* bits in base distance lookup table */
- crc = (ulg)0xffffffffL; /* shift register contents */
/* Make exclusive-or pattern from polynomial */
e = 0;
for (i = 0; i < sizeof(p)/sizeof(int); i++)
@@ -1088,6 +1049,9 @@
}
crc_32_tab[i] = c;
}
+
+ /* this is initialized here so this code could reside in ROM */
+ crc = (ulg)0xffffffffL; /* shift register contents */
}
/* gzip flag byte */
@@ -1102,7 +1066,7 @@
/*
* Do the uncompression!
*/
-static int gunzip(void)
+int gunzip(void)
{
uch flags;
unsigned char magic[2]; /* magic header */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/linuxbiosmain.c freebios/src/lib/linuxbiosmain.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/linuxbiosmain.c Mon Mar 12 21:22:19 2001
+++ freebios/src/lib/linuxbiosmain.c Mon Mar 19 20:40:19 2001
@@ -17,1578 +17,32 @@
* High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
*/
-#include "definitions.h"
-#include "printk.h"
+#include <printk.h>
#include <params.h>
#include <subr.h>
-
-#define ERRCHK
-#undef TRACEV
-#define MALLOCDBG
-
-/*
- * gzip declarations
- */
-
-#define OF(args) args
-#define STATIC static
-
-#undef memset
-#undef memcpy
-#define memzero(s, n) memset ((s), 0, (n))
-
-typedef unsigned char uch;
-typedef unsigned short ush;
-typedef unsigned long ulg;
-
-#define K64 (64*1024)
-#define WSIZE 0x8000 /* Window size must be at least 32k, and a power of two */
-
-uch *inbuf; /* input buffer */
-#if 0
-static uch window[WSIZE]; /* Sliding window buffer */
-#else
-static uch *window; /* Sliding window buffer */
-#endif
-
-unsigned insize; /* valid bytes in inbuf */
-unsigned inptr; /* index of next byte to be processed in inbuf */
-unsigned outcnt; /* bytes in output buffer */
-
-/* gzip flag byte */
-#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
-#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
-#define COMMENT 0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
-#define RESERVED 0xC0 /* bit 6,7: reserved */
-
-extern int fill_inbuf(void);
-extern void error(char[]);
-extern void displayinit(void);
-
-typedef void (*kernel) ();
-kernel v;
-
-void malloc_init(unsigned long start, unsigned long end);
-void *malloc(size_t size);
-
-static void flush_window(void);
-static void free(void *where);
-static void gzip_mark(void **);
-static void gzip_release(void **);
-
-static long bytes_out;
-static uch *output_data;
-static unsigned long output_ptr;
-
-static long free_mem_ptr; /* Unused memory */
-static long free_mem_end_ptr; /* 128k */
-
-#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-
-//static int verbose = 1;
-/* Diagnostic functions */
-#ifdef ERRCHK
-# define Assert(cond,msg) {if(!(cond)) error(msg);}
-#else
-# define Assert(cond,msg)
-#endif
-
-#ifdef TRACEV
-# define Trace(x) printk(KERN_DDEBUG x)
-# define Tracev(x) {if (verbose) printk(KERN_DDEBUG x);}
-# define Tracevv(x) {if (verbose>1) printk(KERN_DDEBUG x);}
-# define Tracec(c,x) {if (verbose && (c)) printk(KERN_DDEBUG x);}
-# define Tracecv(c,x) {if (verbose>1 && (c)) printk(KERN_DDEBUG x);}
-#else
-# define Trace(x)
-# define Tracev(x)
-# define Tracevv(x)
-# define Tracec(c,x)
-# define Tracecv(c,x)
-#endif
-
-/* make this separately-compilable later.
-#include "inflate.c"
- */
-#define DEBG(x)
-#define DEBGINT(x)
-#define DEBG1(x)
-#define DEBGH(x)
-#define DEBGDYN(x)
-/* Taken from /usr/src/linux/lib/inflate.c [unmodified]
- Used for start32, 1/11/2000
- James Hendricks, Dale Webster */
-
-/* inflate.c -- Not copyrighted 1992 by Mark Adler
- version c10p1, 10 January 1993 */
-
-/*
- * Adapted for booting Linux by Hannu Savolainen 1993
- * based on gzip-1.0.3
- */
-
-/*
- Inflate deflated (PKZIP's method 8 compressed) data. The compression
- method searches for as much of the current string of bytes (up to a
- length of 258) in the previous 32 K bytes. If it doesn't find any
- matches (of at least length 3), it codes the next byte. Otherwise, it
- codes the length of the matched string and its distance backwards from
- the current position. There is a single Huffman code that codes both
- single bytes (called "literals") and match lengths. A second Huffman
- code codes the distance information, which follows a length code. Each
- length or distance code actually represents a base value and a number
- of "extra" (sometimes zero) bits to get to add to the base value. At
- the end of each deflated block is a special end-of-block (EOB) literal/
- length code. The decoding process is basically: get a literal/length
- code; if EOB then done; if a literal, emit the decoded byte; if a
- length then get the distance and emit the referred-to bytes from the
- sliding window of previously emitted data.
-
- There are (currently) three kinds of inflate blocks: stored, fixed, and
- dynamic. The compressor deals with some chunk of data at a time, and
- decides which method to use on a chunk-by-chunk basis. A chunk might
- typically be 32 K or 64 K. If the chunk is incompressible, then the
- "stored" method is used. In this case, the bytes are simply stored as
- is, eight bits per byte, with none of the above coding. The bytes are
- preceded by a count, since there is no longer an EOB code.
-
- If the data is compressible, then either the fixed or dynamic methods
- are used. In the dynamic method, the compressed data is preceded by
- an encoding of the literal/length and distance Huffman codes that are
- to be used to decode this block. The representation is itself Huffman
- coded, and so is preceded by a description of that code. These code
- descriptions take up a little space, and so for small blocks, there is
- a predefined set of codes, called the fixed codes. The fixed method is
- used if the block codes up smaller that way (usually for quite small
- chunks), otherwise the dynamic method is used. In the latter case, the
- codes are customized to the probabilities in the current block, and so
- can code it much better than the pre-determined fixed codes.
-
- The Huffman codes themselves are decoded using a multi-level table
- lookup, in order to maximize the speed of decoding plus the speed of
- building the decoding tables. See the comments below that precede the
- lbits and dbits tuning parameters.
- */
-
-
-/*
- Notes beyond the 1.93a appnote.txt:
-
- 1. Distance pointers never point before the beginning of the output
- stream.
- 2. Distance pointers can point back across blocks, up to 32k away.
- 3. There is an implied maximum of 7 bits for the bit length table and
- 15 bits for the actual data.
- 4. If only one code exists, then it is encoded using one bit. (Zero
- would be more efficient, but perhaps a little confusing.) If two
- codes exist, they are coded using one bit each (0 and 1).
- 5. There is no way of sending zero distance codes--a dummy must be
- sent if there are none. (History: a pre 2.0 version of PKZIP would
- store blocks with no distance codes, but this was discovered to be
- too harsh a criterion.) Valid only for 1.93a. 2.04c does allow
- zero distance codes, which is sent as one code of zero bits in
- length.
- 6. There are up to 286 literal/length codes. Code 256 represents the
- end-of-block. Note however that the static length tree defines
- 288 codes just to fill out the Huffman codes. Codes 286 and 287
- cannot be used though, since there is no length base or extra bits
- defined for them. Similarly, there are up to 30 distance codes.
- However, static trees define 32 codes (all 5 bits) to fill out the
- Huffman codes, but the last two had better not show up in the data.
- 7. Unzip can check dynamic Huffman blocks for complete code sets.
- The exception is that a single code would not be complete (see #4).
- 8. The five bits following the block type is really the number of
- literal codes sent minus 257.
- 9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits
- (1+6+6). Therefore, to output three times the length, you output
- three codes (1+1+1), whereas to output four times the same length,
- you only need two codes (1+3). Hmm.
- 10. In the tree reconstruction algorithm, Code = Code + Increment
- only if BitLength(i) is not zero. (Pretty obvious.)
- 11. Correction: 4 Bits: # of Bit Length codes - 4 (4 - 19)
- 12. Note: length code 284 can represent 227-258, but length code 285
- really is 258. The last length deserves its own, short code
- since it gets used a lot in very redundant files. The length
- 258 is special since 258 - 3 (the min match length) is 255.
- 13. The literal/length and distance code bit lengths are read as a
- single stream of lengths. It is possible (and advantageous) for
- a repeat code (16, 17, or 18) to go across the boundary between
- the two sets of lengths.
- */
-
-#ifdef RCSID
-static char rcsid[] = "#Id: inflate.c,v 0.14 1993/06/10 13:27:04 jloup Exp #";
-#endif
-
-#ifndef STATIC
-
-#if defined(STDC_HEADERS) || defined(HAVE_STDLIB_H)
-# include <sys/types.h>
-# include <stdlib.h>
-#endif
-
-
-#include "gzip.h"
-#define STATIC
-#endif /* !STATIC */
-
-#define slide window
-
-/* Huffman code lookup table entry--this entry is four bytes for machines
- that have 16-bit pointers (e.g. PC's in the small or medium model).
- Valid extra bits are 0..13. e == 15 is EOB (end of block), e == 16
- means that v is a literal, 16 < e < 32 means that v is a pointer to
- the next table, which codes e - 16 bits, and lastly e == 99 indicates
- an unused code. If a code with e == 99 is looked up, this implies an
- error in the data. */
-struct huft {
- uch e; /* number of extra bits or operation */
- uch b; /* number of bits in this code or subcode */
- union {
- ush n; /* literal, length base, or distance base */
- struct huft *t; /* pointer to next level of table */
- } v;
-};
-
-
-/* Function prototypes */
-STATIC int huft_build OF((unsigned *, unsigned, unsigned, const ush *,
- const ush *, struct huft **, int *));
-STATIC int huft_free OF((struct huft *));
-STATIC int inflate_codes OF((struct huft *, struct huft *, int, int));
-STATIC int inflate_stored OF((void));
-STATIC int inflate_fixed OF((void));
-STATIC int inflate_dynamic OF((void));
-STATIC int inflate_block OF((int *));
-STATIC int inflate OF((void));
-
-
-/* The inflate algorithm uses a sliding 32 K byte window on the uncompressed
- stream to find repeated byte strings. This is implemented here as a
- circular buffer. The index is updated simply by incrementing and then
- ANDing with 0x7fff (32K-1). */
-/* It is left to other modules to supply the 32 K area. It is assumed
- to be usable as if it were declared "uch slide[32768];" or as just
- "uch *slide;" and then malloc'ed in the latter case. The definition
- must be in unzip.h, included above. */
-/* unsigned wp; current position in slide */
-#define wp outcnt
-#define flush_output(w) (wp=(w),flush_window())
-
-/* Tables for deflate from PKZIP's appnote.txt. */
-const unsigned border[] = { /* Order of the bit length code lengths */
- 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-const ush cplens[] = { /* Copy lengths for literal codes 257..285 */
- 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
- 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
- /* note: see note #13 above about the 258 in this list. */
-const ush cplext[] = { /* Extra bits for literal codes 257..285 */
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
- 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 99, 99}; /* 99==invalid */
-const ush cpdist[] = { /* Copy offsets for distance codes 0..29 */
- 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
- 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
- 8193, 12289, 16385, 24577};
-const ush cpdext[] = { /* Extra bits for distance codes */
- 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6,
- 7, 7, 8, 8, 9, 9, 10, 10, 11, 11,
- 12, 12, 13, 13};
-
-
-
-/* Macros for inflate() bit peeking and grabbing.
- The usage is:
-
- NEEDBITS(j)
- x = b & mask_bits[j];
- DUMPBITS(j)
-
- where NEEDBITS makes sure that b has at least j bits in it, and
- DUMPBITS removes the bits from b. The macros use the variable k
- for the number of bits in b. Normally, b and k are register
- variables for speed, and are initialized at the beginning of a
- routine that uses these macros from a global bit buffer and count.
-
- If we assume that EOB will be the longest code, then we will never
- ask for bits with NEEDBITS that are beyond the end of the stream.
- So, NEEDBITS should not read any more bytes than are needed to
- meet the request. Then no bytes need to be "returned" to the buffer
- at the end of the last block.
-
- However, this assumption is not true for fixed blocks--the EOB code
- is 7 bits, but the other literal/length codes can be 8 or 9 bits.
- (The EOB code is shorter than other codes because fixed blocks are
- generally short. So, while a block always has an EOB, many other
- literal/length codes have a significantly lower probability of
- showing up at all.) However, by making the first table have a
- lookup of seven bits, the EOB code will be found in that first
- lookup, and so will not require that too many bits be pulled from
- the stream.
- */
-
-STATIC ulg bb; /* bit buffer */
-STATIC unsigned bk; /* bits in bit buffer */
-
-const ush mask_bits[] = {
- 0x0000,
- 0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff,
- 0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff
-};
-
-#define NEXTBYTE() (uch)get_byte()
-#define NEEDBITS(n) {while(k<(n)){b|=((ulg)NEXTBYTE())<<k;k+=8;}}
-#define DUMPBITS(n) {b>>=(n);k-=(n);}
-
-
-/*
- Huffman code decoding is performed using a multi-level table lookup.
- The fastest way to decode is to simply build a lookup table whose
- size is determined by the longest code. However, the time it takes
- to build this table can also be a factor if the data being decoded
- is not very long. The most common codes are necessarily the
- shortest codes, so those codes dominate the decoding time, and hence
- the speed. The idea is you can have a shorter table that decodes the
- shorter, more probable codes, and then point to subsidiary tables for
- the longer codes. The time it costs to decode the longer codes is
- then traded against the time it takes to make longer tables.
-
- This results of this trade are in the variables lbits and dbits
- below. lbits is the number of bits the first level table for literal/
- length codes can decode in one step, and dbits is the same thing for
- the distance codes. Subsequent tables are also less than or equal to
- those sizes. These values may be adjusted either when all of the
- codes are shorter than that, in which case the longest code length in
- bits is used, or when the shortest code is *longer* than the requested
- table size, in which case the length of the shortest code in bits is
- used.
-
- There are two different values for the two tables, since they code a
- different number of possibilities each. The literal/length table
- codes 286 possible values, or in a flat code, a little over eight
- bits. The distance table codes 30 possible values, or a little less
- than five bits, flat. The optimum values for speed end up being
- about one bit more than those, so lbits is 8+1 and dbits is 5+1.
- The optimum values may differ though from machine to machine, and
- possibly even between compilers. Your mileage may vary.
- */
-
-
-STATIC int lbits ; /* bits in base literal/length lookup table */
-STATIC int dbits ; /* bits in base distance lookup table */
-
-
-/* If BMAX needs to be larger than 16, then h and x[] should be ulg. */
-#define BMAX 16 /* maximum bit length of any code (16 for explode) */
-#define N_MAX 288 /* maximum number of codes in any set */
-
-
-STATIC unsigned hufts; /* track memory usage */
-
-
-STATIC int huft_build(
- unsigned *b, /* code lengths in bits (all assumed <= BMAX) */
- unsigned n, /* number of codes (assumed <= N_MAX) */
- unsigned s, /* number of simple-valued codes (0..s-1) */
- const ush *d, /* list of base values for non-simple codes */
- const ush *e, /* list of extra bits for non-simple codes */
- struct huft **t, /* result: starting table */
- int *m) /* maximum lookup bits, returns actual */
-/* Given a list of code lengths and a maximum table size, make a set of
- tables to decode that set of codes. Return zero on success, one if
- the given code set is incomplete (the tables are still built in this
- case), two if the input is invalid (all zero length codes or an
- oversubscribed set of lengths), and three if not enough memory. */
-{
- unsigned a; /* counter for codes of length k */
- unsigned c[BMAX+1]; /* bit length count table */
- unsigned f; /* i repeats in table every f entries */
- int g; /* maximum code length */
- int h; /* table level */
- register unsigned i; /* counter, current code */
- register unsigned j; /* counter */
- register int k; /* number of bits in current code */
- int l; /* bits per table (returned in m) */
- register unsigned *p; /* pointer into c[], b[], or v[] */
- register struct huft *q; /* points to current table */
- struct huft r; /* table entry for structure assignment */
- struct huft *u[BMAX]; /* table stack */
- unsigned v[N_MAX]; /* values in order of bit length */
- register int w; /* bits before this table == (l * h) */
- unsigned x[BMAX+1]; /* bit offsets, then code stack */
- unsigned *xp; /* pointer into x */
- int y; /* number of dummy codes added */
- unsigned z; /* number of entries in current table */
-
-DEBGH("huft1 ");
-
- /* Generate counts for each bit length */
- memzero(c, sizeof(c));
- p = b; i = n;
- do {
- Tracecv(*p, (stderr, (n-i >= ' ' && n-i <= '~' ? "%c %d\n" : "0x%x %d\n"),
- n-i, *p));
- c[*p]++; /* assume all entries <= BMAX */
- p++; /* Can't combine with above line (Solaris bug) */
- } while (--i);
- if (c[0] == n) /* null input--all zero length codes */
- {
- *t = 0;
- *m = 0;
- return 0;
- }
-
-DEBGH("huft2 ");
-
- /* Find minimum and maximum length, bound *m by those */
- l = *m;
- for (j = 1; j <= BMAX; j++)
- if (c[j])
- break;
- k = j; /* minimum code length */
- if ((unsigned)l < j)
- l = j;
- for (i = BMAX; i; i--)
- if (c[i])
- break;
- g = i; /* maximum code length */
- if ((unsigned)l > i)
- l = i;
- *m = l;
-
-DEBGH("huft3 ");
-
- /* Adjust last length count to fill out codes, if needed */
- for (y = 1 << j; j < i; j++, y <<= 1)
- if ((y -= c[j]) < 0)
- return 2; /* bad input: more codes than bits */
- if ((y -= c[i]) < 0)
- return 2;
- c[i] += y;
-
-DEBGH("huft4 ");
-
- /* Generate starting offsets into the value table for each length */
- x[1] = j = 0;
- p = c + 1; xp = x + 2;
- while (--i) { /* note that i == g from above */
- *xp++ = (j += *p++);
- }
-
-DEBGH("huft5 ");
-
- /* Make a table of values in order of bit lengths */
- p = b; i = 0;
- do {
- if ((j = *p++) != 0)
- v[x[j]++] = i;
- } while (++i < n);
-
-DEBGH("h6 ");
-
- /* Generate the Huffman codes and for each, make the table entries */
- x[0] = i = 0; /* first Huffman code is zero */
- p = v; /* grab values in bit order */
- h = -1; /* no tables yet--level -1 */
- w = -l; /* bits decoded == (l * h) */
- u[0] = 0; /* just to keep compilers happy */
- q = (struct huft *)0; /* ditto */
- z = 0; /* ditto */
-DEBGH("h6a ");
-
- /* go through the bit lengths (k already is bits in shortest code) */
- for (; k <= g; k++)
- {
-DEBGH("h6b ");
- a = c[k];
- while (a--)
- {
-DEBGH("h6b1 ");
- /* here i is the Huffman code of length k bits for value *p */
- /* make tables up to required level */
- while (k > w + l)
- {
-DEBG1("1 ");
- h++;
- w += l; /* previous table always l bits */
-
- /* compute minimum size table less than or equal to l bits */
- z = (z = g - w) > (unsigned)l ? l : z; /* upper limit on table size */
- if ((f = 1 << (j = k - w)) > a + 1) /* try a k-w bit table */
- { /* too few codes for k-w bit table */
-DEBG1("2 ");
- f -= a + 1; /* deduct codes from patterns left */
- xp = c + k;
- while (++j < z) /* try smaller tables up to z bits */
- {
- if ((f <<= 1) <= *++xp)
- break; /* enough codes to use up j bits */
- f -= *xp; /* else deduct codes from patterns */
- }
- }
-DEBG1("3 ");
- z = 1 << j; /* table entries for j-bit table */
-
- /* allocate and link in new table */
- if ((q = (struct huft *)malloc((z + 1)*sizeof(struct huft))) == 0)
- {
- if (h)
- huft_free(u[0]);
- return 3; /* not enough memory */
- }
-DEBG1("4 ");
- hufts += z + 1; /* track memory usage */
- *t = q + 1; /* link to list for huft_free() */
- *(t = &(q->v.t)) = 0;
- u[h] = ++q; /* table starts after link */
-
-DEBG1("5 ");
- /* connect to last table, if there is one */
- if (h)
- {
- x[h] = i; /* save pattern for backing up */
- r.b = (uch)l; /* bits to dump before this table */
- r.e = (uch)(16 + j); /* bits in this table */
- r.v.t = q; /* pointer to this table */
- j = i >> (w - l); /* (get around Turbo C bug) */
- u[h-1][j] = r; /* connect to last table */
- }
-DEBG1("6 ");
- }
-DEBGH("h6c ");
-
- /* set up table entry in r */
- r.b = (uch)(k - w);
- if (p >= v + n)
- r.e = 99; /* out of values--invalid code */
- else if (*p < s)
- {
- r.e = (uch)(*p < 256 ? 16 : 15); /* 256 is end-of-block code */
- r.v.n = (ush)(*p); /* simple code is just the value */
- p++; /* one compiler does not like *p++ */
- }
- else
- {
- r.e = (uch)e[*p - s]; /* non-simple--look up in lists */
- r.v.n = d[*p++ - s];
- }
-DEBGH("h6d ");
-
- /* fill code-like entries with r */
- f = 1 << (k - w);
- for (j = i >> w; j < z; j += f)
- q[j] = r;
-
- /* backwards increment the k-bit code i */
- for (j = 1 << (k - 1); i & j; j >>= 1)
- i ^= j;
- i ^= j;
-
- /* backup over finished tables */
- while ((i & ((1 << w) - 1)) != x[h])
- {
- h--; /* don't need to update q */
- w -= l;
- }
-DEBGH("h6e ");
- }
-DEBGH("h6f ");
- }
-
-DEBGH("huft7 ");
-
- /* Return true (1) if we were given an incomplete table */
- return y != 0 && g != 1;
-}
-
-
-
-STATIC int huft_free(
-struct huft *t) /* table to free */
-/* Free the malloc'ed tables built by huft_build(), which makes a linked
- list of the tables it made, with the links in a dummy first entry of
- each table. */
-{
- register struct huft *p, *q;
-
-
- /* Go through linked list, freeing from the malloced (t[-1]) address. */
- p = t;
- while (p != 0)
- {
- q = (--p)->v.t;
- free((char*)p);
- p = q;
- }
- return 0;
-}
-
-
-STATIC int inflate_codes(
- struct huft *tl,
- struct huft *td, /* literal/length and distance decoder tables */
- int bl,
- int bd) /* number of bits decoded by tl[] and td[] */
-/* inflate (decompress) the codes in a deflated (compressed) block.
- Return an error code or zero if it all goes ok. */
-{
- register unsigned e; /* table entry flag/number of extra bits */
- unsigned n, d; /* length and index for copy */
- unsigned w; /* current window position */
- struct huft *t; /* pointer to table entry */
- unsigned ml, md; /* masks for bl and bd bits */
- register ulg b; /* bit buffer */
- register unsigned k; /* number of bits in bit buffer */
-
-
- /* make local copies of globals */
- b = bb; /* initialize bit buffer */
- k = bk;
- w = wp; /* initialize window position */
-
- /* inflate the coded data */
- ml = mask_bits[bl]; /* precompute masks for speed */
- md = mask_bits[bd];
- for (;;) /* do until end of block */
- {
- NEEDBITS((unsigned)bl)
- if ((e = (t = tl + ((unsigned)b & ml))->e) > 16)
- do {
- if (e == 99)
- return 1;
- DUMPBITS(t->b)
- e -= 16;
- NEEDBITS(e)
- } while ((e = (t = t->v.t + ((unsigned)b & mask_bits[e]))->e) > 16);
- DUMPBITS(t->b)
- if (e == 16) /* then it's a literal */
- {
-/*
- DEBG("l");
- */
- slide[w++] = (uch)t->v.n;
- Tracevv((stderr, "%c", slide[w-1]));
- if (w == WSIZE)
- {
- flush_output(w);
- w = 0;
- }
- }
- else /* it's an EOB or a length */
- {
- /* exit if end of block */
- if (e == 15)
- break;
-
- /* get length of block to copy */
- NEEDBITS(e)
- n = t->v.n + ((unsigned)b & mask_bits[e]);
- DUMPBITS(e);
-
- /* decode distance of block to copy */
- NEEDBITS((unsigned)bd)
- if ((e = (t = td + ((unsigned)b & md))->e) > 16)
- do {
- if (e == 99)
- return 1;
- DUMPBITS(t->b)
- e -= 16;
- NEEDBITS(e)
- } while ((e = (t = t->v.t + ((unsigned)b & mask_bits[e]))->e) > 16);
- DUMPBITS(t->b)
- NEEDBITS(e)
- d = w - t->v.n - ((unsigned)b & mask_bits[e]);
- DUMPBITS(e)
- Tracevv((stderr,"\\[%d,%d]", w-d, n));
-/*
- DEBG("D");printint(w-d);printint(n);
- */
-
- /* do the copy */
- do {
- n -= (e = (e = WSIZE - ((d &= WSIZE-1) > w ? d : w)) > n ? n : e);
-#if 0
- DEBG("memcpy %d to %d size %d"); printint(d); printint(w);
- printint(e);
- DEBG("\n");
-#endif
-#if !defined(NOMEMCPY) && !defined(DEBUG)
- if (w - d >= e) /* (this test assumes unsigned comparison) */
- {
- memcpy(slide + w, slide + d, e);
- w += e;
- d += e;
- }
- else /* do it slow to avoid memcpy() overlap */
-#endif /* !NOMEMCPY */
- do {
- slide[w++] = slide[d++];
- Tracevv((stderr, "%c", slide[w-1]));
- } while (--e);
- if (w == WSIZE)
- {
- flush_output(w);
- w = 0;
- }
- } while (n);
- }
- }
-
-
- /* restore the globals from the locals */
- wp = w; /* restore global window pointer */
- bb = b; /* restore global bit buffer */
- bk = k;
-
- /* done */
- return 0;
-}
-
-
-
-STATIC int inflate_stored(void)
-/* "decompress" an inflated type 0 (stored) block. */
-{
- unsigned n; /* number of bytes in block */
- unsigned w; /* current window position */
- register ulg b; /* bit buffer */
- register unsigned k; /* number of bits in bit buffer */
-
-DEBG("<stor");
-
- /* make local copies of globals */
- b = bb; /* initialize bit buffer */
- k = bk;
- w = wp; /* initialize window position */
-
-
- /* go to byte boundary */
- n = k & 7;
- DUMPBITS(n);
-
-
- /* get the length and its complement */
- NEEDBITS(16)
- n = ((unsigned)b & 0xffff);
- DUMPBITS(16)
- NEEDBITS(16)
- if (n != (unsigned)((~b) & 0xffff))
- return 1; /* error in compressed data */
- DUMPBITS(16)
-
-
- /* read and output the compressed data */
- while (n--)
- {
- NEEDBITS(8)
- slide[w++] = (uch)b;
- if (w == WSIZE)
- {
- flush_output(w);
- w = 0;
- }
- DUMPBITS(8)
- }
-
-
- /* restore the globals from the locals */
- wp = w; /* restore global window pointer */
- bb = b; /* restore global bit buffer */
- bk = k;
-
- DEBG(">");
- return 0;
-}
-
-
-
-STATIC int inflate_fixed(void)
-/* decompress an inflated type 1 (fixed Huffman codes) block. We should
- either replace this with a custom decoder, or at least precompute the
- Huffman tables. */
-{
- int i; /* temporary variable */
- struct huft *tl; /* literal/length code table */
- struct huft *td; /* distance code table */
- int bl; /* lookup bits for tl */
- int bd; /* lookup bits for td */
- unsigned l[288]; /* length list for huft_build */
-
-DEBG("<fix");
-
- /* set up literal table */
- for (i = 0; i < 144; i++)
- l[i] = 8;
- for (; i < 256; i++)
- l[i] = 9;
- for (; i < 280; i++)
- l[i] = 7;
- for (; i < 288; i++) /* make a complete, but wrong code set */
- l[i] = 8;
- bl = 7;
- if ((i = huft_build(l, 288, 257, cplens, cplext, &tl, &bl)) != 0)
- return i;
-
-
- /* set up distance table */
- for (i = 0; i < 30; i++) /* make an incomplete code set */
- l[i] = 5;
- bd = 5;
- if ((i = huft_build(l, 30, 0, cpdist, cpdext, &td, &bd)) > 1)
- {
- huft_free(tl);
-
- DEBG(">");
- return i;
- }
-
-
- /* decompress until an end-of-block code */
- if (inflate_codes(tl, td, bl, bd))
- return 1;
-
-
- /* free the decoding tables, return */
- huft_free(tl);
- huft_free(td);
- return 0;
-}
-
-
-
-STATIC int inflate_dynamic(void)
-/* decompress an inflated type 2 (dynamic Huffman codes) block. */
-{
- int i; /* temporary variables */
- unsigned j;
- unsigned l; /* last length */
- unsigned m; /* mask for bit lengths table */
- unsigned n; /* number of lengths to get */
- struct huft *tl; /* literal/length code table */
- struct huft *td; /* distance code table */
- int bl; /* lookup bits for tl */
- int bd; /* lookup bits for td */
- unsigned nb; /* number of bit length codes */
- unsigned nl; /* number of literal/length codes */
- unsigned nd; /* number of distance codes */
-#ifdef PKZIP_BUG_WORKAROUND
- unsigned ll[288+32]; /* literal/length and distance code lengths */
-#else
- unsigned ll[286+30]; /* literal/length and distance code lengths */
-#endif
- register ulg b; /* bit buffer */
- register unsigned k; /* number of bits in bit buffer */
-
-
-#if 0
- for(i = 0; i < 288+32; i++)
- if (ll[i]) {
- display("non-zero ll index at ");
- printint(i);
- }
-#endif
-DEBG("<dyn");
-
- /* make local bit buffer */
- b = bb;
- k = bk;
-
-
- /* read in table lengths */
- NEEDBITS(5)
- nl = 257 + ((unsigned)b & 0x1f); /* number of literal/length codes */
- DUMPBITS(5)
- NEEDBITS(5)
- nd = 1 + ((unsigned)b & 0x1f); /* number of distance codes */
- DUMPBITS(5)
- NEEDBITS(4)
- nb = 4 + ((unsigned)b & 0xf); /* number of bit length codes */
- DUMPBITS(4)
-#ifdef PKZIP_BUG_WORKAROUND
- if (nl > 288 || nd > 32)
-#else
- if (nl > 286 || nd > 30)
-#endif
- return 1; /* bad lengths */
-DEBGINT(nl); DEBGINT(nd); DEBGINT(nb);
-DEBGDYN("dyn1 ");
-
- /* read in bit-length-code lengths */
- for (j = 0; j < nb; j++)
- {
- NEEDBITS(3)
- ll[border[j]] = (unsigned)b & 7;
- DUMPBITS(3)
- }
- for (; j < 19; j++)
- ll[border[j]] = 0;
-
-
- /* build decoding table for trees--single level, 7 bit lookup */
- bl = 7;
- if ((i = huft_build(ll, 19, 19, 0, 0, &tl, &bl)) != 0)
- {
- if (i == 1)
- huft_free(tl);
- return i; /* incomplete code set */
- }
-
-DEBGDYN("dyn3 freemem now "); DEBGINT(free_mem_ptr);
-
- /* read in literal and distance code lengths */
- n = nl + nd;
- m = mask_bits[bl];
- i = l = 0;
- while ((unsigned)i < n)
- {
- NEEDBITS((unsigned)bl)
- j = (td = tl + ((unsigned)b & m))->b;
- DUMPBITS(j)
- j = td->v.n;
-/*
- DEBGDYN("j is now"); DEBGINT(j);
- */
- if (j < 16) /* length of code in bits (0..15) */
- ll[i++] = l = j; /* save last length in l */
- else if (j == 16) /* repeat last length 3 to 6 times */
- {
- NEEDBITS(2)
- j = 3 + ((unsigned)b & 3);
- DUMPBITS(2)
-/*
- DEBGDYN("j second is now"); DEBGINT(j);
- */
- if ((unsigned)i + j > n)
- return 1;
- while (j--)
- ll[i++] = l;
- }
- else if (j == 17) /* 3 to 10 zero length codes */
- {
- NEEDBITS(3)
- j = 3 + ((unsigned)b & 7);
- DUMPBITS(3)
-/*
- DEBGDYN("j three is now"); DEBGINT(j);
- */
- if ((unsigned)i + j > n)
- return 1;
- while (j--)
- ll[i++] = 0;
- l = 0;
- }
- else /* j == 18: 11 to 138 zero length codes */
- {
- NEEDBITS(7)
- j = 11 + ((unsigned)b & 0x7f);
- DUMPBITS(7)
-/*
- DEBGDYN("j four is now"); DEBGINT(j);
- */
- if ((unsigned)i + j > n)
- return 1;
- while (j--)
- ll[i++] = 0;
- l = 0;
- }
- }
-
-DEBGDYN("dyn4 ");
-
- /* free decoding table for trees */
- huft_free(tl);
-
-DEBGDYN("dyn5 free mem is now");DEBGINT(free_mem_ptr);
-
- /* restore the global bit buffer */
- bb = b;
- bk = k;
-
-DEBGDYN("dyn5a ");
-
- /* build the decoding tables for literal/length and distance codes */
- bl = lbits;
- if ((i = huft_build(ll, nl, 257, cplens, cplext, &tl, &bl)) != 0)
- {
-DEBGDYN("dyn5b ");
- if (i == 1) {
- error(" incomplete literal tree\n");
- huft_free(tl);
- }
- return i; /* incomplete code set */
- }
-DEBGDYN("dyn5c ");
- bd = dbits;
- if ((i = huft_build(ll + nl, nd, 0, cpdist, cpdext, &td, &bd)) != 0)
- {
-DEBGDYN("dyn5d ");
- if (i == 1) {
- error(" incomplete distance tree\n");
-#ifdef PKZIP_BUG_WORKAROUND
- i = 0;
- }
-#else
- huft_free(td);
- }
- huft_free(tl);
- return i; /* incomplete code set */
-#endif
- }
-
-DEBGDYN("dyn6 free_mem_ptr ");DEBGINT(free_mem_ptr);
-
- /* decompress until an end-of-block code */
-DEBG("inflate_codes inptr is "); DEBGINT(inptr);
- if (inflate_codes(tl, td, bl, bd))
- return 1;
-
-DEBG("AFTER inflate_codes inptr is "); DEBGINT(inptr);
-DEBGDYN("dyn7 ");
-
- /* free the decoding tables, return */
- huft_free(tl);
- huft_free(td);
-
- DEBG(">");
- return 0;
-}
-
-
-
-STATIC int inflate_block(
-int *e) /* last block flag */
-/* decompress an inflated block */
-{
- unsigned t; /* block type */
- register ulg b; /* bit buffer */
- register unsigned k; /* number of bits in bit buffer */
-
- DEBG("<blk(");
- DEBGINT(inptr);
- DEBG(")");
-
- /* make local bit buffer */
- b = bb;
- k = bk;
-
-
- /* read in last block bit */
- NEEDBITS(1)
- *e = (int)b & 1;
- DUMPBITS(1)
-
-
- /* read in block type */
- NEEDBITS(2)
- t = (unsigned)b & 3;
- DUMPBITS(2)
-
-
- /* restore the global bit buffer */
- bb = b;
- bk = k;
-
- /* inflate that block type */
- if (t == 2)
- return inflate_dynamic();
- if (t == 0)
- return inflate_stored();
- if (t == 1)
- return inflate_fixed();
-
- DEBG(">");
-
- /* bad block type */
- return 2;
-}
-
-
-
-STATIC int inflate(void)
-/* decompress an inflated entry */
-{
- int e; /* last block flag */
- int r; /* result code */
- unsigned h; /* maximum struct huft's malloc'ed */
- void *ptr;
-
- /* initialize window, bit buffer */
- wp = 0;
- bk = 0;
- bb = 0;
-
-
- /* decompress until the last block */
- h = 0;
- do {
- hufts = 0;
- gzip_mark(&ptr);
- if ((r = inflate_block(&e)) != 0) {
- gzip_release(&ptr);
- return r;
- }
- gzip_release(&ptr);
- if (hufts > h)
- h = hufts;
- } while (!e);
-
- /* Undo too much lookahead. The next read will be byte aligned so we
- * can discard unused bits in the last meaningful byte.
- */
- while (bk >= 8) {
- bk -= 8;
- inptr--;
- }
-
- /* flush out slide */
- flush_output(wp);
-
-
- /* return success */
- DBG("<%u> ", h);
- return 0;
-}
-
-/**********************************************************************
- *
- * The following are support routines for inflate.c
- *
- **********************************************************************/
-
-static ulg crc_32_tab[256];
-/* note that this fails for NVRAM! */
-/* do assign below in makecrc */
-static ulg crc ; /*= (ulg)0xffffffffL; shift register contents */
-#define CRC_VALUE (crc ^ 0xffffffffL)
-
-/*
- * Code to compute the CRC-32 table. Borrowed from
- * gzip-1.0.3/makecrc.c.
- */
-
-static void
-makecrc(void)
-{
-/* Not copyrighted 1990 Mark Adler */
-
- unsigned long c; /* crc shift register */
- unsigned long e; /* polynomial exclusive-or pattern */
- int i; /* counter for all possible eight bit values */
- int k; /* byte being shifted into crc apparatus */
-
- /* terms of polynomial defining this crc (except x^32): */
- const int p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
-
- /* move init of the lbits and dbits here, I know this is hokey -- rgm */
- lbits = 9; /* bits in base literal/length lookup table */
- dbits = 6; /* bits in base distance lookup table */
- crc = (ulg)0xffffffffL; /* shift register contents */
- /* Make exclusive-or pattern from polynomial */
- e = 0;
- for (i = 0; i < sizeof(p)/sizeof(int); i++)
- e |= 1L << (31 - p[i]);
-
- crc_32_tab[0] = 0;
-
- for (i = 1; i < 256; i++)
- {
- c = 0;
- for (k = i | 256; k != 1; k >>= 1)
- {
- c = c & 1 ? (c >> 1) ^ e : c >> 1;
- if (k & 1)
- c ^= e;
- }
- crc_32_tab[i] = c;
- }
-}
-
-/* gzip flag byte */
-#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
-#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
-#define COMMENT 0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
-#define RESERVED 0xC0 /* bit 6,7: reserved */
-
-/*
- * Do the uncompression!
- */
-static int gunzip(void)
-{
- uch flags;
- unsigned char magic[2]; /* magic header */
- char method;
- ulg orig_crc = 0; /* original crc */
- ulg orig_len = 0; /* original uncompressed length */
- int res;
-
- magic[0] = (unsigned char)get_byte();
- magic[1] = (unsigned char)get_byte();
- method = (unsigned char)get_byte();
-
- if (magic[0] != 037 ||
- ((magic[1] != 0213) && (magic[1] != 0236))) {
- error("bad gzip magic numbers");
- return -1;
- }
-
- /* We only support method #8, DEFLATED */
- if (method != 8) {
- error("internal error, invalid method");
- return -1;
- }
-
- flags = (uch)get_byte();
- if ((flags & ENCRYPTED) != 0) {
- error("Input is encrypted\n");
- return -1;
- }
- if ((flags & CONTINUATION) != 0) {
- error("Multi part input\n");
- return -1;
- }
- if ((flags & RESERVED) != 0) {
- error("Input has invalid flags\n");
- return -1;
- }
- (ulg)get_byte(); /* Get timestamp */
- ((ulg)get_byte()) << 8;
- ((ulg)get_byte()) << 16;
- ((ulg)get_byte()) << 24;
-
- (void)get_byte(); /* Ignore extra flags for the moment */
- (void)get_byte(); /* Ignore OS type for the moment */
-
- if ((flags & EXTRA_FIELD) != 0) {
- unsigned len = (unsigned)get_byte();
- len |= ((unsigned)get_byte())<<8;
- while (len--) (void)get_byte();
- }
-
- /* Get original file name if it was truncated */
- if ((flags & ORIG_NAME) != 0) {
- /* Discard the old name */
- while (get_byte() != 0) /* null */ ;
- }
-
- /* Discard file comment if any */
- if ((flags & COMMENT) != 0) {
- while (get_byte() != 0) /* null */ ;
- }
-
- /* Decompress */
- if ((res = inflate())) {
- switch (res) {
- case 0:
- break;
- case 1:
- error("invalid compressed format (err=1)");
- break;
- case 2:
- error("invalid compressed format (err=2)");
- break;
- case 3:
- error("out of memory");
- break;
- default:
- error("invalid compressed format (other)");
- }
- return -1;
- }
-
- /* Get the crc and original length */
- /* crc32 (see algorithm.doc)
- * uncompressed input size modulo 2^32
- */
- orig_crc = (ulg) get_byte();
- orig_crc |= (ulg) get_byte() << 8;
- orig_crc |= (ulg) get_byte() << 16;
- orig_crc |= (ulg) get_byte() << 24;
-
- orig_len = (ulg) get_byte();
- orig_len |= (ulg) get_byte() << 8;
- orig_len |= (ulg) get_byte() << 16;
- orig_len |= (ulg) get_byte() << 24;
-
- /* Validate decompression */
- if (orig_crc != CRC_VALUE) {
- error("crc error");
- return -1;
- }
- if (orig_len != bytes_out) {
- error("length error");
- return -1;
- }
- return 0;
-}
-
-
-
-void malloc_init(unsigned long start, unsigned long end)
-{
- free_mem_ptr = start;
- free_mem_end_ptr = end;
-}
-
-void *malloc(size_t size)
-{
- void *p;
-
- if (size < 0)
- error("Error! malloc: Size < 0");
- if (free_mem_ptr <= 0)
- error("Error! malloc: Free_mem_ptr <= 0");
-
- free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
-
- p = (void *) free_mem_ptr;
- free_mem_ptr += size;
-
- if (free_mem_ptr >= free_mem_end_ptr)
- error("Error! malloc: Free_mem_ptr >= free_mem_end_ptr");
-
- MALLOCDBG("malloc 0x%08x\n", (unsigned int)p);
-
- return p;
-}
-
-static void free(void *where)
-{
- /* Don't care */
-}
-
-static void gzip_mark(void **ptr)
-{
- *ptr = (void *) free_mem_ptr;
- DBG("gzip_mark 0x%08x\n", (unsigned int)free_mem_ptr);
-}
-
-static void gzip_release(void **ptr)
-{
- free_mem_ptr = (long) *ptr;
- DBG("gzip_release 0x%08x\n", (unsigned int)free_mem_ptr);
-}
-
-void *memset(void *s, int c, size_t n)
-{
- int i;
- char *ss = (char *) s;
-
- for (i = 0; i < n; i++)
- ss[i] = c;
-
- return s;
-}
-
-void *memcpy(void *__dest, __const void *__src, size_t __n)
-{
- int i;
- char *d = (char *) __dest, *s = (char *) __src;
-
- for (i = 0; i < __n; i++)
- d[i] = s[i];
-
- return __dest;
-}
-
-
-/* ===========================================================================
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
- * (Used for the decompressed data only.)
- */
-static void flush_window()
-{
- ulg c = crc; /* temporary variable */
- unsigned n;
- uch *in, *out, ch;
-
- in = window;
- out = &output_data[output_ptr];
- DBG("flush 0x%08x count 0x%08x\n", (unsigned long) out, outcnt);
-
- for (n = 0; n < outcnt; n++) {
- ch = *out++ = *in++;
- c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8);
- }
- crc = c;
- bytes_out += (ulg) outcnt;
- output_ptr += (ulg) outcnt;
- outcnt = 0;
-}
-
-void setup_output_buffer()
-{
- output_data = (char *) KERNEL_START;
- DBG("output data is 0x%08x\n", (unsigned long) output_data);
-}
-
+#include <rom/fill_inbuf.h>
+#include <string.h>
+#include <stdlib.h>
#if USE_ELF_BOOT
#include <boot/elf.h>
-#include <boot/uniform_boot.h>
-
-static int elfboot(unsigned long totalram)
-{
- static unsigned char header[ELF_HEAD_SIZE];
- unsigned long offset;
- Elf_ehdr *ehdr;
- Elf_phdr *phdr;
- void *ptr, *entry;
- int i;
-
- printk("\n");
- printk("Welcome to elfboot, the open sourced starter.\n");
- printk("Febuary 2001, Eric Biederman.\n");
- printk("Version 0.99\n");
- printk("\n");
- ptr = get_ube_pointer(totalram);
-
- intel_post(0xf8);
- /* Read in the initial 512 bytes */
- for(offset = 0; offset < 512; offset++) {
- header[offset] = get_byte();
- }
- ehdr = (Elf_ehdr *)(&header[0]);
- entry = (void *)(ehdr->e_entry);
-
- /* Sanity check the elf header */
- if ((memcmp(ehdr->e_ident, ELFMAG, 4) != 0) ||
- (ehdr->e_type != ET_EXEC) ||
- (!elf_check_arch(ehdr)) ||
- (ehdr->e_ident[EI_VERSION] != EV_CURRENT) ||
- (ehdr->e_version != EV_CURRENT) ||
- (ehdr->e_phoff > ELF_HEAD_SIZE) ||
- (ehdr->e_phentsize != sizeof(Elf_phdr)) ||
- ((ehdr->e_phoff + (ehdr->e_phentsize * ehdr->e_phnum)) >
- ELF_HEAD_SIZE)) {
- goto out;
- }
-
- phdr = (Elf_phdr *)&header[ehdr->e_phoff];
- offset = 0;
- while(1) {
- Elf_phdr *cur_phdr = 0;
- int i,len;
- unsigned long start_offset;
- unsigned char *dest, *middle, *end;
- /* Find the program header that descibes the current piece
- * of the file.
- */
- for(i = 0; i < ehdr->e_phnum; i++) {
- if (phdr[i].p_type != PT_LOAD) {
- continue;
- }
- if (phdr[i].p_filesz > phdr[i].p_memsz) {
- continue;
- }
- if (phdr[i].p_offset >= offset) {
- if (!cur_phdr ||
- (cur_phdr->p_offset > phdr[i].p_offset)) {
- cur_phdr = &phdr[i];
- }
- }
- }
- /* If we are out of sections we are done */
- if (!cur_phdr) {
- break;
- }
- printk("Loading Section: addr: 0x%08x memsz: 0x%08x filesz: 0x%08x\n",
- cur_phdr->p_paddr, cur_phdr->p_memsz, cur_phdr->p_filesz);
-
- /* Compute the boundaries of the section */
- dest = (unsigned char *)(cur_phdr->p_paddr);
- end = dest + cur_phdr->p_memsz;
- len = cur_phdr->p_filesz;
- if (len > cur_phdr->p_memsz) {
- len = cur_phdr->p_memsz;
- }
- middle = dest + len;
- start_offset = cur_phdr->p_offset;
-
- /* Skip intial buffer unused bytes */
- if (offset < ELF_HEAD_SIZE) {
- if (start_offset < ELF_HEAD_SIZE) {
- offset = start_offset;
- } else {
- offset = ELF_HEAD_SIZE;
- }
- }
-
- /* Skip the unused bytes */
- while(offset < start_offset) {
- offset++;
- get_byte();
- }
-
- /* Copy data from the initial buffer */
- if (offset < ELF_HEAD_SIZE) {
- size_t len;
- if ((cur_phdr->p_filesz + start_offset) > ELF_HEAD_SIZE) {
- len = ELF_HEAD_SIZE - start_offset;
- }
- else {
- len = cur_phdr->p_filesz;
- }
- memcpy(dest, &header[start_offset], len);
- dest += len;
- }
-
- /* Read the section into memory */
- while(dest < middle) {
- *(dest++) = get_byte();
- }
- offset += cur_phdr->p_filesz;
- /* Zero the extra bytes */
- while(dest < end) {
- *(dest++) = 0;
- }
- }
-
- DBG("Jumping to boot code\n");
- intel_post(0xfe);
-
- /* Jump to kernel */
- jmp_to_elf_entry(entry, ptr);
-
- out:
- printk("Bad ELF Image\n");
- for(i = 0; i < sizeof(*ehdr); i++) {
- if ((i & 0xf) == 0) {
- printk("\n");
- }
- printk("%02x ", header[i]);
- }
- printk("\n");
-
- return 0;
-}
#endif
+#include "do_inflate.h"
+
int linuxbiosmain(unsigned long base, unsigned long totalram)
{
unsigned char *empty_zero_page;
- extern int firstfill;
unsigned char *cmd_line;
unsigned long initrd_start, initrd_size;
- /* common globals -- don't rely on init! */
- insize = 0;
- inptr = 0;
- firstfill = 1;
- outcnt = 0;
- bytes_out = 0;
- output_ptr = 0;
-
#if USE_ELF_BOOT
return elfboot(totalram);
#else
+
printk("\n");
printk("Welcome to start32, the open sourced starter.\n");
printk("This space will eventually hold more diagnostic information.\n");
@@ -1615,20 +69,19 @@
&zkernel_mask);
#endif
- window = malloc(WSIZE);
- setup_output_buffer();
- DBG("Making CRC\n");
- makecrc();
- intel_post(0xf1);
+ post_code(0xf1);
+
+ DBG("Gunzip setup\n");
+ gunzip_setup();
DBG("Gunzipping boot code\n");
if (gunzip() != 0) {
printk("gunzip failed\n");
- intel_post(0xff);
+ post_code(0xff);
return 0;
}
- intel_post(0xf8);
+ post_code(0xf8);
/* parameter passing to linux. You have to get the pointer to the
* empty_zero_page, then fill it in.
@@ -1639,13 +92,13 @@
/* yes I know we need prototypes -- we'll do it soon */
empty_zero_page = get_empty_zero_page();
init_params(empty_zero_page);
- intel_post(0xf9);
+ post_code(0xf9);
/* the ram address should be the last mbyte, AFAIK. Subtract one for the
* low 1 MB. So subtract 2K total
*/
set_memory_size(empty_zero_page, 0x3c00, totalram - 2048);
- intel_post(0xfa);
+ post_code(0xfa);
PRINTK(KERN_NOTICE "command line - [%s]\n", cmd_line);
@@ -1656,9 +109,11 @@
DBG("Jumping to boot code\n");
- intel_post(0xfe);
+ post_code(0xfe);
/* there seems to be a bug in gas? it's generating wrong bit-patterns ...
+ typedef void (*kernel) ();
+ kernel v;
v = (kernel)KERNEL_START;
v();
*/
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/linuxpci.c freebios/src/lib/linuxpci.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/linuxpci.c Wed Dec 6 04:02:36 2000
+++ freebios/src/lib/linuxpci.c Thu Mar 15 12:40:58 2001
@@ -18,8 +18,9 @@
#include <cpu/p5/io.h>
#include <printk.h>
#include <types.h>
+#include <string.h>
+#include <subr.h>
-extern void intel_post(unsigned char value);
#undef DEBUGSCAN
#ifdef DEBUGSCAN
@@ -204,7 +205,7 @@
bus_last = &bus->devices;
max = bus->secondary;
- intel_post(0x24);
+ post_code(0x24);
/* probe all devices on this bus with some optimization for non-existance and
single funcion devices */
@@ -322,7 +323,7 @@
}
}
- intel_post(0x25);
+ post_code(0x25);
/*
* After performing arch-dependent fixup of the bus, look behind
* all PCI-to-PCI bridges on this bus.
@@ -454,7 +455,7 @@
* Return how far we've got finding sub-buses.
*/
DBG("PCI: pci_scan_bus returning with max=%02x\n", max);
- intel_post(0x55);
+ post_code(0x55);
return max;
}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/malloc.c freebios/src/lib/malloc.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/malloc.c Wed Dec 31 17:00:00 1969
+++ freebios/src/lib/malloc.c Wed Mar 21 13:26:48 2001
@@ -0,0 +1,52 @@
+#include <stdlib.h>
+#include <printk.h>
+#include <subr.h>
+
+#if 1
+#define MALLOCDBG(x)
+#else
+#define MALLOCDBG(x) printk x
+#endif
+extern unsigned char _heap, _eheap;
+static size_t free_mem_ptr = (size_t)&_heap; /* Start of heap */
+static size_t free_mem_end_ptr = (size_t)&_eheap; /* End of heap */
+
+
+void malloc_mark(malloc_mark_t *place)
+{
+ *place = free_mem_ptr;
+ DBG("malloc_mark 0x%08lx\n", (unsigned long)free_mem_ptr);
+}
+
+void malloc_release(malloc_mark_t *ptr)
+{
+ free_mem_ptr = *ptr;
+ DBG("malloc_release 0x%08lx\n", (unsigned long)free_mem_ptr);
+}
+
+void *malloc(size_t size)
+{
+ void *p;
+
+ if (size < 0)
+ error("Error! malloc: Size < 0");
+ if (free_mem_ptr <= 0)
+ error("Error! malloc: Free_mem_ptr <= 0");
+
+ free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
+
+ p = (void *) free_mem_ptr;
+ free_mem_ptr += size;
+
+ if (free_mem_ptr >= free_mem_end_ptr)
+ error("Error! malloc: Free_mem_ptr >= free_mem_end_ptr");
+
+ MALLOCDBG(("malloc 0x%08lx\n", (unsigned long)p));
+
+ return p;
+}
+
+void free(void *where)
+{
+ /* Don't care */
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/newpci.c freebios/src/lib/newpci.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/newpci.c Thu Feb 15 08:23:06 2001
+++ freebios/src/lib/newpci.c Fri Mar 16 16:33:09 2001
@@ -16,7 +16,7 @@
#include <pci.h>
#undef __KERNEL__
-#include <cpu/p5/io.h>
+#include <arch/io.h>
#include <printk.h>
#define ONEMEG (1 << 20)
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/params.c freebios/src/lib/params.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/params.c Mon Mar 12 21:22:19 2001
+++ freebios/src/lib/params.c Wed Dec 31 17:00:00 1969
@@ -1,164 +0,0 @@
-/*
-This software and ancillary information (herein called SOFTWARE )
-called LinuxBIOS is made available under the terms described
-here. The SOFTWARE has been approved for release with associated
-LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has
-been authored by an employee or employees of the University of
-California, operator of the Los Alamos National Laboratory under
-Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The
-U.S. Government has rights to use, reproduce, and distribute this
-SOFTWARE. The public may copy, distribute, prepare derivative works
-and publicly display this SOFTWARE without charge, provided that this
-Notice and any statement of authorship are reproduced on all copies.
-Neither the Government nor the University makes any warranty, express
-or implied, or assumes any liability or responsibility for the use of
-this SOFTWARE. If SOFTWARE is modified to produce derivative works,
-such modified SOFTWARE should be clearly marked, so as not to confuse
-it with the version available from LANL.
- */
-/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL
- * [EMAIL PROTECTED]
- */
-
-#ifndef lint
-static char rcsid[] = "$Id: params.c,v 1.5 2001/03/13 04:22:19 rminnich Exp $";
-#endif
-
-struct screen_info {
- unsigned char orig_x; /* 0x00 */
- unsigned char orig_y; /* 0x01 */
- unsigned short dontuse1; /* 0x02 -- EXT_MEM_K sits here */
- unsigned short orig_video_page; /* 0x04 */
- unsigned char orig_video_mode; /* 0x06 */
- unsigned char orig_video_cols; /* 0x07 */
- unsigned short unused2; /* 0x08 */
- unsigned short orig_video_ega_bx; /* 0x0a */
- unsigned short unused3; /* 0x0c */
- unsigned char orig_video_lines; /* 0x0e */
- unsigned char orig_video_isVGA; /* 0x0f */
- unsigned short orig_video_points; /* 0x10 */
-
- /* VESA graphic mode -- linear frame buffer */
- unsigned short lfb_width; /* 0x12 */
- unsigned short lfb_height; /* 0x14 */
- unsigned short lfb_depth; /* 0x16 */
- unsigned long lfb_base; /* 0x18 */
- unsigned long lfb_size; /* 0x1c */
- unsigned short dontuse2, dontuse3; /* 0x20 -- CL_MAGIC and CL_OFFSET here */
- unsigned short lfb_linelength; /* 0x24 */
- unsigned char red_size; /* 0x26 */
- unsigned char red_pos; /* 0x27 */
- unsigned char green_size; /* 0x28 */
- unsigned char green_pos; /* 0x29 */
- unsigned char blue_size; /* 0x2a */
- unsigned char blue_pos; /* 0x2b */
- unsigned char rsvd_size; /* 0x2c */
- unsigned char rsvd_pos; /* 0x2d */
- unsigned short vesapm_seg; /* 0x2e */
- unsigned short vesapm_off; /* 0x30 */
- unsigned short pages; /* 0x32 */
- /* 0x34 -- 0x3f reserved for future expansion */
-};
-
-#define E820MAP 0x2d0 /* our map */
-#define E820MAX 32 /* number of entries in E820MAP */
-#define E820NR 0x1e8 /* # entries in E820MAP */
-
-/* sigh, this is not a struct or include file thing. */
-#ifdef i386
-/* from linux 2.2.13 */
-/*
- * This is set up by the setup-routine at boot-time
- */
-#define PARAM ((unsigned char *)empty_zero_page)
-#define SCREEN_INFO (*(struct screen_info *) (PARAM+0))
-#define EXT_MEM_K (*(unsigned short *) (PARAM+2))
-#define ALT_MEM_K (*(unsigned long *) (PARAM+0x1e0))
-#define E820_MAP_NR (*(char*) (PARAM+E820NR))
-#define E820_MAP ((unsigned long *) (PARAM+E820MAP))
-#define APM_BIOS_INFO (*(struct apm_bios_info *) (PARAM+0x40))
-#define DRIVE_INFO (*(struct drive_info_struct *) (PARAM+0x80))
-#define SYS_DESC_TABLE (*(struct sys_desc_table_struct*)(PARAM+0xa0))
-#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2))
-#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8))
-#define ORIG_ROOT_DEV (*(unsigned short *) (PARAM+0x1FC))
-#define AUX_DEVICE_INFO (*(unsigned char *) (PARAM+0x1FF))
-#define LOADER_TYPE (*(unsigned char *) (PARAM+0x210))
-#define KERNEL_START (*(unsigned long *) (PARAM+0x214))
-#define INITRD_START (*(unsigned long *) (PARAM+0x218))
-#define INITRD_SIZE (*(unsigned long *) (PARAM+0x21c))
-#define COMMAND_LINE ((char *) (PARAM+2048))
-#define COMMAND_LINE_SIZE 256
-
-#endif
-/* this is support for passing parameters to the linux kernel.
- * you can pass memory size, command lines, and so on.
- */
-
-void
-init_params(unsigned char *empty_zero_page)
-{
- memset(PARAM, 0, 4096 /*XXXXXXXXXXXXXXXXX */ );
-}
-
-void
-set_memory_size(unsigned char *empty_zero_page, unsigned long ext_memory_size,
- unsigned long alt_memory_size)
-{
- /* for now, we do not have an 820 map (who cares, 8x0 chipsets are dead! */
- E820_MAP_NR = 0;
- EXT_MEM_K = ext_memory_size;
- ALT_MEM_K = alt_memory_size;
-}
-
-void
-set_root_rdonly(unsigned char *empty_zero_page)
-{
- MOUNT_ROOT_RDONLY = 1;
-}
-
-/* see the lilo doc */
-void
-set_command_line(unsigned char *empty_zero_page, unsigned char *cmdline)
-{
- int i;
- /* no strncpy ...
- strncpy(COMMAND_LINE, cmdline, COMMAND_LINE_SIZE);
- */
- for (i = 0; (i < COMMAND_LINE_SIZE) && (cmdline[i]); i++)
- COMMAND_LINE[i] = cmdline[i];
- *(unsigned short *) 0x90020 = 0xa33f;
- *(unsigned short *) 0x90022 = 2048;
-}
-
-unsigned char *
-get_empty_zero_page()
-{
- /* gosh, I thought we had to do get at empty_zero_page, and we don't.
- * silly me. We just have to get to 0x90000
- */
- /* we'll leave this hook in for now. We may need it someday */
-// unsigned long l = *(unsigned long *) 0xffffc;
-
- return (unsigned char *) 0x90000;
-}
-
-/* I am pretty sure we only need to set rows and cols for now.
- * All the rest is BIOS stuff. If it gets worse we'll have to make this a
- * screen_info * as the param
- */
-void
-set_display(unsigned char *empty_zero_page, int rows, int cols)
-{
- struct screen_info *sc = &SCREEN_INFO;
- sc->orig_video_cols = cols;
- sc->orig_video_lines = rows;
-}
-
-void
-set_initrd(unsigned char *empty_zero_page, unsigned long start, unsigned long size)
-{
- INITRD_START = start;
- INITRD_SIZE = size;
- LOADER_TYPE = 1;
-}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/serial_subr.c freebios/src/lib/serial_subr.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/serial_subr.c Sun Dec 3 18:47:52 2000
+++ freebios/src/lib/serial_subr.c Thu Mar 15 15:15:21 2001
@@ -2,8 +2,8 @@
static char rcsid[] = "$Id: serial_subr.c,v 1.3 2000/12/04 01:47:52 ollie Exp $";
#endif
-#include <cpu/p5/io.h>
-#include "serial_subr.h"
+#include <arch/io.h>
+#include <serial_subr.h>
/* Base Address */
#define TTYS0 0x3f8
@@ -26,52 +26,33 @@
#define TTYS0_MSR (TTYS0+0x06)
#define TTYS0_SCR (TTYS0+0x07)
-void ttys0_tx_char(char data) {
+#ifndef TTYS0_BAUD
+#define TTYS0_BAUD 115200
+#endif
+
+#if ((115200%TTYS0_BAUD) != 0)
+#error Bad ttys0 baud rate
+#endif
+
+#define TTYS0_DIV (115200/TTYS0_BAUD)
+
+void ttys0_init(void)
+{
+ /* disable interrupts */
+ outb(0x0, TTYS0_IER);
+ /* disable fifo's */
+ outb(0x0, TTYS0_FCR);
+ outb(0x83, TTYS0_LCR);
+ /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
+ outb(TTYS0_DIV, TTYS0_DLL);
+ outb(0, TTYS0_DLM);
+ outb(0x03, TTYS0_LCR);
+}
+
+void ttys0_tx_byte(unsigned char data)
+{
while (!(inb(TTYS0_LSR) & 0x20))
;
outb(data, TTYS0_TBR);
}
-void ttys0_tx_string(char *data) {
- while (*data) {
- if (*data=='\n') ttys0_tx_char('\r');
- ttys0_tx_char(*data++);
- }
-}
-
-void ttys0_tx_hex_digit(char data) {
- data &= 0x0f;
-
- if (data>9) {
- data += ('a'-10);
- } else {
- data += '0';
- }
-
- ttys0_tx_char(data);
-}
-
-void ttys0_tx_hex(unsigned int data, int digits) {
- int ii;
-
- /* ttys0_tx_string("0x"); */
- for (ii = 0; ii < digits; ii++) {
- ttys0_tx_hex_digit((char)(data >> ((digits - ii - 1)*4)));
- }
-}
-
-void ttys0_tx_int(int data) {
- int ii, i2;
- int digit[30];
-
- ii = 0;
-
- do {
- digit[ii] = data % 10;
- data = data/10;
- } while ((ii++ < 30) && data);
-
- for (i2 = 0; i2 < ii; i2++) {
- ttys0_tx_hex_digit((char)digit[ii-i2-1]);
- }
-}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/subr.c freebios/src/lib/subr.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/lib/subr.c Thu Feb 8 09:17:38 2001
+++ freebios/src/lib/subr.c Wed Mar 21 11:14:57 2001
@@ -8,28 +8,37 @@
static char rcsid[] = "$Id: subr.c,v 1.13 2001/02/08 16:17:38 rminnich Exp $";
#endif
-#include <cpu/p5/io.h>
-#include <cpu/p5/macros.h>
-#include <cpu/p6/msr.h>
+#include <arch/io.h>
#include <printk.h>
#include <pci.h>
#include <subr.h>
+#include <string.h>
#ifdef SERIAL_CONSOLE
#include <serial_subr.h>
#endif
+#ifdef VIDEO_BIOS_WORKS
+
+# error the video display code has not been tested
+
// kludgy but this is only used here ...
static char *vidmem; /* The video buffer, should be replaced by symbol in ldscript.ld */
-static int line_number;
+static int video_line, video_col;
#define LINES 25 /* Number of lines and */
#define COLS 80 /* columns on display */
#define VIDBUFFER 0x20000;
-#ifdef VIDEO_SCROLLING
-static void scroll()
+static void video_init(void)
+{
+ video_line = 0;
+ video_col = 0;
+ vidmem = (char *) VIDBUFFER;
+ memset(vidmem, 0, 64*1024);
+}
+static void video_scroll(void)
{
int i;
@@ -37,70 +46,64 @@
for (i = (LINES - 1) * COLS * 2; i < LINES * COLS * 2; i += 2)
vidmem[i] = ' ';
}
-#endif
+
+static void video_tx_byte(unsigned char byte)
+{
+ if (byte == '\n') {
+ video_line++;
+ }
+ else if (byte == '\r') {
+ video_col = 0;
+ }
+ else {
+ videmem[((video_col + (video_line *COLS)) * 2)] = byte;
+ videmem[((video_col + (video_line *COLS)) * 2) +1] = 0x07;
+ video_col++;
+ }
+ if (video_col >= COLS) {
+ video_line++;
+ video_col = 0;
+ }
+ if (video_line >= LINES) {
+ video_scroll();
+ video_line--;
+ }
+}
+#endif /* VIDEO_BIOS_WORKS */
// initialize the display
void displayinit(void)
{
- line_number = 0;
- vidmem = (char *) VIDBUFFER;
- memset(vidmem, 0, 64 * 1024);
+#ifdef VIDEO_BIOS_WORKS
+ video_init();
+#endif
#ifdef SERIAL_CONSOLE
+ ttys0_init();
#endif
}
-void display(char msg[])
+void display_tx_byte(unsigned char byte)
{
- int i = 0;
-
+#ifdef VIDEO_BIOS_WORKS
+ video_tx_byte(byte);
+#endif
#ifdef SERIAL_CONSOLE
- ttys0_tx_string(msg);
+ ttys0_tx_byte(byte);
+#endif
+#ifdef SROM_CONSOLE
+ srom_tx_byte(byte);
#endif
-
-#ifdef VIDEO_BIOS_WORKS
- while (msg[i] != 0) {
- vidmem[(line_number + 1) * COLS * 2 + i * 2] = msg[i];
- vidmem[(line_number + 1) * COLS * 2 + i * 2 + 1] = 0x07;
- i++;
- }
- (line_number >= (LINES - 1)) ? scroll() : line_number++;
-#else /* VIDEO_BIOS_WORKS */
- while (msg[i] != 0)
- vidmem[(line_number++)] = msg[i++];
-
- /* vidmem[(line_number++)]= 0; */
-#endif /* VIDEO_BIOS_WORKS */
-}
-
-void printnibl(unsigned long nibl)
-{
- static char c[2];
- nibl &= 0xf;
- c[0] = nibl;
- c[1] = 0;
- if ((nibl >= 0) && (nibl <= 9))
- c[0] += '0';
- else
- c[0] += ('A' - 10);
- display(c);
-
-}
-
-void printchar(unsigned char x)
-{
- int i;
- for (i = 4; i >= 0; i -= 4)
- printnibl(x >> i);
- display(" ");
}
-void printint(unsigned long x)
+void display(char *string)
{
- int i;
- display(" 0x");
- for (i = 28; i >= 0; i -= 4)
- printnibl(x >> i);
- display(" ");
+ while(*string) {
+ if (*string == '\n') {
+ display_tx_byte('\r');
+ }
+ display_tx_byte(*string);
+ string++;
+ }
}
void error(char errmsg[])
@@ -112,7 +115,7 @@
/*
* Write POST information
*/
-void intel_post(unsigned char value)
+void post_code(uint8_t value)
{
unsigned long hi, lo;
outb(value, 0x80);
@@ -120,160 +123,6 @@
rdtsc(lo, hi);
printk(KERN_INFO "POST: 0x%02x, TSC Lo: %d, Hi: %d\n",
value, lo, hi);
-#endif
-}
-
-void intel_cache_on(unsigned long base, unsigned long totalram)
-{
- intel_post(0x60);
-
- /* we need an #ifdef i586 here at some point ... */
- __asm__ __volatile__("mov %cr0, %eax\n\t"
- "and $0x9fffffff,%eax\n\t"
- "mov %eax, %cr0\n\t");
- /* turns out cache isn't really on until you set MTRR registers on
- * 686 and later.
- * NOTHING FANCY. Linux does a much better job anyway.
- * so absolute minimum needed to get it going.
- */
- /* OK, linux it turns out does nothing. We have to do it ... */
-#ifdef i686
- // totalram here is in linux sizing, i.e. units of KB.
- // set_mtrr is responsible for getting it into the right units!
- intel_set_mtrr(base, totalram);
-#endif
- intel_post(0x6A);
-}
-
-void intel_interrupts_on()
-{
-
- /* this is so interrupts work. This is very limited scope --
- * linux will do better later, we hope ...
- */
- /* this is the first way we learned to do it. It fails on real SMP
- * stuff. So we have to do things differently ...
- * see the Intel mp1.4 spec, page A-3
- */
-#ifdef SMP
- unsigned long reg, *regp;
-#define SVR 0xfee000f0
-#define LVT1 0xfee00350
-#define LVT2 0xfee00360
-#define APIC_ENABLED 0x100
-
- printk(KERN_INFO "Enabling interrupts...");
-
- regp = (unsigned long *) SVR;
- reg = *regp;
- reg &= (~0xf0);
- reg |= APIC_ENABLED;
- *regp = reg;
-
- regp = (unsigned long *) LVT1;
- reg = *regp;
- reg &= 0xfffe00ff;
- reg |= 0x5700;
- *regp = reg;
-
- regp = (unsigned long *) LVT2;
- reg = *regp;
- reg &= 0xfffe00ff;
- reg |= 0x5400;
- *regp = reg;
-#else
- unsigned long low, high;
-
- printk(KERN_INFO "Enabling interrupts...");
-
- rdmsr(0x1b, low, high);
- low &= ~0x800;
- wrmsr(0x1b, low, high);
-#endif
-
- printk(KERN_INFO "done.\n");
- intel_post(0x9b);
-}
-
-
-/* These functions should be chip-set independent -tds */
-void intel_zero_irq_settings(void)
-{
- struct pci_dev *pcidev;
- unsigned char line;
-
- printk(KERN_INFO "Zeroing IRQ settings...");
-
- pcidev = pci_devices;
-
- while (pcidev) {
- pci_read_config_byte(pcidev, 0x3d, &line);
- if (line) {
- pci_write_config_byte(pcidev, 0x3c, 0);
- }
- pcidev = pcidev->next;
- }
- printk(KERN_INFO "done.\n");
-}
-
-void intel_check_irq_routing_table(void)
-{
-#ifdef HAVE_PIRQ_TABLE
- const u8 *addr;
- const struct irq_routing_table *rt;
- int i;
- u8 sum;
-
- printk(KERN_INFO "Checking IRQ routing tables...");
-
- rt = &intel_irq_routing_table;
- addr = (u8 *)rt;
-
- sum = 0;
- for (i = 0; i < rt->size; i++)
- sum += addr[i];
-
- DBG("%s:%6d:%s() - irq_routing_table located at: 0x%p\n",
- __FILE__, __LINE__, __FUNCTION__, addr);
-
- sum = (unsigned char)(rt->checksum-sum);
-
- if (sum != rt->checksum) {
- printk(KERN_WARNING "%s:%6d:%s() - "
- "checksum is: 0x%02x but should be: 0x%02x\n",
- __FILE__, __LINE__, __FUNCTION__, rt->checksum, sum);
- }
-
- if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
- rt->size % 16 || rt->size < sizeof(struct irq_routing_table)) {
- printk(KERN_WARNING "%s:%6d:%s() - "
- "Interrupt Routing Table not valid\n",
- __FILE__, __LINE__, __FUNCTION__);
- return;
- }
-
- sum = 0;
- for (i=0; i<rt->size; i++)
- sum += addr[i];
-
- if (sum) {
- printk(KERN_WARNING "%s:%6d:%s() - "
- "checksum error in irq routing table\n",
- __FILE__, __LINE__, __FUNCTION__);
- }
-
- printk(KERN_INFO "done.\n");
-#endif /* #ifdef HAVE_PIRQ_TABLE */
-}
-
-#define RTABLE_DEST 0xf0000
-
-void intel_copy_irq_routing_table(void)
-{
-#ifdef HAVE_PIRQ_TABLE
- printk(KERN_INFO "Copying IRQ routing tables...");
- memcpy((char *) RTABLE_DEST, &intel_irq_routing_table, intel_irq_routing_table.size);
- printk(KERN_INFO "done.\n");
#endif
}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/compaq/ds10/Config freebios/src/mainboard/compaq/ds10/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/compaq/ds10/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/mainboard/compaq/ds10/Config Sat Mar 17 02:36:18 2001
@@ -0,0 +1,7 @@
+northbridge alpha/tsunami
+southbridge ali/m1543
+#southbridge...
+#superio...
+
+
+object mainboard.o
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/compaq/ds10/mainboard.c freebios/src/mainboard/compaq/ds10/mainboard.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/compaq/ds10/mainboard.c Wed Dec 31 17:00:00 1969
+++ freebios/src/mainboard/compaq/ds10/mainboard.c Sat Mar 17 02:35:27 2001
@@ -0,0 +1,6 @@
+#include <arch/io.h>
+
+void early_mainboard_init(void)
+{
+ enable_serial();
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/Config freebios/src/mainboard/intel/l440gx/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/mainboard/intel/l440gx/Config Fri Mar 9 00:41:25 2001
@@ -0,0 +1,56 @@
+northbridge intel/440gx
+southbridge intel/piix4e
+
+superio NSC/pc87309
+
+option ENABLE_FIXED_AND_VARIABLE_MTRRS
+option PIIX4_DEVFN=0x90
+option NO_KEYBOARD
+option ZKERNEL_START=0xfff40000
+option ZKERNEL_MASK=0x3ed
+option L440GX
+option SMP
+
+object mainboard.o
+
+cpu p6
+cpu p5
+
+makerule phlash_floppy: phlash ; mcopy -o /tmp/$(PHLASH_BASE_NAME).bi? a:
+
+makerule phlash: $(BOOT_IMAGE) linuxbios.rom headers ; rm -f xa?
+addaction phlash split -b 64k $(BOOT_IMAGE)
+addaction phlash # Now just touch them if we have a really
+addaction phlash # small kernel!
+addaction phlash touch xaa xab xac xad xae xaf xag xah
+addaction phlash # this is starting at bank 4, and proceeding on. Unused banks are dups
+addaction phlash # the nvram is odd, all of the banks are interleaved
+addaction phlash cat $(PHLASH_BASE_NAME).bi1.header xaa > $(PHLASH_BASE_NAME).bi1 #4
+addaction phlash cat $(PHLASH_BASE_NAME).bi3.header xab > $(PHLASH_BASE_NAME).bi3 #6
+addaction phlash cat $(PHLASH_BASE_NAME).bi2.header xac > $(PHLASH_BASE_NAME).bi2 #7
+addaction phlash cat $(PHLASH_BASE_NAME).bi4.header xad > $(PHLASH_BASE_NAME).bi4 #9
+addaction phlash cat $(PHLASH_BASE_NAME).bi7.header xae > $(PHLASH_BASE_NAME).bi7 #a
+addaction phlash cat $(PHLASH_BASE_NAME).bi6.header xaf > $(PHLASH_BASE_NAME).bi6 #b
+addaction phlash cat $(PHLASH_BASE_NAME).bi9.header xag > $(PHLASH_BASE_NAME).bi9 #c
+addaction phlash cat $(PHLASH_BASE_NAME).bi8.header xah > $(PHLASH_BASE_NAME).bi8 #d
+addaction phlash cat $(PHLASH_BASE_NAME).bia.header linuxbios.rom > $(PHLASH_BASE_NAME).bia
+addaction phlash # Part o & 5 seem not to be written reliably for some reason...
+addaction phlash cat $(PHLASH_BASE_NAME).bio.header /dev/null > $(PHLASH_BASE_NAME).bio
+addaction phlash cat $(PHLASH_BASE_NAME).bi5.header /dev/null > $(PHLASH_BASE_NAME).bi5
+addaction phlash sh -x $(TOP)/src/mainboard/intel/l440gx/BUILD_PHLASH_FILES $(PHLASH_BASE_NAME)
+
+makerule headers : $(PHLASH_BASE_NAME).bi1.header $(PHLASH_BASE_NAME).bi2.header $(PHLASH_BASE_NAME).bi3.header $(PHLASH_BASE_NAME).bi4.header $(PHLASH_BASE_NAME).bi5.header $(PHLASH_BASE_NAME).bi6.header $(PHLASH_BASE_NAME).bi7.header $(PHLASH_BASE_NAME).bi8.header $(PHLASH_BASE_NAME).bi9.header $(PHLASH_BASE_NAME).bia.header $(PHLASH_BASE_NAME).bio.header ;
+
+makerule $(PHLASH_BASE_NAME).bi1.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi1 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi2.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi2 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi3.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi3 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi4.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi4 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi5.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi5 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi6.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi6 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi7.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi7 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi8.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi8 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bi9.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi9 ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bia.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bia ; dd if=$< of=$@ bs=1 count=160
+makerule $(PHLASH_BASE_NAME).bio.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bio ; dd if=$< of=$@ bs=1 count=160
+
+addaction clean rm -f $(PHLASH_BASE_NAME)* xa?
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/crt0.S freebios/src/mainboard/intel/l440gx/crt0.S
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/crt0.S Fri Dec 1 16:35:17 2000
+++ freebios/src/mainboard/intel/l440gx/crt0.S Mon Mar 12 17:23:25 2001
@@ -26,7 +26,7 @@
#include <pc80/i8259.inc>
-#include <superio/NSC/pc87309/superio.inc>
+#include <superio/NSC/pc87309/setup_serial.inc>
#include <pc80/serial.inc>
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/mainboard.c freebios/src/mainboard/intel/l440gx/mainboard.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/mainboard/intel/l440gx/mainboard.c Tue Oct 31 20:54:54 2000
+++ freebios/src/mainboard/intel/l440gx/mainboard.c Tue Mar 13 17:43:03 2001
@@ -23,9 +23,9 @@
#endif
#if 1
{
- unsigned char byte;
- unsigned short word;
- unsigned long dword;
+ u8 byte;
+ u16 word;
+ u32 dword;
for(i = 0; i < 8; i++) {
pci_read_config_byte(host_bridge_pcidev, 0x60 +i, &byte);
printk("DRB[i] = 0x%02x\n", byte);
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/alpha/tsunami/Config freebios/src/northbridge/alpha/tsunami/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/alpha/tsunami/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/northbridge/alpha/tsunami/Config Thu Mar 15 22:43:31 2001
@@ -0,0 +1,3 @@
+cpu ev6
+option USE_CPU_EV6=1
+option USE_CORE_TSUNAMI=1
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/intel/440gx/Config freebios/src/northbridge/intel/440gx/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/intel/440gx/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/northbridge/intel/440gx/Config Mon Jan 22 19:42:27 2001
@@ -0,0 +1,4 @@
+raminit northbridge/intel/440gx/raminit.inc
+raminit sdram/generic_sdram.inc
+
+object northbridge.o
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/intel/440gx/raminit.inc freebios/src/northbridge/intel/440gx/raminit.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/northbridge/intel/440gx/raminit.inc Tue Nov 21 10:30:21 2000
+++ freebios/src/northbridge/intel/440gx/raminit.inc Tue Mar 13 18:02:55 2001
@@ -1,5 +1,6 @@
jmp intel_440_out
+
#define USE_SPD 1
#define CS_WRITE_BYTE(addr, byte) \
@@ -146,9 +147,16 @@
#define ASSERT_RAM_COMMAND() DIMMS_READ(RAM_READ)
#define ASSERT_MRS_RAM_COMMAND(mode) DIMMS_READ(mode)
#if ! USE_SPD
-#define ENABLE_REFRESH() CS_BIS_BYTE(0x57, 0x1)
+#define ENABLE_REFRESH() \
+ movl $(0x57), %eax ; \
+ PCI_READ_CONFIG_BYTE ; \
+ orb 0x1, %al ; \
+ mov %al, %dl ; \
+ movl $(0x57), %eax ; \
+ PCI_WRITE_CONFIG_BYTE
+
#else /* USE_SPD */
-#define ENABLE_REFRESH() CALL_LABEL(spd_enable_refresh)
+#define ENABLE_REFRESH() MEM_CALL_LABEL(spd_enable_refresh)
#endif
@@ -421,7 +429,7 @@
CS_WRITE_BYTE(0xef, 0x00)
-ram_set_registers:
+ram_set_registers:
SET_NBXCFG
SET_DRAMC
SET_PAM
@@ -436,13 +444,15 @@
SET_MBFS
SET_DWTC
SET_DRTC
- RET_LABEL(ram_set_registers)
+ MEM_RET_LABEL(ram_set_registers)
#define DEVFN(device, function) (((device) << 3) + (function))
#define CONFIG_ADDR(bus,devfn,where) (((bus) << 16) | ((devfn) << 8) | (where))
#define PM_FUNCTION CONFIG_ADDR(0, PIIX4_DEVFN+3, 0)
+#if USE_SPD
+
#define SMBUS_IO_BASE 0x1000
#define SMBHSTSTAT 0
#define SMBHSTCTL 2
@@ -456,7 +466,7 @@
CS_WRITE_LONG(PM_FUNCTION + 0x90, SMBUS_IO_BASE | 1) /* iobase addr */
CS_WRITE_BYTE(PM_FUNCTION + 0xd2, (0x4 << 1) | 1) /* smbus enable */
CS_WRITE_WORD(PM_FUNCTION + 0x4, 1) /* iospace enable */
- RET_LABEL(enable_smbus)
+ MEM_RET_LABEL(enable_smbus)
/*
* Routine: setup_smbus
@@ -469,7 +479,7 @@
xor %eax,%eax
movl $(SMBUS_IO_BASE + SMBHSTSTAT), %edx
outb %al, %dx
- RET_LABEL(setup_smbus)
+ MEM_RET_LABEL(setup_smbus)
#define SMBUS_MEM_DEVICE_0 (0xa << 3)
#define SMBUS_MEM_DEVICE_1 (SMBUS_MEM_DEVICE_0 +1)
@@ -489,7 +499,7 @@
1: inb %dx, %al
testb $1, %al
jnz 1b
- RET_LABEL(smbus_wait_until_ready)
+ MEM_RET_LABEL(smbus_wait_until_ready)
/*
* Routine: smbus_wait_until_done
@@ -508,7 +518,7 @@
inb %dx, %al
testb $0xFE, %al
jz 2b
-3: RET_LABEL(smbus_wait_until_done)
+3: MEM_RET_LABEL(smbus_wait_until_done)
/*
* Routine: smbus_read_byte
@@ -528,11 +538,11 @@
#define SMBUS_READ_BYTE(device, address) \
movl $( (device) | ((address) << 8)), %ebx ; \
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
smbus_read_byte:
/* poll until the smbus is ready for commands */
- CALL_LABEL(smbus_wait_until_ready)
+ MEM_CALL_LABEL(smbus_wait_until_ready)
/* clear any lingering errors, so that the transaction will run */
movl $(SMBUS_IO_BASE + SMBHSTSTAT), %edx
@@ -562,7 +572,7 @@
outb %al, %dx
/* poll for transaction completion */
- CALL_LABEL(smbus_wait_until_done)
+ MEM_CALL_LABEL(smbus_wait_until_done)
/* read the results and see if we succeded */
movl $(SMBUS_IO_BASE + SMBHSTSTAT), %edx
@@ -572,7 +582,7 @@
movl $(SMBUS_IO_BASE + SMBHSTDAT0), %edx
inb %dx, %al
1:
- RETSP
+ MEM_RETSP
/*
@@ -593,7 +603,6 @@
*/
spd_set_drb:
-#define SPD_SETUP_DIMM(SMBUS_MEM_DEVICE, CONFIG_PORT) \
xorl %ebp, %ebp /* clear the memory address */
movl $((0x60 << 16) |SMBUS_MEM_DEVICE_0), %ebx
spd_set_drb_loop_top:
@@ -603,31 +612,31 @@
subl $1, %esi
movb $3, %bh /* rows */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
jz 20f
andl $0xf, %eax
addl %eax, %edi
movb $4, %bh /* columns */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
andl $0xf, %eax
addl %eax, %edi
movb $17, %bh /* banks */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
andl $0xff, %eax
bsrl %eax, %ecx
addl %ecx, %edi
/* Get the module data width and convert it to a power of two */
movb $7, %bh /* (high byte) */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
andl $0xff, %eax
movl %eax, %ecx
shll $8, %ecx
movb $6, %bh /* (low byte) */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
andl $0xff, %eax
orl %eax, %ecx
bsrl %ecx, %eax
@@ -638,29 +647,29 @@
/* side two */
movb $5, %bh /* number of physical banks */
- CALLSP(smbus_read_byte)
+ MEM_CALLSP(smbus_read_byte)
cmp $1, %al
jbe 20f
/* for now only handle the symmetrical case */
movl %edi, %esi
-
+20:
/* Compute the end address for the DRB register */
- cmpl $8, %edi
- jae 20f
+ cmpl $8, %edi /* Ignore the dimm if it is over 2GB */
+ jae 21f
movl $1, %eax
movl %edi, %ecx
shll %cl, %eax
addl %eax, %ebp
-20:
- /* Write the comuputed value for the first half of the DIMM */
+21:
+ /* Write the computed value for the first half of the DIMM */
movl %ebp, %edx /* value to write into %edx */
movl %ebx, %eax
shrl $16, %eax /* port address into %eax */
PCI_WRITE_CONFIG_BYTE
/* Compute the end address for the DRB register */
- cmpl $8, %esi
+ cmpl $8, %esi /* Ignore the dimm if it is over 2GB */
jae 30f
mov $1, %eax
movl %esi, %ecx
@@ -679,7 +688,7 @@
jbe spd_set_drb_loop_top
/* o.k. I'm done return now */
- RET_LABEL(spd_set_drb)
+ MEM_RET_LABEL(spd_set_drb)
/*
@@ -706,7 +715,7 @@
/* Find the first dimm and assume the rest are the same */
/* Load the smbus device and port int %ebx */
movl $((21 << 8) | SMBUS_MEM_DEVICE_0), %ebx
-1: CALLSP(smbus_read_byte)
+1: MEM_CALLSP(smbus_read_byte)
jz 2f
andl $0x12, %eax
jmp spd_set_dramc_out
@@ -725,8 +734,9 @@
1: movl %eax, %edx
movl $0x57, %eax
PCI_WRITE_CONFIG_BYTE
- RET_LABEL(spd_set_dramc)
+ MEM_RET_LABEL(spd_set_dramc)
+#endif /* USE_SPD */
/*
* Routine: spd_enable_refresh
@@ -748,11 +758,12 @@
.byte 0x03 /* Extended(4x) 62.5 us -> 62.4 us */
.byte 0x04 /* Extended(8x) 125 us -> 124.8 us */
+#if USE_SPD
spd_enable_refresh:
/* Find the first dimm and assume the rest are the same */
/* Load the smbus device and port int %ebx */
movl $((12 << 8) | SMBUS_MEM_DEVICE_0), %ebx
-1: CALLSP(smbus_read_byte)
+1: MEM_CALLSP(smbus_read_byte)
jz 2f
andl $0x7f, %eax
jmp spd_enable_refresh_out
@@ -777,7 +788,7 @@
movb %al, %dl
movl $0x57, %eax
PCI_WRITE_CONFIG_BYTE
- RET_LABEL(spd_enable_refresh)
+ MEM_RET_LABEL(spd_enable_refresh)
/*
* Routine: spd_set_rps
@@ -802,7 +813,7 @@
movl $SMBUS_MEM_DEVICE_0, %ebx
1: movb $3, %bh
- CALLSP(smbus_read_byte) /* row address bits */
+ MEM_CALLSP(smbus_read_byte) /* row address bits */
jz 2f
andl $0xf, %eax
movl %eax, %edi
@@ -814,7 +825,7 @@
orl %edi, %esi
/* side two */
movb $5, %bh
- CALLSP(smbus_read_byte) /* number of physical banks */
+ MEM_CALLSP(smbus_read_byte) /* number of physical banks */
cmp $1, %al
jbe 2f
/* for now only handle the symmtrical case */
@@ -829,7 +840,7 @@
movl $0x7f, %eax
PCI_WRITE_CONFIG_WORD
- RET_LABEL(spd_set_rps)
+ MEM_RET_LABEL(spd_set_rps)
/*
* Routine: spd_set_pgpol
@@ -857,7 +868,7 @@
movl $SMBUS_MEM_DEVICE_0, %ebx
1: movb $17, %bh
- CALLSP(smbus_read_byte) /* logical banks */
+ MEM_CALLSP(smbus_read_byte) /* logical banks */
jz 2f
cmp $0x4, %eax
jl 2f
@@ -866,7 +877,7 @@
orl %eax, %esi
/* side two */
movb $5, %bh
- CALLSP(smbus_read_byte) /* number of physical banks */
+ MEM_CALLSP(smbus_read_byte) /* number of physical banks */
cmp $1, %al
jbe 2f
/* for now only handle the symmtrical case */
@@ -884,7 +895,7 @@
movl %esi, %ecx
movl $0x78, %eax
PCI_WRITE_CONFIG_WORD
- RET_LABEL(spd_set_pgpol)
+ MEM_RET_LABEL(spd_set_pgpol)
/*
* Routine: spd_enable_nbxcfg
@@ -908,7 +919,7 @@
movl $SMBUS_MEM_DEVICE_0, %ebx
1: movb $11, %bh
- CALLSP(smbus_read_byte) /* module error correction type */
+ MEM_CALLSP(smbus_read_byte) /* module error correction type */
jz 2f
cmp $0x2, %eax /* 0 == None, 1 == Parity, 2 == ECC */
jne 2f
@@ -918,7 +929,7 @@
/* side two */
movb $5, %bh
- CALLSP(smbus_read_byte) /* number of physical banks */
+ MEM_CALLSP(smbus_read_byte) /* number of physical banks */
cmp $1, %al
jbe 2f
/* The only is the symmtrical case */
@@ -934,26 +945,42 @@
movl %esi, %edx
movl $0x53, %eax
PCI_WRITE_CONFIG_BYTE
- RET_LABEL(spd_set_nbxcfg)
+ MEM_RET_LABEL(spd_set_nbxcfg)
spd_set_sdramc:
- RET_LABEL(spd_set_sdramc)
+ MEM_RET_LABEL(spd_set_sdramc)
+
+#endif /* USE_SPD */
+
+
/* PAM FDHC MBSC SMRAM ESRAMC MBFS DWTC DRTC */
ram_set_spd_registers:
#if USE_SPD
- CALL_LABEL(enable_smbus)
- CALL_LABEL(setup_smbus)
- CALL_LABEL(spd_set_drb)
- CALL_LABEL(spd_set_dramc)
- CALL_LABEL(spd_set_rps)
- CALL_LABEL(spd_set_sdramc)
- CALL_LABEL(spd_set_pgpol)
- CALL_LABEL(spd_set_nbxcfg)
+ MEM_CALL_LABEL(enable_smbus)
+ MEM_CALL_LABEL(setup_smbus)
+ MEM_CALL_LABEL(spd_set_drb)
+ MEM_CALL_LABEL(spd_set_dramc)
+ MEM_CALL_LABEL(spd_set_rps)
+ MEM_CALL_LABEL(spd_set_sdramc)
+ MEM_CALL_LABEL(spd_set_pgpol)
+ MEM_CALL_LABEL(spd_set_nbxcfg)
#endif
- RET_LABEL(ram_set_spd_registers)
+ MEM_RET_LABEL(ram_set_spd_registers)
+#if 0
+#define HAVE_ECC_RAM_SIZE
+get_ecc_ram_size_ebx:
+ movl $0x67, %eax /* Read the RAM SIZE */
+ PCI_READ_CONFIG_BYTE
+ andl $0x000000ff, %eax /* Convert it to bytes */
+ movl %eax, %ebx
+ shll $23, %ebx
+ RET_LABEL(get_ecc_ram_size_ebx)
+#endif /* HAVE_ECC_RAM_SIZE */
+
+
/* things that are not used */
#define FIRST_NORMAL_REFERENCE()
#define SPECIAL_FINISHUP()
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/pc80/keyboard.c freebios/src/pc80/keyboard.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/pc80/keyboard.c Fri Dec 1 20:51:28 2000
+++ freebios/src/pc80/keyboard.c Thu Mar 15 12:41:20 2001
@@ -15,10 +15,10 @@
/* empty inut bufferm or any other command/data will be lost */
while ((inb(0x64) & 0x02))
- intel_post(0);
+ post_code(0);
/* empty output buffer or any other command/data will be lost */
while ((inb(0x64) & 0x01) == 0)
- intel_post(1);
+ post_code(1);
/* read self-test result, 0x55 should be returned form 0x60 */
if ((regval = inb(0x60) != 0x55))
@@ -27,28 +27,28 @@
/* enable keyboard interface */
outb(0x60, 0x64);
while ((inb(0x64) & 0x02))
- intel_post(2);
+ post_code(2);
/* send cmd: enable IRQ 1 */
outb(0x61, 0x60);
while ((inb(0x64) & 0x02))
- intel_post(3);
+ post_code(3);
/* reset kerboard and self test (keyboard side) */
outb(0xff, 0x60);
/* empty inut bufferm or any other command/data will be lost */
while ((inb(0x64) & 0x02))
- intel_post(4);
+ post_code(4);
/* empty output buffer or any other command/data will be lost */
while ((inb(0x64) & 0x01) == 0)
- intel_post(5);
+ post_code(5);
if ((regval = inb(0x60) != 0xfa))
return;
while ((inb(0x64) & 0x01) == 0)
- intel_post(6);
+ post_code(6);
if ((regval = inb(0x60) != 0xaa))
return;
}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/pc80/serial.inc freebios/src/pc80/serial.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/pc80/serial.inc Tue Dec 5 23:44:06 2000
+++ freebios/src/pc80/serial.inc Fri Mar 2 14:20:59 2001
@@ -26,32 +26,166 @@
#define TTYS0_TX_AL \
mov %al, %ah ; \
9: mov $TTYS0_LSR, %dx ; \
- inb %dx, %al ; \
- test $0x20, %al ; \
+ inb %dx, %al ; \
+ test $0x20, %al ; \
je 9b ; \
mov $TTYS0_TBR, %dx ; \
- mov %ah, %al ; \
+ mov %ah, %al ; \
outb %al, %dx
+ /* uses: ax, dx */
+#define TTYS0_TX_BYTE(byte) \
+ mov byte, %al ; \
+ TTYS0_TX_AL
+
+ /* uses: ax, dx */
+#define TTYS0_TX_AL_HEX8 \
+ mov $TTYS0_SCR, %dx ; \
+ outb %al, %dx ; \
+ shr $4, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ mov $TTYS0_SCR, %dx ; \
+ inb %dx, %al ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ mov $TTYS0_SCR, %dx ; \
+ inb %dx, %al
+
+
+#if !USE_CACHE_RAM
/* uses: esp, ax, dx */
#define TTYS0_TX_CHAR(byte) \
mov byte, %al ; \
CALLSP(ttys0_tx_al)
+#else
+ /* uses: ax, dx */
+#define TTYS0_TX_CHAR(byte) \
+ mov byte, %al ; \
+ TTYS0_TX_AL
+
+#endif
/* uses: esp, ax, dx */
#define TTYS0_TX_HEX8(byte) \
mov byte, %al ; \
CALLSP(ttys0_tx_hex8)
+#if !USE_CACHE_RAM
/* uses: esp, eax, ebx, dx */
#define TTYS0_TX_HEX32(lword) \
mov lword, %eax ; \
CALLSP(ttys0_tx_hex32)
+#else
+ /* uses: eax, lword, dx */
+#define TTYS0_TX_HEX32(lword) \
+ mov lword, %eax ; \
+ shr $28, %eax ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $24, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $20, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $16, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $12, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $8, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ shr $4, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL ; \
+ ; \
+ mov lword, %eax ; \
+ and $0x0f, %al ; \
+ add $'0', %al ; \
+ cmp $'9', %al ; \
+ jle 9f ; \
+ add $39, %al ; \
+9: ; \
+ TTYS0_TX_AL
+
+#endif
+#if !USE_CACHE_RAM
/* uses: esp, ebx, ax, dx */
#define TTYS0_TX_STRING(string) \
mov string, %ebx ; \
CALLSP(ttys0_tx_string)
+#else
+ /* uses: ebx, ax, dx */
+#define TTYS0_TX_STRING(string) \
+ movl string, %ebx ; \
+10: movb (%ebx), %al ; \
+ incl %ebx ; \
+ testb %al, %al ; \
+ jz 11f ; \
+ TTYS0_TX_AL ; \
+ jmp 10b ; \
+11:
+
+#endif
/* uses: esp, ax, dx */
ttys0_tx_al:
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/Config freebios/src/rom/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/rom/Config Tue Mar 13 14:12:09 2001
@@ -0,0 +1,4 @@
+object fill_inbuf.o
+object rom_fill_inbuf.o
+object docmil_fill_inbuf.o
+object tsunami_tigbus_rom_fill_inbuf.o
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/docmil_fill_inbuf.c freebios/src/rom/docmil_fill_inbuf.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/docmil_fill_inbuf.c Wed Dec 31 17:00:00 1969
+++ freebios/src/rom/docmil_fill_inbuf.c Thu Mar 15 12:38:23 2001
@@ -0,0 +1,120 @@
+#ifdef USE_DOC_MIL
+
+#include <cpu/p5/io.h>
+#include <printk.h>
+#include <stdlib.h>
+#include <subr.h>
+#include <stddef.h>
+#include <rom/fill_inbuf.h>
+
+#ifndef DOC_KERNEL_START
+#define DOC_KERNEL_START 65536
+#endif
+
+static unsigned char *nvram;
+static int block_count;
+static int firstfill = 1;
+
+void memcpy_from_doc_mil(void *dest, const void *src, size_t n);
+unsigned char *doc_mil = (unsigned char *) 0xffffe000;
+#ifdef CHECK_DOC_MIL
+unsigned char *checkbuf;
+#endif /* CHECK_DOC_MIL */
+
+static unsigned char *ram;
+#define K64 (64 * 1024)
+
+
+int fill_inbuf(void)
+{
+ if (firstfill) {
+ if ((ram = malloc(K64)) == NULL) {
+ printk(KERN_EMERG "%6d:%s() - ram malloc failed\n",
+ __LINE__, __FUNCTION__);
+ return (0);
+ }
+
+#ifdef CHECK_DOC_MIL
+ if ((checkbuf = malloc(K64)) == NULL) {
+ printk(KERN_EMERG "%6d:%s() - checkbuf malloc failed\n",
+ __LINE__, __FUNCTION__);
+ printk(KERN_EMERG "Checking disabled\n");
+ }
+#endif
+
+ DBG("%6d:%s() - ram buffer:0x%p\n",
+ __LINE__, __FUNCTION__, ram);
+
+ block_count = 0;
+ firstfill = 0;
+ nvram = (unsigned char *) DOC_KERNEL_START;
+ }
+
+ memcpy_from_doc_mil(ram, nvram, K64);
+#ifdef CHECK_DOC_MIL
+ if (checkbuf) {
+ memcpy_from_doc_mil(checkbuf, nvram, K64);
+ if (memcmp(checkbuf, ram, K64)) {
+ printk("CHECKBUF FAILS for doc mil!\n");
+ printk(KERN_EMERG "address 0x%x\n", nvram);
+ }
+ }
+ {
+ int i;
+ printk(KERN_INFO "First 16 bytes of block: ");
+ for(i = 0; i < 16; i++)
+ printk("0x%x ", ram[i]);
+ printk(KERN_INFO "\n");
+ }
+#endif
+ DBG("%6d:%s() - nvram:0x%p block_count:%d\n",
+ __LINE__, __FUNCTION__, nvram, block_count);
+
+ nvram += K64;
+ inbuf = ram;
+ insize = K64;
+ inptr = 1;
+
+ post_code(0xd0 + block_count);
+ block_count++;
+ return inbuf[0];
+}
+
+void memcpy_from_doc_mil(void *dest, const void *src, size_t n)
+{
+ int i;
+ unsigned long address = (unsigned long) src;
+
+ for (i = n; i >= 0; i -= 0x200) {
+ unsigned short c = 0x1000;
+ volatile unsigned char dummy;
+
+ /* issue Read00 flash command */
+ *(unsigned char *) (doc_mil + 0x1004) = 0x03;
+ *(unsigned char *) (doc_mil + 0x800) = 0x00;
+ *(unsigned char *) (doc_mil + 0x101e) = 0x00;
+ *(unsigned char *) (doc_mil + 0x1004) = 0x01;
+
+ /* issue Address to flash */
+ *(unsigned char *) (doc_mil + 0x1004) = 0x05;
+ *(unsigned char *) (doc_mil + 0x800) = address & 0xff;
+ *(unsigned char *) (doc_mil + 0x800) = (address >> 9) & 0xff;
+ *(unsigned char *) (doc_mil + 0x800) = (address >> 17) & 0xff;
+ *(unsigned char *) (doc_mil + 0x101e) = 0x00;
+ *(unsigned char *) (doc_mil + 0x1004) = 0x01;
+
+ /* We are using the "side effect" of the assignment to force GCC reload
+ * *(doc_mil + 0x1004) on each iteration */
+ while (!((dummy = *(unsigned char *) (doc_mil + 0x1004)) & 0x80) && --c)
+ /* wait for chip response */;
+
+ /* copy 512 bytes of data from CDSN_IO registers */
+ dummy = *(unsigned char *) (doc_mil + 0x101d);
+ memcpy(dest, doc_mil + 0x800, 0x200);
+
+ dest += 0x200;
+ address += 0x200;
+ }
+}
+
+#endif /* USE_DOC_MIL */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/fill_inbuf.c freebios/src/rom/fill_inbuf.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/fill_inbuf.c Wed Dec 31 17:00:00 1969
+++ freebios/src/rom/fill_inbuf.c Tue Mar 13 14:13:29 2001
@@ -0,0 +1,7 @@
+#include <rom/fill_inbuf.h>
+
+unsigned char *inbuf /* = 0 */;
+unsigned int insize /* = 0 */;
+unsigned int inptr /* = 0 */;
+
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/rom_fill_inbuf.c freebios/src/rom/rom_fill_inbuf.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/rom_fill_inbuf.c Wed Dec 31 17:00:00 1969
+++ freebios/src/rom/rom_fill_inbuf.c Thu Mar 15 12:38:45 2001
@@ -0,0 +1,117 @@
+#ifdef USE_GENERIC_ROM
+
+#include <printk.h>
+#include <stdlib.h>
+#include <subr.h>
+#include <stddef.h>
+#include <rom/fill_inbuf.h>
+
+#include <string.h>
+
+#ifndef ZKERNEL_START
+#define ZKERNEL_START 0xfff80000
+#endif
+
+#ifndef ZKERNEL_MASK
+#define ZKERNEL_MASK 0x0000ffff
+#endif
+
+static unsigned char *zkernel_start = (unsigned char *)ZKERNEL_START;
+static unsigned long zkernel_mask = ZKERNEL_MASK;
+
+static unsigned char *nvram;
+static int block_count;
+static int firstfill = 1;
+
+#if defined(INBUF_COPY)
+static unsigned char *ram;
+#endif
+
+#define K64 (64 * 1024)
+
+int fill_inbuf(void)
+{
+ extern unsigned char *inbuf;
+ extern unsigned int insize;
+ extern unsigned int inptr;
+
+ if (firstfill) {
+ block_count = 0;
+ firstfill = 0;
+#ifdef INBUF_COPY
+ ram = malloc(K64);
+#endif
+ }
+
+ if (block_count > 31) {
+ printk(KERN_EMERG "%6d:%s() - overflowed source buffer\n",
+ __LINE__, __FUNCTION__);
+ inbuf = zkernel_start;
+ inptr = 0;
+ insize = 0;
+ return (0);
+ }
+
+ if (!block_count) {
+ nvram = zkernel_start;
+
+#ifdef INBUF_COPY
+ if (!ram) {
+ printk(KERN_EMERG "%6d:%s() - "
+ "ram malloc failed\n",
+ __LINE__, __FUNCTION__);
+ inbuf = zkernel_start;
+ inptr = 0;
+ insize = 0;
+ return (0);
+ }
+
+ DBG("%6d:%s() - ram buffer:0x%08x\n",
+ __LINE__, __FUNCTION__, ram);
+#endif
+ DBG("%6d:%s() - zkernel_start:0x%08x "
+ "zkernel_mask:0x%08x\n",
+ __LINE__, __FUNCTION__,
+ zkernel_start, zkernel_mask);
+ } else {
+ nvram += K64;
+
+ while (!(zkernel_mask & (1 << block_count))) {
+ DBG("%6d:%s() - skipping block %d\n",
+ __LINE__, __FUNCTION__, block_count);
+
+ block_count++;
+ nvram += K64;
+
+ if (block_count > 31) {
+ printk(KERN_EMERG "%6d:%s() - "
+ "overflowed source buffer\n",
+ __LINE__, __FUNCTION__);
+ inbuf = zkernel_start;
+ inptr = 0;
+ insize = 1;
+ return (0);
+ }
+ }
+ }
+
+#ifdef INBUF_COPY
+ memcpy(ram, nvram, K64);
+#endif
+ DBG("%6d:%s() - nvram:0x%p block_count:%d\n",
+ __LINE__, __FUNCTION__, nvram, block_count);
+
+#ifdef INBUF_COPY
+ inbuf = ram;
+#else
+ inbuf = nvram;
+#endif
+ insize = K64;
+ inptr = 1;
+ post_code(0xd0 + block_count);
+ block_count++;
+ return inbuf[0];
+}
+
+
+#endif /* USE_GENERIC_ROM */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/tsunami_tigbus_rom_fill_inbuf.c freebios/src/rom/tsunami_tigbus_rom_fill_inbuf.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/rom/tsunami_tigbus_rom_fill_inbuf.c Wed Dec 31 17:00:00 1969
+++ freebios/src/rom/tsunami_tigbus_rom_fill_inbuf.c Thu Mar 15 15:21:09 2001
@@ -0,0 +1,98 @@
+#ifdef USE_TSUNAMI_TIGBUS_ROM
+
+#include <printk.h>
+#include <stdlib.h>
+#include <subr.h>
+#include <stddef.h>
+#include <rom/fill_inbuf.h>
+
+#include <arch/io.h>
+#include <northbridge/alpha/tsunami/core_tsunami.h>
+
+#ifndef TIG_KERNEL_START
+#define TIG_KERNEL_START 0x20000
+#endif
+
+static unsigned long nvram;
+static int block_count;
+static int firstfill = 1;
+static unsigned char *ram;
+
+#define K64 (64 * 1024)
+
+#define MAX_TIG_FLASH_SIZE (16*1024*1024)
+static void tsunami_flash_copy_from(void *addr, unsigned long offset, long len)
+{
+
+ unsigned char *dest;
+ dest = addr;
+ while(len && (offset < MAX_TIG_FLASH_SIZE)) {
+ *dest = tsunami_tig_readb(offset);
+ offset++;
+ dest++;
+ len--;
+ }
+}
+
+int fill_inbuf(void)
+{
+ extern unsigned char *inbuf;
+ extern unsigned int insize;
+ extern unsigned int inptr;
+
+ if (firstfill) {
+ block_count = 0;
+ firstfill = 0;
+ ram = malloc(K64);
+ if (!ram) {
+ printk(KERN_EMERG "%6d:%s() - "
+ "ram malloc failed\n",
+ __LINE__, __FUNCTION__);
+ return 0;
+ }
+ }
+
+ if (block_count > 31) {
+ printk(KERN_EMERG "%6d:%s() - overflowed source buffer\n",
+ __LINE__, __FUNCTION__);
+ insize = 0;
+ return (0);
+ }
+ if (!block_count) {
+ nvram = TIG_KERNEL_START;
+ DBG("%6d:%s() - ram buffer:0x%08x\n",
+ __LINE__, __FUNCTION__, ram);
+ DBG("%6d:%s() - TIG_KERNEL_START:0x%08x\n",
+ __LINE__, __FUNCTION__,
+ TIG_KERNEL_START);
+ }
+
+
+ tsunami_flash_copy_from(ram, nvram, K64);
+ DBG("\n%6d:%s() - nvram:0x%lx block_count:%d\n",
+ __LINE__, __FUNCTION__, nvram, block_count);
+
+#if 0
+ {
+ int i;
+ for(i = 0; i < K64; i+= 16) {
+ printk("%05x: %02x %02x %02x %02x %02x %02x %02x %02x "
+ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
+ (block_count << 16)+i,
+ ram[i+0], ram[i+1], ram[i+2], ram[i+3],
+ ram[i+4], ram[i+5], ram[i+6], ram[i+7],
+ ram[i+8], ram[i+9], ram[i+10], ram[i+11],
+ ram[i+12], ram[i+13], ram[i+14],ram[i+15]);
+ }
+ }
+#endif
+ nvram += K64;
+ inbuf = ram;
+ insize = K64;
+ inptr = 1;
+ post_code(0xd0 + block_count);
+ block_count++;
+ return inbuf[0];
+}
+
+#endif /* USE_TSUNAMI_TIGBUS_ROM */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/sdram/generic_sdram.inc freebios/src/sdram/generic_sdram.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/sdram/generic_sdram.inc Wed Nov 15 21:51:39 2000
+++ freebios/src/sdram/generic_sdram.inc Tue Mar 13 18:02:19 2001
@@ -31,6 +31,35 @@
ram_18: .string "Ram18\r\n"
ram_19: .string "Ram19\r\n"
ram_20: .string "Ram20\r\n"
+
+#if USE_CACHE_RAM
+cache_ram_1: .string "Cache_Ram1\r\n"
+cache_ram_2: .string "Cache_Ram2\r\n"
+cache_ram_3: .string "Cache_Ram3\r\n"
+cache_ram_4: .string "Cache_Ram4\r\n"
+cache_ram_5: .string "Cache_Ram5\r\n"
+cache_ram_6: .string "Cache_Ram6\r\n"
+cache_ram_7: .string "Cache_Ram7\r\n"
+cache_ram_8: .string "Cache_Ram8\r\n"
+cache_ram_9: .string "Cache_Ram9\r\n"
+cache_ram_10: .string "Cache_Ram10\r\n"
+cache_ram_11: .string "Cache_Ram11\r\n"
+cache_ram_12: .string "Cache_Ram12\r\n"
+cache_ram_13: .string "Cache_Ram13\r\n"
+cache_ram_14: .string "Cache_Ram14\r\n"
+cache_ram_15: .string "Cache_Ram15\r\n"
+cache_ram_16: .string "Cache_Ram16\r\n"
+cache_ram_17: .string "Cache_Ram17\r\n"
+cache_ram_18: .string "Cache_Ram18\r\n"
+cache_ram_19: .string "Cache_Ram19\r\n"
+cache_ram_20: .string "Cache_Ram20\r\n"
+
+cache_ram_dummy:
+ TTYS0_TX_STRING($cache_ram_10)
+ MEM_RET_LABEL(cache_ram_dummy)
+
+#endif /* USE_CACHE_RAM */
+
no_memory_str: .string "No memory!\r\n"
no_memory: TTYS0_TX_STRING($no_memory_str)
@@ -38,18 +67,172 @@
jmp 1b
ram_initialize:
+#if USE_CACHE_RAM
+ /* A bit of a hack to test out using an early stack resident only in cache... */
+ TTYS0_TX_STRING($cache_ram_1)
+ /* The fixed and variable MTRRs are powered-up with random values,
+ * clear them to MTRR_TYPE_UNCACHABLE for safety reasons
+ */
+ cld
+ xorl %eax, %eax
+ xorl %edx, %edx
+ movl $fixed_mtrr_msr, %esi
+ lodsw (%esi), %ax
+1: movzwl %ax, %ecx
+ xorl %eax, %eax
+ wrmsr
+ lodsw (%esi), %ax
+ testl %ecx, %ecx
+ jnz 1b
+
+ TTYS0_TX_STRING($cache_ram_2)
+ /* Temporarily enable the cache in writeback mode over an
+ * unoccupied physical address area $0xffefe000 - $0xffefffff.
+ * 8K below the last megabyte of memory.
+ */
+ xorl %edx, %edx
+
+ movl $0xffefe006, %eax /* mtrr[0] physical base register */
+ movl $0x200, %ecx
+ wrmsr
+ incl %ecx /* mtrr[0] physical mask register */
+ movl $0x0000000f, %edx
+ movl $0xffffe800, %eax
+ wrmsr
+
+ movl $0x2ff, %ecx
+ xorl %edx, %edx
+ movl $0x00000800, %eax /* mtrr enable register */
+ wrmsr
+
+ movl %cr0, %eax /* clear cd & nw to enable caching */
+ andl $0x9fffffff, %eax
+ movl %eax, %cr0
+
+ TTYS0_TX_STRING($cache_ram_3)
+ /* Force data into the Dcache */
+ cld
+ movl $0xffefe000, %edi
+ movl $(8192>>2), %ecx
+ xorl %eax, %eax
+
+1:
+#if 0
+ movl (%edi), %eax
+ xorl %eax, %eax
+#endif
+ movl %eax, (%edi)
+ addl $4, %edi
+ decl %ecx
+ jnz 1b
+/* rep stosl doesn't work here. */
+
+
+ TTYS0_TX_STRING($cache_ram_4)
+ /* Lock the data into the cache */
+ movl %cr0, %eax /* set cd & nw to disable caching */
+ orl $0x60000000, %eax
+ movl %eax, %cr0
+
+ xorl %eax, %eax
+ xorl %edx, %edx
+
+ movl $0x2ff, %ecx /* mtrr enable register */
+ wrmsr
+ movl $0x200, %ecx /* mtrr[0] phyiscal base register */
+ wrmsr
+ incl %ecx /* mtrr[0] phyiscal mask register */
+ wrmsr
+
+#if 1
+ /* Do a quick test of the CACHE_RAM */
+ TTYS0_TX_STRING($cache_ram_5)
+ movl $0xfff00000, %esp
+ movl $0x12345678, %ebx
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'s')
+ TTYS0_TX_CHAR($'p')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%esp)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ push %ebx
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'s')
+ TTYS0_TX_CHAR($'p')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%esp)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ pop %ebx
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ subl $1024, %esp
+ movl %esp, %edi
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'d')
+ TTYS0_TX_CHAR($'i')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%edi)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ movl $256, %ecx
+ xorl %eax, %eax
+ rep stosl
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'d')
+ TTYS0_TX_CHAR($'i')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%edi)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ movl %esp, %esi
+ movl $512, %ecx
+ movl %esp, %edi
+ addl %ecx, %edi
+ shrl $2, %ecx
+ rep movsl
+
+ addl $1024, %esp
+
+ MEM_CALL_LABEL(cache_ram_dummy)
+#endif
+
+#endif /* USE_CACHE_RAM */
+
/* this sets up the dram. */
TTYS0_TX_STRING($ram_1)
/* Now, set registers we can set once to reasonable values */
- CALL_LABEL(ram_set_registers)
+ MEM_CALL_LABEL(ram_set_registers)
TTYS0_TX_STRING($ram_2)
/* Now set those things we can auto detect */
- CALL_LABEL(ram_set_spd_registers)
+ MEM_CALL_LABEL(ram_set_spd_registers)
TTYS0_TX_STRING($ram_3)
@@ -115,3 +298,138 @@
SPECIAL_FINISHUP()
TTYS0_TX_STRING($ram_9)
+
+#if USE_CACHE_RAM
+ TTYS0_TX_STRING($cache_ram_6)
+ /* Invalidate the cache without doing any writeback */
+ invd
+ TTYS0_TX_STRING($cache_ram_7)
+#endif /* USE_CACHE_RAM */
+
+#ifdef HAVE_ECC_RAM_SIZE
+ TTYS0_TX_STRING($ram_10)
+ CALL_LABEL(get_ecc_ram_size_ebx)
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ /* Temporarily enable the cache in write-combining mode */
+ xorl %edx, %edx
+
+ movl $0x00000001, %eax /* mtrr[0] physical base register */
+ movl $0x200, %ecx
+ wrmsr
+
+ xorl %eax, %eax /* mtrr[0] physical mask register */
+ subl %ebx, %eax /* size */
+ orl $0x800, %eax /* valid */
+ movl $0x201, %ecx
+ movl $0x0000000f, %edx
+ wrmsr
+
+ movl %eax, %ecx
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'a')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ecx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+ movl %ecx, %eax
+
+ movl $0x2ff, %ecx
+ xorl %edx, %edx
+ movl $0x00000800, %eax /* mtrr enable register */
+ wrmsr
+
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ movl %cr0, %eax /* clear cd & nw to enable caching */
+ andl $0x9fffffff, %eax
+ movl %eax, %cr0
+
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ /* Now zero the memory */
+ cld
+#if 0
+ xorl %eax, %eax /* zero */
+ xorl %edi, %edi /* destination */
+ movl $0x28000,%ecx
+ rep stosl
+
+ TTYS0_TX_CHAR($'x')
+ xorl %eax, %eax
+ movl $0x100000, %edi
+ movl %ebx, %ecx
+ subl %edi, %ecx
+ shrl $2, %ecx
+ rep stosl
+#else
+ /* Can there be anything in the 640K aka 0xa0000 memory
+ * hole at this point?
+ */
+ xorl %eax, %eax
+ xorl %edi, %edi
+ movl %ebx, %ecx
+ shrl $2, %ecx
+ rep stosl
+#endif
+
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'b')
+ TTYS0_TX_CHAR($'x')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%ebx)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ TTYS0_TX_CHAR($'e')
+ TTYS0_TX_CHAR($'d')
+ TTYS0_TX_CHAR($'i')
+ TTYS0_TX_CHAR($'=')
+ TTYS0_TX_HEX32(%edi)
+ TTYS0_TX_CHAR($'\r')
+ TTYS0_TX_CHAR($'\n')
+
+ TTYS0_TX_STRING($ram_12)
+ movl %cr0, %eax
+ orl $0x60000000, %eax /* set cd & nw to disable caching */
+ movl %eax, %cr0
+
+ movl $0x2ff, %ecx
+ xorl %edx, %edx
+ xorl %eax, %eax /* mtrr enable register */
+ wrmsr
+ movl $0x200, %ecx /* mtrr[0] physical base register */
+ wrmsr
+ incl %ecx /* mtrr[0] physical mask register */
+ wrmsr
+ invd
+ TTYS0_TX_STRING($ram_13)
+#endif /* HAVE_ECC_RAM_SIZE */
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/ali/m1543/Config freebios/src/southbridge/ali/m1543/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/ali/m1543/Config Wed Dec 31 17:00:00 1969
+++ freebios/src/southbridge/ali/m1543/Config Sat Mar 17 02:12:07 2001
@@ -0,0 +1,2 @@
+object setup_serial.o
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/ali/m1543/setup_serial.c freebios/src/southbridge/ali/m1543/setup_serial.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/ali/m1543/setup_serial.c Wed Dec 31 17:00:00 1969
+++ freebios/src/southbridge/ali/m1543/setup_serial.c Tue Mar 20 14:45:22 2001
@@ -0,0 +1,43 @@
+#include <stdint.h>
+#include <arch/io.h>
+
+void enable_serial(void)
+{
+ const uint16_t config_port = 0x3f0; /* can be 0x370 */
+ /* enter configuration mode */
+ outb(0x51, config_port);
+ outb(0x23, config_port);
+
+ /* program logical device 4 */
+ outb(0x07, config_port);
+ outb(0x04, config_port+1);
+
+ /* enable uart1 */
+ outb(0x30, config_port);
+ outb(0x01, config_port+1);
+
+ /* select uart1 I/O base of 0x3f8 */
+ outb(0x60, config_port);
+ outb(0x03, config_port+1);
+ outb(0x61, config_port);
+ outb(0xf8, config_port+1);
+
+ /* select uart1 irq 4 */
+ outb(0x70, config_port);
+ outb(0x04, config_port+1);
+
+ /* select uart1 normal (not highspeed) mode */
+ outb(0xf0, config_port);
+ outb(0x00, config_port+1);
+
+ /* select uart1 normal (not IR) mode */
+ outb(0xf1, config_port);
+ outb(0x00, config_port+1);
+
+ /* select uart1 normal (no IR params) */
+ outb(0xf2, config_port);
+ outb(0x00, config_port+1);
+
+ /* exit configuration mode */
+ outb(0xbb, config_port);
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/intel/piix4e/southbridge.c freebios/src/southbridge/intel/piix4e/southbridge.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/southbridge/intel/piix4e/southbridge.c Thu Feb 8 09:17:38 2001
+++ freebios/src/southbridge/intel/piix4e/southbridge.c Thu Mar 15 12:41:39 2001
@@ -1,6 +1,7 @@
#include <pci.h>
#include <pc80/keyboard.h>
#include <printk.h>
+#include <subr.h>
void
southbridge_fixup()
@@ -27,7 +28,7 @@
if (pcidev) pci_write_config_word(pcidev, 0x4e, 0x03c3);
printk(KERN_INFO "done.\n");
- intel_post(0x91);
+ post_code(0x91);
}
// Have to talk to Eric Beiderman about this ...
@@ -37,7 +38,7 @@
#ifdef NO_KEYBOARD
void keyboard_on()
{
- intel_post(0x94);
+ post_code(0x94);
}
#else
void keyboard_on()
@@ -80,6 +81,6 @@
/* now keyboard should work, ha ha. */
pc_keyboard_init();
- intel_post(0x94);
+ post_code(0x94);
}
#endif
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/superio/NSC/pc87309/setup_serial.inc freebios/src/superio/NSC/pc87309/setup_serial.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/superio/NSC/pc87309/setup_serial.inc Wed Dec 31 17:00:00 1969
+++ freebios/src/superio/NSC/pc87309/setup_serial.inc Mon Jan 22 19:28:44 2001
@@ -0,0 +1,47 @@
+/*
+ * Enable the peripheral devices on the NSC Super IO chip PC87309
+ * For now this is specific to the L440GX motherboard.
+ */
+
+
+/* The base address is 0x15c, 0x2e, depending on config bytes */
+
+#define SIO_BASE $0x2e
+#define SIO_INDEX SIO_BASE
+#define SIO_DATA SIO_BASE+1
+
+#define SIO_READ(ldn, index) \
+ mov SIO_BASE, %dx ; \
+ mov $0x07, %al ; \
+ outb %al, %dx ; \
+ inc %dx ; \
+ mov ldn, %al ; \
+ outb %al, %dx ; \
+ dec %dx ; \
+ mov index, %al ; \
+ outb %al, %dx ; \
+ inc %dx ; \
+ inb %dx, %al ;
+
+#define SIO_WRITE(ldn, index, data) \
+ mov SIO_BASE, %dx ; \
+ mov $0x07, %al ; \
+ outb %al, %dx ; \
+ inc %dx ; \
+ mov ldn, %al ; \
+ outb %al, %dx ; \
+ dec %dx ; \
+ mov index, %al ; \
+ outb %al, %dx ; \
+ inc %dx ; \
+ mov data, %al ; \
+ outb %al, %dx ;
+
+
+ /* At boot up the chip is in configure mode so don't worry
+ * about getting it there just configure some peripherals.
+ */
+
+ /* enable serial 1 */
+ SIO_WRITE($0x03, $0x30, $0x01)
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/src/superio/NSC/pc87309/superio.inc freebios/src/superio/NSC/pc87309/superio.inc
--- BEFORE_ERIC_MAJOR_MERGE/freebios/src/superio/NSC/pc87309/superio.inc Tue Oct 31 20:54:54 2000
+++ freebios/src/superio/NSC/pc87309/superio.inc Wed Dec 31 17:00:00 1969
@@ -1,47 +0,0 @@
-/*
- * Enable the peripheral devices on the NSC Super IO chip PC87309
- * For now this is specific to the L440GX motherboard.
- */
-
-
-/* The base address is 0x15c, 0x2e, depending on config bytes */
-
-#define SIO_BASE $0x2e
-#define SIO_INDEX SIO_BASE
-#define SIO_DATA SIO_BASE+1
-
-#define SIO_READ(ldn, index) \
- mov SIO_BASE, %dx ; \
- mov $0x07, %al ; \
- outb %al, %dx ; \
- inc %dx ; \
- mov ldn, %al ; \
- outb %al, %dx ; \
- dec %dx ; \
- mov index, %al ; \
- outb %al, %dx ; \
- inc %dx ; \
- inb %dx, %al ;
-
-#define SIO_WRITE(ldn, index, data) \
- mov SIO_BASE, %dx ; \
- mov $0x07, %al ; \
- outb %al, %dx ; \
- inc %dx ; \
- mov ldn, %al ; \
- outb %al, %dx ; \
- dec %dx ; \
- mov index, %al ; \
- outb %al, %dx ; \
- inc %dx ; \
- mov data, %al ; \
- outb %al, %dx ;
-
-
- /* At boot up the chip is in configure mode so don't worry
- * about getting it there just configure some peripherals.
- */
-
- /* enable serial 1 */
- SIO_WRITE($0x03, $0x30, $0x01)
-
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/Config freebios/util/alpha-common/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/Config Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/Config Fri Mar 16 13:44:42 2001
@@ -0,0 +1,9 @@
+
+makerule commlib.a: disassm.o romhead.o ; rm -f commlib.a
+addaction commlib.a ar cr commlib.a disassm.o romhead.o
+addaction commlib.a ar ts commlib.a > /dev/null
+
+
+makerule disassm.o: $(TOP)/util/alpha-common/disassm.c ; $(CC) -g -O -I$(TOP)/util/alpha-common -I$(TOP)/util/alpha-common/include -c $(TOP)/util/alpha-common/disassm.c
+
+makerule romhead.o: $(TOP)/util/alpha-common/romhead.c ; $(CC) -g -O -I$(TOP)/util/alpha-common -I$(TOP)/util/alpha-common/include -c $(TOP)/util/alpha-common/romhead.c
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/Makefile freebios/util/alpha-common/Makefile
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/Makefile Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/Makefile Fri Mar 16 13:32:23 2001
@@ -0,0 +1,41 @@
+#Genmake v1.1 01/09/92 Copyright(c) 1990,'91,'92 by Kyle Saunders
+CC= cc
+CFLAGS= -g -O -I. -I../include
+LFLAGS= -lc
+
+TOUCH = /usr/bin/touch
+
+#
+install: commlib.a
+
+commlib.a: disassm.o romhead.o
+ -rm -f commlib.a
+ ar cr commlib.a disassm.o romhead.o
+ ar ts commlib.a >/dev/null
+
+disassm.o: disassm.c
+ $(CC) $(CFLAGS) -c disassm.c
+
+romhead.o: romhead.c
+ $(CC) $(CFLAGS) -c romhead.c
+
+depend: disassm.c romhead.c
+ makedepend -f $(MAKEFILE) -- $(CFLAGS) -- disassm.c romhead.c
+
+clean:
+ rm -f *.o *~ \#*\# *.bak core
+
+# DO NOT DELETE THIS LINE -- make depend depends on it.
+
+disassm.o: /usr/include/stdio.h /usr/include/libio.h /usr/include/_G_config.h
+disassm.o: /usr/include/ctype.h /usr/include/features.h
+disassm.o: /usr/include/sys/cdefs.h /usr/include/string.h
+disassm.o: /usr//include/linux/stddef.h
+disassm.o: /usr/include/stdlib.h /usr/include/errno.h
+disassm.o: /usr/include/linux/errno.h /usr/include/asm/errno.h
+disassm.o: /usr/include/alloca.h
+romhead.o: /usr/include/stdlib.h /usr/include/features.h
+romhead.o: /usr/include/sys/cdefs.h
+romhead.o: /usr/include/errno.h /usr/include/linux/errno.h
+romhead.o: /usr/include/asm/errno.h
+romhead.o: /usr/include/alloca.h
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/c_32_64.c freebios/util/alpha-common/c_32_64.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/c_32_64.c Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/c_32_64.c Fri Mar 16 13:32:23 2001
@@ -0,0 +1,93 @@
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+
+#include "c_32_64.h"
+
+int64 zero = {0,0};
+
+/* taken from my simulator */
+
+/* add an unsigned int32 to a int64 */
+#define add_l_ui(r,l,i) \
+ { \
+ register unsigned int32 lp, hp, carry; \
+ lp = (low32(l) & 0xffff) + ((i) & 0xffff); \
+ carry = lp >> 16; \
+ hp = (((unsigned)low32(l)) >> 16) + (((unsigned)i) >> 16) + carry;\
+ carry = hp >> 16; \
+ low32(r) = (hp << 16) | (lp & 0xffff); \
+ high32(r) = high32(l) + carry; \
+ }
+
+/* add to int64s */
+#define add_l_l(r,a,b) \
+ { \
+ register unsigned int32 lp, hp, carry; \
+ lp = (low32(a) & 0xffff) + (low32(b) & 0xffff); \
+ carry = lp >> 16; \
+ hp = (((unsigned)low32(a))>>16) + (((unsigned)low32(b))>>16) + carry;\
+ carry = hp >> 16; \
+ low32(r) = (hp << 16) | (lp & 0xffff); \
+ /* now the hi part */ \
+ lp = (high32(a) & 0xffff) + (high32(b) & 0xffff) + carry; \
+ carry = lp >> 16; \
+ hp = (((unsigned)high32(a))>>16) + (((unsigned)high32(b))>>16) + carry;\
+ high32(r) = (hp << 16) | (lp & 0xffff); \
+ }
+
+/* add an int32 to a int64 */
+#define add_l_i(r,l,i) \
+ { \
+ if (i == 0) { \
+ low32(r) = low32(l); high32(r) = high32(l); \
+ } else if (i > 0) { \
+ add_l_ui(r,l,i); \
+ } else { \
+ int64 m; \
+ low32(m) = i; high32(m) = -1; \
+ add_l_l(r,l,m); \
+ } \
+ }
+
+/* sub two int64s */
+#define sub_l_l(r,a,b) \
+ { \
+ register unsigned int32 lp, hp, carry; \
+ lp = (low32(a) & 0xffff) + ((~low32(b)) & 0xffff) + 1; \
+ carry = lp >> 16; \
+ hp = (((unsigned)low32(a))>>16) + ((~(unsigned)low32(b))>>16) + carry;\
+ carry = hp >> 16; \
+ low32(r) = (hp << 16) | (lp & 0xffff); \
+ /* now the hi part */ \
+ lp = (high32(a) & 0xffff) + ((~high32(b)) & 0xffff) + carry; \
+ carry = lp >> 16; \
+ hp = (((unsigned)high32(a))>>16) + ((~(unsigned)high32(b))>>16) + carry;\
+ high32(r) = (hp << 16) | (lp & 0xffff); \
+ }
+
+int64 plus(a,b)
+ int64 a,b;
+{
+ int64 c;
+ add_l_l(c,a,b);
+ return c;
+}
+
+int64 plus_a_32(a,b)
+ int64 a;
+ int32 b;
+{
+ int64 c;
+ add_l_i(c,a,b);
+ return c;
+}
+
+int64 minus(a,b)
+ int64 a,b;
+{
+ int64 c;
+ sub_l_l(c,a,b);
+ return c;
+}
+
+#endif /* CROSS_COMPILE_32_TO_64_BITS */
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/disassm.c freebios/util/alpha-common/disassm.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/disassm.c Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/disassm.c Fri Mar 16 13:32:23 2001
@@ -0,0 +1,425 @@
+#ifndef lint
+static char *RCSid = "$Id: disassm.c,v 1.1 2000/03/21 03:56:31 stepan Exp $";
+#endif
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+/*
+**
+** FACILITY:
+**
+** ED64 Software Tools - 21064 Disassembler.
+**
+** FUNCTIONAL DESCRIPTION:
+**
+** Common code used by many utilities to disassemble
+** 21064 object code.
+**
+** CALLING ENVIRONMENT:
+**
+** user mode
+**
+** AUTHOR: Anthony Berent
+**
+** CREATION-DATE: NOV-1992
+**
+** MODIFIED BY:
+**
+**
+** $Log: disassm.c,v $
+** Revision 1.1 2000/03/21 03:56:31 stepan
+** Check in current version which is a nearly a 2.2-16
+**
+ * Revision 4.2 1994/08/06 00:00:00 fdh
+ * Updated Copyright header
+ *
+ * Revision 4.1 1994/07/18 09:42:34 rusling
+ * Fixed WNT compile warnings.
+ *
+**
+**
+** AB Nov-1992 First version.
+*/
+#include <stdio.h>
+#include <ctype.h>
+#include <string.h>
+#include <stdlib.h>
+#include "alpha_op.h"
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+/*==============================*/
+/* Masks for instruction fields */
+/*==============================*/
+
+/* Masks used to recognise the instruction */
+
+#define OPCODE_MASK 0xFC000000
+#define IMMEDIATE_MASK 0x00001000
+#define JUMP_FUNCTION_MASK 0x0000C000
+#define MEMORY_FUNCTION_MASK 0x0000FFFF
+#define INTEGER_OPERATE_FUNCTION_MASK 0x00000FE0
+#define FPOINT_OPERATE_FUNCTION_MASK 0x0000FFE0
+#define HW_MODE_BITS_MASK 0x0000F000
+#define HW_REG_SET_MASK 0x000000E0
+
+/* Masks used to find arguments */
+#define RA_MASK 0x03E00000
+#define RB_MASK 0x001F0000
+#define RC_MASK 0x0000001F
+#define MEM_DISP_MASK 0x0000FFFF
+#define HW_MEM_DISP_MASK 0x00000FFF
+#define JUMP_HINT_MASK 0x00003FFF
+#define BRANCH_DISP_MASK 0x001FFFFF
+#define LITERAL_MASK 0x001FE000
+#define PALCODE_FUNCTION_MASK 0x03FFFFFF
+#define INTEGER_OPERATE_SBZ_MASK 0x0000E000
+#define MXPR_DISPLACEMENT_MASK 0x0000000F
+
+/* Shifts for arguments */
+
+#define RA_SHIFT 21
+#define RB_SHIFT 16
+#define RC_SHIFT 0
+#define MEM_DISP_SHIFT 0
+#define HW_MEM_DISP_SHIFT 0
+#define JUMP_HINT_SHIFT 0
+#define BRANCH_DISP_SHIFT 0
+#define LITERAL_SHIFT 13
+#define PALCODE_FUNCTION_SHIFT 0
+
+
+/* Function to search for a instruction in the opcode table */
+struct alpha_opcode *find_opcode(unsigned int instruction)
+{
+ struct alpha_opcode *opcodedata = 0;
+ int i;
+
+ /* Search the opcode table */
+ for (i = 0; i < NUMOPCODES; i++)
+ {
+
+ /* Check if the function code matches */
+ if ((alpha_opcodes[i].match & OPCODE_MASK) ==
+ (instruction & OPCODE_MASK))
+ {
+
+ /* opcode matches so this is a candidate; check what arguments it
+ * takes to work out whether */
+ /* a function code has to match */
+ if (strcmp(alpha_opcodes[i].args, "1,l(2)") == 0 ||
+ strcmp(alpha_opcodes[i].args, "e,l(2)") == 0 ||
+ strcmp(alpha_opcodes[i].args, "1,L") == 0)
+ {
+
+ /* Memory or branch format without function code */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ else if (strcmp(alpha_opcodes[i].args, "1,(2),i") == 0)
+ {
+
+ /* Jump (Memory format branch) format; check the jump function
+ * mask */
+ if ((alpha_opcodes[i].match & JUMP_FUNCTION_MASK) ==
+ (instruction & JUMP_FUNCTION_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "1,t(2)") == 0)
+ {
+
+ /* EV4 hardware memory access format format; check the mode
+ * bits */
+ if ((alpha_opcodes[i].match & HW_MODE_BITS_MASK) ==
+ (instruction & HW_MODE_BITS_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "R,3") == 0)
+ {
+
+ /* EV4 internal register access format format; check the
+ * register set mask */
+ if ((alpha_opcodes[i].match & HW_REG_SET_MASK) ==
+ (instruction & HW_REG_SET_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "R,8") == 0)
+ {
+
+ /* EV4 internal register access format format; check the
+ * register set mask */
+ if ((alpha_opcodes[i].match & HW_REG_SET_MASK)
+ == (instruction & HW_REG_SET_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "1,2,3") == 0 ||
+ strcmp(alpha_opcodes[i].args, "1,b,3") == 0)
+ {
+
+ /* Operate format; check immediate bit and function code */
+ if ((alpha_opcodes[i].match & IMMEDIATE_MASK) ==
+ (instruction & IMMEDIATE_MASK) &&
+ (alpha_opcodes[i].match & INTEGER_OPERATE_FUNCTION_MASK) ==
+ (instruction & INTEGER_OPERATE_FUNCTION_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "e,f,g") == 0 ||
+ strcmp(alpha_opcodes[i].args, "f,g") == 0)
+ {
+
+ /* Operate format; check immediate bit and function mask */
+ if ((alpha_opcodes[i].match & FPOINT_OPERATE_FUNCTION_MASK) ==
+ (instruction & FPOINT_OPERATE_FUNCTION_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "I") == 0)
+ {
+
+ /* We have found a PAL code call instruction - there may a more
+ * precise opcode defined */
+ /* so only use this code if we have not already found a match
+ */
+
+ if (opcodedata == 0)
+ opcodedata = &alpha_opcodes[i];
+
+ /* Don't exit the loop; there may be a more precise match yet */
+ }
+ else if (strcmp(alpha_opcodes[i].args, "0(2)") == 0)
+ {
+
+ /* Miscellaneous instructions - Memory format with function
+ * code*/
+ if ((alpha_opcodes[i].match & MEMORY_FUNCTION_MASK) ==
+ (instruction & MEMORY_FUNCTION_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+ else if (strcmp(alpha_opcodes[i].args, "1") == 0)
+ {
+
+ /* Miscellaneous instructions - Memory format with function
+ * code but different arguments */
+ if ((alpha_opcodes[i].match & MEMORY_FUNCTION_MASK) ==
+ (instruction & MEMORY_FUNCTION_MASK))
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+
+ else if (strcmp(alpha_opcodes[i].args, "") == 0)
+ {
+
+ /* Miscellaneous instructions with no arguments; should be
+ * exact match */
+ if (alpha_opcodes[i].match == instruction)
+ {
+
+ /* This is what we want */
+ opcodedata = &alpha_opcodes[i];
+ break;
+ }
+ }
+
+ /* All other cases are only used for predefined macros and
+ * psedo-instructions; ignore them */
+ }
+ }
+
+ /* Return the opcode data; it will be null if a match hasn't been found */
+ return opcodedata;
+}
+/* Function to print an instruction and arguments */
+void print_instruction(int instruction, FILE *stream)
+{
+ struct alpha_opcode *opcodedata;
+ char *argptr;
+ int duplicate_reg_bad = FALSE;
+ int bad_reg_id;
+ char bad_reg_name;
+
+
+ /* Try to find it in the opcode table */
+ opcodedata = find_opcode(instruction);
+ if (opcodedata == 0)
+ {
+ fprintf(stream, "\t# BAD INSTRUCTION 0x%08x \n", instruction);
+ return;
+ }
+
+ /* Print the instruction name */
+ fprintf(stream, "\t%s\t", opcodedata->name);
+
+ /* Now scan its arguments */
+ argptr = opcodedata->args;
+
+ while (*argptr != 0)
+ {
+ switch (*argptr)
+ {
+
+ /* Real argument types */
+ case '1':
+ case 'e':
+ fprintf(stream, "$%i", (instruction & RA_MASK) >> RA_SHIFT);
+ break;
+ case '2':
+ case 'f':
+ fprintf(stream, "$%i", (instruction & RB_MASK) >> RB_SHIFT);
+ break;
+ case '3':
+ case 'g':
+ fprintf(stream, "$%i", (instruction & RC_MASK) >> RC_SHIFT);
+ break;
+ case 'r':
+ fprintf(stream, "$%i", (instruction & RA_MASK) >> RA_SHIFT);
+ if (((instruction & RC_MASK) >> RC_SHIFT) !=
+ ((instruction & RA_MASK) >> RA_SHIFT))
+ {
+ duplicate_reg_bad = TRUE;
+ bad_reg_name = 'C';
+ bad_reg_id = (instruction & RC_MASK) >> RC_SHIFT;
+ }
+ break;
+ case 'R':
+ fprintf(stream, "$%i", (instruction & RA_MASK) >> RA_SHIFT);
+ if (((instruction & RB_MASK) >> RB_SHIFT) !=
+ ((instruction & RA_MASK) >> RA_SHIFT))
+ {
+ duplicate_reg_bad = TRUE;
+ bad_reg_name = 'B';
+ bad_reg_id = (instruction & RB_MASK) >> RB_SHIFT;
+ }
+ break;
+ case 'I':
+ fprintf(stream, "0x%07x", (instruction &
+ PALCODE_FUNCTION_MASK) >> PALCODE_FUNCTION_SHIFT);
+ break;
+ case 'l':
+ fprintf(stream, "0x%04x",
+ (instruction & MEM_DISP_MASK) >> MEM_DISP_SHIFT);
+ break;
+ case 'h':
+ fprintf(stream, "0x%04x",
+ ((instruction & MEM_DISP_MASK) >> MEM_DISP_SHIFT) << 16);
+ break;
+ case 't':
+
+ /* Special for EV4 hardware load/store instructions */
+ fprintf(stream, "0x%04x",
+ ((instruction & HW_MEM_DISP_MASK) >> HW_MEM_DISP_SHIFT));
+ break;
+ case 'L':
+ fprintf(stream, ".+0x%08x",
+ ((instruction & BRANCH_DISP_MASK) >> BRANCH_DISP_SHIFT) * 4);
+ break;
+ case 'i':
+ fprintf(stream, ".+0x%06x",
+ ((instruction & JUMP_HINT_MASK) >> JUMP_HINT_SHIFT) * 4);
+ break;
+ case 'b':
+ fprintf(stream, "0x%02x",
+ (instruction & LITERAL_MASK) >> LITERAL_SHIFT);
+ break;
+ case '8':
+ fprintf(stream, "0x%02x",
+ (instruction & MXPR_DISPLACEMENT_MASK));
+ break;
+
+ /* All other possible characters are punctuation; print what we are
+ * given */
+ default:
+ fprintf(stream, "%c", *argptr);
+ }
+ argptr++;
+ }
+
+ /* Check for some special cases where fields must be zero etc. */
+ if (strcmp(opcodedata->args, "1,2,3") == 0)
+ {
+ if ((instruction & INTEGER_OPERATE_SBZ_MASK) != 0)
+ {
+ fprintf(stream, " WARNING: SBZ field not zero");
+ }
+ }
+ else if (strcmp(opcodedata->args, "f,g") == 0)
+ {
+ if ((instruction & RA_MASK) != RA_MASK)
+ {
+ fprintf(stream, " WARNING: RA field not $31");
+ }
+ }
+
+ if (duplicate_reg_bad)
+ {
+ fprintf(stream,
+ " WARNING: R%c register field does not match RA - value %i",
+ bad_reg_name, bad_reg_id);
+ }
+}
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/Makefile freebios/util/alpha-common/include/Makefile
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/Makefile Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/Makefile Fri Mar 16 13:33:32 2001
@@ -0,0 +1,6 @@
+install depend:
+
+clean:
+ rm -f *.o *~ \#*\# *.bak *.a core
+ rcsclean
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/a_out.h freebios/util/alpha-common/include/a_out.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/a_out.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/a_out.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,215 @@
+/*
+ * HISTORY
+ * $Log: a_out.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 4.0 1993/10/18 15:37:42 rusling
+ * Include file.
+ *
+ */
+#ifndef _A_OUT_H_
+#define _A_OUT_H_ 1
+/* This file describes the a.out file format
+ Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+
+ /* Alpha's a.out. . . */
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+#include "c_32_64.h"
+typedef int32 boolean_t;
+#else
+#include <mach/std_types.h>
+#endif
+
+#if __osf__
+typedef long integer_t;
+#endif
+
+
+struct exec {
+ integer_t a_magic; /* Use macros N_MAGIC, etc for access */
+ vm_size_t a_text; /* bytes of text in file */
+ vm_size_t a_data; /* bytes of data in file */
+ vm_size_t a_bss; /* bytes of auto-zeroed data */
+ vm_size_t a_syms; /* bytes of symbol table data in file */
+ vm_offset_t a_entry; /* start PC */
+ vm_offset_t a_tstart; /* text start, in memory */
+ vm_offset_t a_dstart; /* data start, in memory */
+ vm_size_t a_trsize; /* bytes of text-relocation info in file */
+ vm_size_t a_drsize; /* bytes of data-relocation info in file */
+};
+
+#define __LDPGSZ 8192
+
+#ifndef OMAGIC
+#define OMAGIC 0407
+#define NMAGIC 0410
+#define ZMAGIC 0413
+#endif
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+
+#define N_BADMAG(x) \
+ (((x).a_magic.low)!=OMAGIC && ((x).a_magic.low)!=NMAGIC && ((x).a_magic.low)!=ZMAGIC)
+/* Address of the bottom of the text segment. */
+#define N_TXTADDR(x) \
+ ((x).a_tstart.low)
+
+/* Address of the bottom of the data segment. */
+#define N_DATADDR(x) \
+ ((x).a_dstart.low)
+
+/* Text segment offset. */
+#define N_TXTOFF(ex) \
+ ((ex).a_magic.low == ZMAGIC ? 0 : sizeof(struct exec))
+
+/* Data segment offset. */
+#define N_DATOFF(ex) \
+ ((N_TXTOFF(ex)) + ((ex).a_magic.low != ZMAGIC ? (ex).a_text.low : \
+ __LDPGSZ + ((ex).a_text.low - 1 & ~(__LDPGSZ - 1))))
+
+/* Symbol table offset. */
+#define N_SYMOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low + (x).a_trsize.low + (x).a_drsize.low)
+
+#define N_STROFF(x) \
+ (N_SYMOFF(x) + (x).a_syms.low)
+
+/* text relocation offset */
+#define N_TRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low)
+
+/* data relocation offset */
+#define N_DRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low + (x).a_trsize.low)
+
+#else
+
+#define N_BADMAG(x) \
+ (((x).a_magic)!=OMAGIC && ((x).a_magic)!=NMAGIC && ((x).a_magic)!=ZMAGIC)
+
+/* Address of the bottom of the text segment. */
+#define N_TXTADDR(x) \
+ ((x).a_tstart)
+
+/* Address of the bottom of the data segment. */
+#define N_DATADDR(x) \
+ ((x).a_dstart)
+
+/* Text segment offset. */
+#define N_TXTOFF(ex) \
+ ((ex).a_magic == ZMAGIC ? 0 : sizeof(struct exec))
+
+/* Data segment offset. */
+#define N_DATOFF(ex) \
+ ((N_TXTOFF(ex)) + ((ex).a_magic != ZMAGIC ? (ex).a_text : \
+ __LDPGSZ + ((ex).a_text - 1 & ~(__LDPGSZ - 1))))
+
+/* Symbol table offset. */
+#define N_SYMOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data + (x).a_trsize + (x).a_drsize)
+
+#define N_STROFF(x) \
+ (N_SYMOFF(x) + (x).a_syms)
+
+/* text relocation offset */
+#define N_TRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data)
+
+/* data relocation offset */
+#define N_DRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data + (x).a_trsize)
+
+#endif
+
+struct nlist {
+ union {
+ char *n_name;
+ struct nlist *n_next;
+ long n_strx;
+ vm_offset_t n_pad_cross_compile;
+ } n_un;
+ char n_type;
+ char n_other;
+ short n_desc;
+ int n_pad;
+ vm_offset_t n_value;
+};
+
+#define N_UNDF 0x0
+#define N_ABS 0x2
+#define N_TEXT 0x4
+#define N_DATA 0x6
+#define N_BSS 0x8
+#define N_COMM 0x12
+#define N_FN 0x1f
+#define N_EXT 0x1
+#define N_TYPE 0x1e
+#define N_STAB 0xe0
+
+#define N_FORMAT "%016lx"
+
+enum reloc_type
+{
+ RELOC_0_7, RELOC_0_15, RELOC_0_31, RELOC_0_63,
+ RELOC_0_25, RELOC_16_31, RELOC_WDISP21, RELOC_BASE21,
+ RELOC_WDISP14, RELOC_BASE14, RELOC_32_47, RELOC_48_63,
+ RELOC_U_16_31, RELOC_U_32_47, RELOC_U_48_63, RELOC_0_12,
+ RELOC_0_8,
+
+ NO_RELOC,
+
+ BRELOC_0_15, BRELOC_0_31, BRELOC_16_31,
+ BRSET_0_15, BRSET_16_31
+};
+
+struct relocation_info {
+ vm_offset_t r_address;
+ unsigned int r_index;
+ unsigned char r_extern;
+ enum reloc_type r_type : 8;
+#ifdef VMS_HOST
+ short pad;
+#endif
+ integer_t r_addend;
+};
+
+/* The following constants are used for actually emitting relocation
+ * information on Alpha. The relocation_info structure can't be used
+ * directly because the NT compiler alligns structure members in strange
+ * ways (it appears to allign all members, including fields, on 4 byte
+ * boundries.).
+ */
+
+#define R_ADDRESS_OFFSET 0
+#define R_ADDRESS_SIZE 8
+#define R_INDEX_OFFSET 8
+#define R_INDEX_SIZE 4
+#define R_EXTERN_OFFSET 12
+#define R_EXTERN_SIZE 1
+#define R_TYPE_OFFSET 13
+#define R_TYPE_SIZE 1
+#define R_ADDEND_OFFSET 16
+#define R_ADDEND_SIZE 8
+#define RELOCATION_INFO_SIZE 24
+
+#endif /* _A_OUT_H_ */
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/alpha_op.h freebios/util/alpha-common/include/alpha_op.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/alpha_op.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/alpha_op.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,785 @@
+/* Table of opcodes for the alpha.
+ Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
+
+GAS/GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS/GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS or GDB; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#if !defined(__STDC__) && !defined(const)
+#define const
+#endif
+
+/*
+ * Structure of an opcode table entry.
+ */
+struct alpha_opcode
+{
+ const char *name;
+ const unsigned int match; /* fixed encoding part of instruction */
+ const int isa_float;
+ const char *args;
+};
+
+/*
+ All alpha opcodes are 32 bits, except for the `set' instruction (really
+ a macro), which is 64 bits. It is handled as a special case.
+
+ The match component is a mask saying which bits must match a
+ particular opcode in order for an instruction to be an instance
+ of that opcode.
+
+ The args component is a string containing one character
+ for each operand of the instruction.
+
+Kinds of operands:
+ 1 ra register
+ 2 rb register
+ 3 rc register
+ r same register for ra and rc
+ R same register for ra and rb
+ e fa floating point register.
+ f fb floating point register.
+ g fc floating point register.
+ I 26 bit immediate
+ l 16 low bits of immediate
+ h 16 high(er) bits of immediate why ?
+ L 22 bit PC relative immediate.
+ i 14 bit PC relative immediate.
+ b 8 bit literal
+ G Base-register GET at address, needs macro-expansion
+ P Base-register PUT at address, needs macro-expansion
+ Bn builtin macro
+ t twelve bit displacement
+ 8 eight bit index
+
+Syntactic elements
+ (
+ ) base register in "offset(base)" addressing
+ , separator
+
+Builtin functions (look like macros to the programmer)
+ %br the current base register
+ la %r,A load the (64bit) address in register %r
+ li %r,N load the constant N in register %r
+ lo(A) low 16 bits of Address (relocatable)
+ uml(A) med-low 16 bits, unchanged
+ umh(A) med-high 16 bits, unchanged
+ uhi(A) high 16 bits, unchanged
+ ml(A) med-low, adjusted viz sign of lo(A)
+ mh(A) med-high, adjusted viz sign of ml(A)
+ hi(A) high, adjusted viz sign of mh(A)
+
+*/
+
+/* The order of the opcodes in this table is significant:
+
+ * The assembler requires that all instances of the same mnemonic must be
+ consecutive. If they aren't, the assembler will bomb at runtime.
+
+ * The disassembler should not care about the order of the opcodes. */
+
+static struct alpha_opcode alpha_opcodes[] =
+{
+
+{ "ldgp", 0x00000000, 0, "3,l(1)Ba" }, /* builtin */
+{ "setgp", 0x00000000, 0, "0(1)Bb" }, /* builtin */
+
+{ "reml", 0x00000000, 0, "1,2,3B0" }, /* builtin */
+{ "divl", 0x00000000, 0, "1,2,3B1" }, /* builtin */
+{ "remq", 0x00000000, 0, "1,2,3B2" }, /* builtin */
+{ "divq", 0x00000000, 0, "1,2,3B3" }, /* builtin */
+{ "remlu", 0x00000000, 0, "1,2,3B4" }, /* builtin */
+{ "divlu", 0x00000000, 0, "1,2,3B5" }, /* builtin */
+{ "remqu", 0x00000000, 0, "1,2,3B6" }, /* builtin */
+{ "divqu", 0x00000000, 0, "1,2,3B7" }, /* builtin */
+
+{ "lda", 0x20000000, 0, "1,l(2)" }, /* 6o+5a+5b+16d */
+{ "lda", 0x20000000, 0, "1,G" }, /* regbase macro */
+{ "ldi", 0x2010FFFF, 0, "1,l"}, /* ldi ra,lit == lda ra,lit(r31) */
+{ "ldah", 0x24000000, 0, "1,l(2)" },
+{ "ldah", 0x24000000, 0, "1,G" }, /* regbase macro */
+{ "lui", 0x2410FFFF, 0, "1,l"}, /* lui ra,lit == ldah ra,lit(r31) */
+{ "ldil", 0x20000000, 0, "1,G" }, /* macro */
+{ "ldiq", 0x20000000, 0, "1,G" }, /* (broken) macro */
+
+{ "ldl", 0xa0000000, 0, "1,l(2)" },
+{ "ldl", 0xa0000000, 0, "1,G" }, /* regbase macro */
+{ "ldl_l", 0xa8000000, 0, "1,l(2)" },
+{ "ldl_l", 0xa8000000, 0, "1,G" }, /* regbase macro */
+{ "ldq", 0xa4000000, 0, "1,l(2)" },
+{ "ldq", 0xa4000000, 0, "1,G" }, /* regbase macro */
+{ "ldq_u", 0x2c000000, 0, "1,l(2)" },
+{ "ldq_u", 0x2c000000, 0, "1,G" }, /* regbase macro */
+{ "ldq_l", 0xac000000, 0, "1,l(2)" },
+{ "ldq_l", 0xac000000, 0, "1,G" }, /* regbase macro */
+
+{ "stl", 0xb0000000, 0, "1,l(2)" },
+{ "stl", 0xb0000000, 0, "1,P" }, /* regbase macro */
+{ "stl_c", 0xb8000000, 0, "1,l(2)" },
+{ "stl_c", 0xb8000000, 0, "1,P" }, /* regbase macro */
+{ "stq", 0xb4000000, 0, "1,l(2)" },
+{ "stq", 0xb4000000, 0, "1,P" }, /* regbase macro */
+{ "stq_u", 0x3c000000, 0, "1,l(2)" },
+{ "stq_u", 0x3c000000, 0, "1,P" }, /* regbase macro */
+{ "stq_c", 0xbc000000, 0, "1,l(2)" },
+{ "stq_c", 0xbc000000, 0, "1,P" }, /* regbase macro */
+
+{ "beq", 0xe4000000, 0, "1,L" }, /* 6o+5a+21d */
+{ "bne", 0xf4000000, 0, "1,L" },
+{ "blt", 0xe8000000, 0, "1,L" },
+{ "ble", 0xec000000, 0, "1,L" },
+{ "bgt", 0xfc000000, 0, "1,L" },
+{ "bge", 0xf8000000, 0, "1,L" },
+{ "blbc", 0xe0000000, 0, "1,L" },
+{ "blbs", 0xf0000000, 0, "1,L" },
+
+{ "br", 0xc0000000, 0, "1,L" },
+{ "br", 0xc3e00000, 0, "L" }, /* macro: br zero,disp */
+{ "bsr", 0xd0000000, 0, "1,L" },
+{ "bsr", 0xd3500000, 0, "L" }, /* macro: bsr $ra,L */
+
+{ "jmp", 0x68000000, 0, "1,(2),i" }, /* 6o+5a+5b+2A+14d */
+{ "jmp", 0x68000000, 0, "1,(2)" },
+{ "jsr", 0x68004000, 0, "1,(2),i" },
+{ "jsr", 0x68004000, 0, "1,(2)" },
+{ "jsr", 0x68004000, 0, "1,Bc" }, /* macro: lda $pv,L;jsr .. */
+
+{ "ret", 0x68008000, 0, "1,(2),i" },
+{ "ret", 0x68008000, 0, "1,(2)" },
+{ "ret", 0x6b5a8000, 0, "" }, /* macro: ret ra,(ra) */
+{ "ret", 0x6be08000, 0, "(2)" }, /* macro: ret zero,(2) */
+{ "ret", 0x681a8000, 0, "1" }, /* macro: ret 1,(ra) */
+{ "jcr", 0x6800c000, 0, "1,(2)" },
+{ "jsr_coroutine", 0x6800c000, 0, "1,(2)" },
+
+{ "addl", 0x40000000, 0, "1,2,3" }, /* 6o+5a+5b+4z+7f+5c */
+{ "addl", 0x40001000, 0, "1,b,3" }, /* 6o+5a+8n+1+7f+5c */
+{ "addl/v", 0x40000800, 0, "1,2,3" },
+{ "addl/v", 0x40001800, 0, "1,b,3" },
+{ "s4addl", 0x40000040, 0, "1,2,3" },
+{ "s4addl", 0x40001040, 0, "1,b,3" },
+{ "s8addl", 0x40000240, 0, "1,2,3" },
+{ "s8addl", 0x40001240, 0, "1,b,3" },
+{ "addq", 0x40000400, 0, "1,2,3" },
+{ "addq", 0x40001400, 0, "1,b,3" },
+{ "addq/v", 0x40000c00, 0, "1,2,3" },
+
+{ "addq/v", 0x40001c00, 0, "1,b,3" },
+{ "s4addq", 0x40000440, 0, "1,2,3" },
+{ "s4addq", 0x40001440, 0, "1,b,3" },
+{ "s8addq", 0x40000640, 0, "1,2,3" },
+{ "s8addq", 0x40001640, 0, "1,b,3" },
+{ "cmpeq", 0x400005a0, 0, "1,2,3" },
+{ "cmpeq", 0x400015a0, 0, "1,b,3" },
+{ "cmplt", 0x400009a0, 0, "1,2,3" },
+{ "cmplt", 0x400019a0, 0, "1,b,3" },
+{ "cmple", 0x40000da0, 0, "1,2,3" },
+{ "cmple", 0x40001da0, 0, "1,b,3" },
+{ "cmpult", 0x400003a0, 0, "1,2,3" },
+{ "cmpult", 0x400013a0, 0, "1,b,3" },
+{ "cmpule", 0x400007a0, 0, "1,2,3" },
+{ "cmpule", 0x400017a0, 0, "1,b,3" },
+{ "subl", 0x40000120, 0, "1,2,3" },
+{ "subl", 0x40001120, 0, "1,b,3" },
+{ "subl/v", 0x40000920, 0, "1,2,3" },
+{ "subl/v", 0x40001920, 0, "1,b,3" },
+{ "s4subl", 0x40000160, 0, "1,2,3" },
+{ "s4subl", 0x40001160, 0, "1,b,3" },
+{ "s8subl", 0x40000360, 0, "1,2,3" },
+{ "s8subl", 0x40001360, 0, "1,b,3" },
+{ "subq", 0x40000520, 0, "1,2,3" },
+{ "subq", 0x40001520, 0, "1,b,3" },
+{ "subq/v", 0x40000d20, 0, "1,2,3" },
+{ "subq/v", 0x40001d20, 0, "1,b,3" },
+{ "s4subq", 0x40000560, 0, "1,2,3" },
+{ "s4subq", 0x40001560, 0, "1,b,3" },
+{ "s8subq", 0x40000760, 0, "1,2,3" },
+{ "s8subq", 0x40001760, 0, "1,b,3" },
+{ "cmpbge", 0x400001e0, 0, "1,2,3" },
+{ "cmpbge", 0x400011e0, 0, "1,b,3" },
+
+{ "mull", 0x4c000000, 0, "1,2,3" },
+{ "mull", 0x4c001000, 0, "1,b,3" },
+{ "mull/v", 0x4c000800, 0, "1,2,3" },
+{ "mull/v", 0x4c001800, 0, "1,b,3" },
+{ "mulq", 0x4c000400, 0, "1,2,3" },
+{ "mulq", 0x4c001400, 0, "1,b,3" },
+{ "mulq/v", 0x4c000c00, 0, "1,2,3" },
+{ "mulq/v", 0x4c001c00, 0, "1,b,3" },
+{ "umulh", 0x4c000600, 0, "1,2,3" },
+{ "umulh", 0x4c001600, 0, "1,b,3" },
+
+{ "clr", 0x47ff0400, 0, "3" }, /* macro: or zero,zero,rc */
+{ "negl", 0x43e00120, 0, "2,3" }, /* macro: subl zero,rb,rc */
+{ "negl_v", 0x43e00920, 0, "2,3" }, /* macro: subl_v zero,rb,rc */
+{ "negq", 0x43e00520, 0, "2,3" }, /* macro: subq zero,rb,rc */
+{ "negq_v", 0x43e00d20, 0, "2,3" }, /* macro: subq_v zero,rb,rc */
+{ "sextl", 0x43e00000, 0, "2,3" }, /* macro: addl zero,rb,rc */
+
+{ "and", 0x44000000, 0, "1,2,3" },
+{ "and", 0x44001000, 0, "1,b,3" },
+{ "and", 0x44000000, 0, "r,2" }, /* macro: and ra,rb,ra */
+{ "and", 0x44001000, 0, "r,b" }, /* macro: and ra,#,ra */
+{ "or", 0x44000400, 0, "1,2,3" },
+{ "or", 0x44001400, 0, "1,b,3" },
+{ "or", 0x44000400, 0, "r,2" }, /* macro: or ra,rb,ra */
+{ "or", 0x44001400, 0, "r,b" }, /* macro: or ra,#,ra */
+{ "bis", 0x44000400, 0, "1,2,3" },
+{ "bis", 0x44001400, 0, "1,b,3" },
+{ "bis", 0x44000400, 0, "r,2" }, /* macro: or ra,rb,ra */
+{ "bis", 0x44001400, 0, "r,b" }, /* macro: or ra,#,ra */
+{ "movi", 0x47E01400, 0, "b,3"}, /* movi lit,rc == bis r31,lit,rc */
+{ "xor", 0x44000800, 0, "1,2,3" },
+{ "xor", 0x44001800, 0, "1,b,3" },
+{ "xor", 0x44000800, 0, "r,2" }, /* macro: ra,rb,ra */
+{ "xor", 0x44001800, 0, "r,b" }, /* macro: ra,#,ra */
+{ "andnot", 0x44000100, 0, "1,2,3" },
+{ "andnot", 0x44001100, 0, "1,b,3" },
+{ "andnot", 0x44000100, 0, "r,2" }, /* macro: ra,#,ra */
+{ "andnot", 0x44001100, 0, "r,b" }, /* macro: ra,#,ra */
+{ "bic", 0x44000100, 0, "1,2,3" },
+{ "bic", 0x44001100, 0, "1,b,3" },
+{ "bic", 0x44000100, 0, "r,2" }, /* macro: ra,#,ra */
+{ "bic", 0x44001100, 0, "r,b" }, /* macro: ra,#,ra */
+{ "ornot", 0x44000500, 0, "1,2,3" },
+{ "ornot", 0x44001500, 0, "1,b,3" },
+{ "ornot", 0x44000500, 0, "r,2" }, /* macro: ra,#,ra */
+{ "ornot", 0x44001500, 0, "r,b" }, /* macro: ra,#,ra */
+{ "not", 0x47e00500, 0, "2,3" }, /* macro: ornot zero,.. */
+{ "not", 0x47e01500, 0, "b,3" },
+{ "xornot", 0x44000900, 0, "1,2,3" },
+{ "xornot", 0x44001900, 0, "1,b,3" },
+{ "xornot", 0x44000900, 0, "r,2" }, /* macro: ra,#,ra */
+{ "xornot", 0x44001900, 0, "r,b" }, /* macro: ra,#,ra */
+{ "eqv", 0x44000900, 0, "1,2,3" },
+{ "eqv", 0x44001900, 0, "1,b,3" },
+{ "eqv", 0x44000900, 0, "r,2" }, /* macro: ra,#,ra */
+{ "eqv", 0x44001900, 0, "r,b" }, /* macro: ra,#,ra */
+
+{ "cmoveq", 0x44000480, 0, "1,2,3" },
+{ "cmoveq", 0x44001480, 0, "1,b,3" },
+{ "cmovne", 0x440004c0, 0, "1,2,3" },
+{ "cmovne", 0x440014c0, 0, "1,b,3" },
+{ "cmovlt", 0x44000880, 0, "1,2,3" },
+{ "cmovlt", 0x44001880, 0, "1,b,3" },
+{ "cmovle", 0x44000c80, 0, "1,2,3" },
+{ "cmovle", 0x44001c80, 0, "1,b,3" },
+{ "cmovgt", 0x44000cc0, 0, "1,2,3" },
+{ "cmovgt", 0x44001cc0, 0, "1,b,3" },
+{ "cmovge", 0x440008c0, 0, "1,2,3" },
+{ "cmovge", 0x440018c0, 0, "1,b,3" },
+{ "cmovlbc", 0x440002c0, 0, "1,2,3" },
+{ "cmovlbc", 0x440012c0, 0, "1,b,3" },
+{ "cmovlbs", 0x44000280, 0, "1,2,3" },
+{ "cmovlbs", 0x44001280, 0, "1,b,3" },
+
+{ "sll", 0x48000720, 0, "1,2,3" },
+{ "sll", 0x48001720, 0, "1,b,3" },
+{ "srl", 0x48000680, 0, "1,2,3" },
+{ "srl", 0x48001680, 0, "1,b,3" },
+{ "sra", 0x48000780, 0, "1,2,3" },
+{ "sra", 0x48001780, 0, "1,b,3" },
+
+{ "extbl", 0x480000c0, 0, "1,2,3" },
+{ "extbl", 0x480010c0, 0, "1,b,3" },
+{ "extwl", 0x480002c0, 0, "1,2,3" },
+{ "extwl", 0x480012c0, 0, "1,b,3" },
+{ "extll", 0x480004c0, 0, "1,2,3" },
+{ "extll", 0x480014c0, 0, "1,b,3" },
+{ "extql", 0x480006c0, 0, "1,2,3" },
+{ "extql", 0x480016c0, 0, "1,b,3" },
+{ "extwh", 0x48000b40, 0, "1,2,3" },
+{ "extwh", 0x48001b40, 0, "1,b,3" },
+{ "extlh", 0x48000d40, 0, "1,2,3" },
+{ "extlh", 0x48001d40, 0, "1,b,3" },
+{ "extqh", 0x48000f40, 0, "1,2,3" },
+{ "extqh", 0x48001f40, 0, "1,b,3" },
+{ "insbl", 0x48000160, 0, "1,2,3" },
+{ "insbl", 0x48001160, 0, "1,b,3" },
+{ "inswl", 0x48000360, 0, "1,2,3" },
+{ "inswl", 0x48001360, 0, "1,b,3" },
+{ "insll", 0x48000560, 0, "1,2,3" },
+{ "insll", 0x48001560, 0, "1,b,3" },
+{ "insql", 0x48000760, 0, "1,2,3" },
+{ "insql", 0x48001760, 0, "1,b,3" },
+{ "inswh", 0x48000ae0, 0, "1,2,3" },
+{ "inswh", 0x48001ae0, 0, "1,b,3" },
+{ "inslh", 0x48000ce0, 0, "1,2,3" },
+{ "inslh", 0x48001ce0, 0, "1,b,3" },
+{ "insqh", 0x48000ee0, 0, "1,2,3" },
+{ "insqh", 0x48001ee0, 0, "1,b,3" },
+{ "mskbl", 0x48000040, 0, "1,2,3" },
+{ "mskbl", 0x48001040, 0, "1,b,3" },
+{ "mskwl", 0x48000240, 0, "1,2,3" },
+{ "mskwl", 0x48001240, 0, "1,b,3" },
+{ "mskll", 0x48000440, 0, "1,2,3" },
+{ "mskll", 0x48001440, 0, "1,b,3" },
+{ "mskql", 0x48000640, 0, "1,2,3" },
+{ "mskql", 0x48001640, 0, "1,b,3" },
+{ "mskwh", 0x48000a40, 0, "1,2,3" },
+{ "mskwh", 0x48001a40, 0, "1,b,3" },
+{ "msklh", 0x48000c40, 0, "1,2,3" },
+{ "msklh", 0x48001c40, 0, "1,b,3" },
+{ "mskqh", 0x48000e40, 0, "1,2,3" },
+{ "mskqh", 0x48001e40, 0, "1,b,3" },
+{ "zap", 0x48000600, 0, "1,2,3" },
+{ "zap", 0x48001600, 0, "1,b,3" },
+{ "zapnot", 0x48000620, 0, "1,2,3" },
+{ "zapnot", 0x48001620, 0, "1,b,3" },
+
+/*
+ * Floating point instructions
+ */
+{ "ldf", 0x80000000, 1, "e,l(2)" }, /* 6o+5a+5b+16d */
+{ "ldf", 0x80000000, 1, "e,G" }, /* regbase macro */
+{ "ldg", 0x84000000, 1, "e,l(2)" },
+{ "ldg", 0x84000000, 1, "e,G" }, /* regbase macro */
+{ "lds", 0x88000000, 1, "e,l(2)" },
+{ "lds", 0x88000000, 1, "e,G" }, /* regbase macro */
+{ "ldt", 0x8c000000, 1, "e,l(2)" },
+{ "ldt", 0x8c000000, 1, "e,G" }, /* regbase macro */
+{ "stf", 0x90000000, 1, "e,l(2)" },
+{ "stf", 0x90000000, 1, "e,P" }, /* regbase macro */
+{ "stg", 0x94000000, 1, "e,l(2)" },
+{ "stg", 0x94000000, 1, "e,P" }, /* regbase macro */
+{ "sts", 0x98000000, 1, "e,l(2)" },
+{ "sts", 0x98000000, 1, "e,P" }, /* regbase macro */
+{ "stt", 0x9c000000, 1, "e,l(2)" },
+{ "stt", 0x9c000000, 1, "e,P" }, /* regbase macro */
+
+{ "fbeq", 0xc4000000, 1, "e,L" }, /* 6o+5a+21d */
+{ "fbne", 0xd4000000, 1, "e,L" },
+{ "fblt", 0xc8000000, 1, "e,L" },
+{ "fble", 0xcc000000, 1, "e,L" },
+{ "fbgt", 0xdc000000, 1, "e,L" },
+{ "fbge", 0xd8000000, 1, "e,L" },
+
+/* All subsets (opcode 0x17) */
+{ "cpys", 0x5c000400, 1, "e,f,g" }, /* 6o+5a+5b+11f+5c */
+{ "cpysn", 0x5c000420, 1, "e,f,g" },
+{ "cpyse", 0x5c000440, 1, "e,f,g" },
+
+{ "cvtlq", 0x5fe00200, 1, "f,g" },
+{ "cvtql", 0x5fe00600, 1, "f,g" },
+{ "cvtql/v", 0x5fe02600, 1, "f,g" },
+{ "cvtql/sv", 0x5fe06600, 1, "f,g" },
+
+{ "fcmoveq", 0x5c000540, 1, "e,f,g" },
+{ "fcmovne", 0x5c000560, 1, "e,f,g" },
+{ "fcmovlt", 0x5c000580, 1, "e,f,g" },
+{ "fcmovle", 0x5c0005c0, 1, "e,f,g" },
+{ "fcmovgt", 0x5c0005e0, 1, "e,f,g" },
+{ "fcmovge", 0x5c0005a0, 1, "e,f,g" },
+
+{ "mf_fpcr", 0x5c0004a0, 1, "E" },
+{ "mt_fpcr", 0x5c000480, 1, "E" },
+
+/* Vax subset (opcode 0x15) */
+{ "addf", 0x54001000, 1, "e,f,g" },
+{ "addf/c", 0x54000000, 1, "e,f,g" },
+{ "addf/u", 0x54003000, 1, "e,f,g" },
+{ "addf/uc", 0x54002000, 1, "e,f,g" },
+{ "addf/s", 0x54009000, 1, "e,f,g" },
+{ "addf/sc", 0x54008000, 1, "e,f,g" },
+{ "addf/su", 0x5400b000, 1, "e,f,g" },
+{ "addf/suc", 0x5400a000, 1, "e,f,g" },
+{ "addg", 0x54001400, 1, "e,f,g" },
+{ "addg/c", 0x54000400, 1, "e,f,g" },
+{ "addg/u", 0x54003400, 1, "e,f,g" },
+{ "addg/uc", 0x54002400, 1, "e,f,g" },
+{ "addg/s", 0x54009400, 1, "e,f,g" },
+{ "addg/sc", 0x54008400, 1, "e,f,g" },
+{ "addg/su", 0x5400b400, 1, "e,f,g" },
+{ "addg/suc", 0x5400a400, 1, "e,f,g" },
+{ "subf", 0x54001020, 1, "e,f,g" },
+{ "subf/c", 0x54000020, 1, "e,f,g" },
+{ "subf/u", 0x54003020, 1, "e,f,g" },
+{ "subf/uc", 0x54002020, 1, "e,f,g" },
+{ "subf/s", 0x54009020, 1, "e,f,g" },
+{ "subf/sc", 0x54008020, 1, "e,f,g" },
+{ "subf/su", 0x5400b020, 1, "e,f,g" },
+{ "subf/suc", 0x5400a020, 1, "e,f,g" },
+{ "subg", 0x54001420, 1, "e,f,g" },
+{ "subg/c", 0x54000420, 1, "e,f,g" },
+{ "subg/u", 0x54003420, 1, "e,f,g" },
+{ "subg/uc", 0x54002420, 1, "e,f,g" },
+{ "subg/s", 0x54009420, 1, "e,f,g" },
+{ "subg/sc", 0x54008420, 1, "e,f,g" },
+{ "subg/su", 0x5400b420, 1, "e,f,g" },
+{ "subg/suc", 0x5400a420, 1, "e,f,g" },
+
+{ "cmpgeq", 0x540014a0, 1, "e,f,g" },
+{ "cmpgeq/s", 0x540094a0, 1, "e,f,g" },
+{ "cmpglt", 0x540014c0, 1, "e,f,g" },
+{ "cmpglt/s", 0x540094c0, 1, "e,f,g" },
+{ "cmpgle", 0x540014e0, 1, "e,f,g" },
+{ "cmpgle/s", 0x540094e0, 1, "e,f,g" },
+
+{ "cvtgq", 0x57e015e0, 1, "f,g" },
+{ "cvtgq/c", 0x57e005e0, 1, "f,g" },
+{ "cvtgq/v", 0x57e035e0, 1, "f,g" },
+{ "cvtgq/vc", 0x57e025e0, 1, "f,g" },
+{ "cvtgq/s", 0x57e095e0, 1, "f,g" },
+{ "cvtgq/sc", 0x57e085e0, 1, "f,g" },
+{ "cvtgq/sv", 0x57e0b5e0, 1, "f,g" },
+{ "cvtgq/svc", 0x57e0a5e0, 1, "f,g" },
+{ "cvtqf", 0x57e01780, 1, "f,g" },
+{ "cvtqf/c", 0x57e00780, 1, "f,g" },
+{ "cvtqf/s", 0x57e09780, 1, "f,g" },
+{ "cvtqf/sc", 0x57e08780, 1, "f,g" },
+{ "cvtqg", 0x57e017c0, 1, "f,g" },
+{ "cvtqg/c", 0x57e007c0, 1, "f,g" },
+{ "cvtqg/s", 0x57e097c0, 1, "f,g" },
+{ "cvtqg/sc", 0x57e087c0, 1, "f,g" },
+{ "cvtdg", 0x57e013c0, 1, "f,g" },
+{ "cvtdg/c", 0x57e003c0, 1, "f,g" },
+{ "cvtdg/u", 0x57e033c0, 1, "f,g" },
+{ "cvtdg/uc", 0x57e023c0, 1, "f,g" },
+{ "cvtdg/s", 0x57e093c0, 1, "f,g" },
+{ "cvtdg/sc", 0x57e083c0, 1, "f,g" },
+{ "cvtdg/su", 0x57e0b3c0, 1, "f,g" },
+{ "cvtdg/suc", 0x57e0a3c0, 1, "f,g" },
+{ "cvtgd", 0x57e015a0, 1, "f,g" },
+{ "cvtgd/c", 0x57e005a0, 1, "f,g" },
+{ "cvtgd/u", 0x57e035a0, 1, "f,g" },
+{ "cvtgd/uc", 0x57e025a0, 1, "f,g" },
+{ "cvtgd/s", 0x57e095a0, 1, "f,g" },
+{ "cvtgd/sc", 0x57e085a0, 1, "f,g" },
+{ "cvtgd/su", 0x57e0b5a0, 1, "f,g" },
+{ "cvtgd/suc", 0x57e0a5a0, 1, "f,g" },
+{ "cvtgf", 0x57e01580, 1, "f,g" },
+{ "cvtgf/c", 0x57e00580, 1, "f,g" },
+{ "cvtgf/u", 0x57e03580, 1, "f,g" },
+{ "cvtgf/uc", 0x57e02580, 1, "f,g" },
+{ "cvtgf/s", 0x57e09580, 1, "f,g" },
+{ "cvtgf/sc", 0x57e08580, 1, "f,g" },
+{ "cvtgf/su", 0x57e0b580, 1, "f,g" },
+{ "cvtgf/suc", 0x57e0a580, 1, "f,g" },
+
+{ "divf", 0x54001060, 1, "e,f,g" },
+{ "divf/c", 0x54000060, 1, "e,f,g" },
+{ "divf/u", 0x54003060, 1, "e,f,g" },
+{ "divf/uc", 0x54002060, 1, "e,f,g" },
+{ "divf/s", 0x54009060, 1, "e,f,g" },
+{ "divf/sc", 0x54008060, 1, "e,f,g" },
+{ "divf/su", 0x5400b060, 1, "e,f,g" },
+{ "divf/suc", 0x5400a060, 1, "e,f,g" },
+{ "divg", 0x54001460, 1, "e,f,g" },
+{ "divg/c", 0x54000460, 1, "e,f,g" },
+{ "divg/u", 0x54003460, 1, "e,f,g" },
+{ "divg/uc", 0x54002460, 1, "e,f,g" },
+{ "divg/s", 0x54009460, 1, "e,f,g" },
+{ "divg/sc", 0x54008460, 1, "e,f,g" },
+{ "divg/su", 0x5400b460, 1, "e,f,g" },
+{ "divg/suc", 0x5400a460, 1, "e,f,g" },
+{ "mulf", 0x54001040, 1, "e,f,g" },
+{ "mulf/c", 0x54000040, 1, "e,f,g" },
+{ "mulf/u", 0x54003040, 1, "e,f,g" },
+{ "mulf/uc", 0x54002040, 1, "e,f,g" },
+{ "mulf/s", 0x54009040, 1, "e,f,g" },
+{ "mulf/sc", 0x54008040, 1, "e,f,g" },
+{ "mulf/su", 0x5400b040, 1, "e,f,g" },
+{ "mulf/suc", 0x5400a040, 1, "e,f,g" },
+{ "mulg", 0x54001440, 1, "e,f,g" },
+{ "mulg/c", 0x54000440, 1, "e,f,g" },
+{ "mulg/u", 0x54003440, 1, "e,f,g" },
+{ "mulg/uc", 0x54002440, 1, "e,f,g" },
+{ "mulg/s", 0x54009440, 1, "e,f,g" },
+{ "mulg/sc", 0x54008440, 1, "e,f,g" },
+{ "mulg/su", 0x5400b440, 1, "e,f,g" },
+{ "mulg/suc", 0x5400a440, 1, "e,f,g" },
+
+/* IEEE subset (opcode 0x16) */
+{ "adds", 0x58001000, 1, "e,f,g" },
+{ "adds/c", 0x58000000, 1, "e,f,g" },
+{ "adds/m", 0x58000800, 1, "e,f,g" },
+{ "adds/d", 0x58001800, 1, "e,f,g" },
+{ "adds/u", 0x58003000, 1, "e,f,g" },
+{ "adds/uc", 0x58002000, 1, "e,f,g" },
+{ "adds/um", 0x58002800, 1, "e,f,g" },
+{ "adds/ud", 0x58003800, 1, "e,f,g" },
+{ "adds/su", 0x5800b000, 1, "e,f,g" },
+{ "adds/suc", 0x5800a000, 1, "e,f,g" },
+{ "adds/sum", 0x5800a800, 1, "e,f,g" },
+{ "adds/sud", 0x5800b800, 1, "e,f,g" },
+{ "adds/sui", 0x5800f000, 1, "e,f,g" },
+{ "adds/suic", 0x5800e000, 1, "e,f,g" },
+{ "adds/suim", 0x5800e800, 1, "e,f,g" },
+{ "adds/suid", 0x5800f800, 1, "e,f,g" },
+{ "addt", 0x58001400, 1, "e,f,g" },
+{ "addt/c", 0x58000400, 1, "e,f,g" },
+{ "addt/m", 0x58000c00, 1, "e,f,g" },
+{ "addt/d", 0x58001c00, 1, "e,f,g" },
+{ "addt/u", 0x58003400, 1, "e,f,g" },
+{ "addt/uc", 0x58002400, 1, "e,f,g" },
+{ "addt/um", 0x58002c00, 1, "e,f,g" },
+{ "addt/ud", 0x58003c00, 1, "e,f,g" },
+{ "addt/su", 0x5800b400, 1, "e,f,g" },
+{ "addt/suc", 0x5800a400, 1, "e,f,g" },
+{ "addt/sum", 0x5800ac00, 1, "e,f,g" },
+{ "addt/sud", 0x5800bc00, 1, "e,f,g" },
+{ "addt/sui", 0x5800f400, 1, "e,f,g" },
+{ "addt/suic", 0x5800e400, 1, "e,f,g" },
+{ "addt/suim", 0x5800ec00, 1, "e,f,g" },
+{ "addt/suid", 0x5800fc00, 1, "e,f,g" },
+{ "subs", 0x58001020, 1, "e,f,g" },
+{ "subs/c", 0x58000020, 1, "e,f,g" },
+{ "subs/m", 0x58000820, 1, "e,f,g" },
+{ "subs/d", 0x58001820, 1, "e,f,g" },
+{ "subs/u", 0x58003020, 1, "e,f,g" },
+{ "subs/uc", 0x58002020, 1, "e,f,g" },
+{ "subs/um", 0x58002820, 1, "e,f,g" },
+{ "subs/ud", 0x58003820, 1, "e,f,g" },
+{ "subs/su", 0x5800b020, 1, "e,f,g" },
+{ "subs/suc", 0x5800a020, 1, "e,f,g" },
+{ "subs/sum", 0x5800a820, 1, "e,f,g" },
+{ "subs/sud", 0x5800b820, 1, "e,f,g" },
+{ "subs/sui", 0x5800f020, 1, "e,f,g" },
+{ "subs/suic", 0x5800e020, 1, "e,f,g" },
+{ "subs/suim", 0x5800e820, 1, "e,f,g" },
+{ "subs/suid", 0x5800f820, 1, "e,f,g" },
+{ "subt", 0x58001420, 1, "e,f,g" },
+{ "subt/c", 0x58000420, 1, "e,f,g" },
+{ "subt/m", 0x58000c20, 1, "e,f,g" },
+{ "subt/d", 0x58001c20, 1, "e,f,g" },
+{ "subt/u", 0x58003420, 1, "e,f,g" },
+{ "subt/uc", 0x58002420, 1, "e,f,g" },
+{ "subt/um", 0x58002c20, 1, "e,f,g" },
+{ "subt/ud", 0x58003c20, 1, "e,f,g" },
+{ "subt/su", 0x5800b420, 1, "e,f,g" },
+{ "subt/suc", 0x5800a420, 1, "e,f,g" },
+{ "subt/sum", 0x5800ac20, 1, "e,f,g" },
+{ "subt/sud", 0x5800bc20, 1, "e,f,g" },
+{ "subt/sui", 0x5800f420, 1, "e,f,g" },
+{ "subt/suic", 0x5800e420, 1, "e,f,g" },
+{ "subt/suim", 0x5800ec20, 1, "e,f,g" },
+{ "subt/suid", 0x5800fc20, 1, "e,f,g" },
+
+{ "cmpteq", 0x580014a0, 1, "e,f,g" },
+{ "cmpteq/su", 0x5800b4a0, 1, "e,f,g" },
+{ "cmptlt", 0x580014c0, 1, "e,f,g" },
+{ "cmptlt/su", 0x5800b4c0, 1, "e,f,g" },
+{ "cmptle", 0x580014e0, 1, "e,f,g" },
+{ "cmptle/su", 0x5800b4e0, 1, "e,f,g" },
+{ "cmptun", 0x58001480, 1, "e,f,g" },
+{ "cmptun/su", 0x5800b480, 1, "e,f,g" },
+
+{ "cvttq", 0x5be015e0, 1, "f,g" },
+{ "cvttq/c", 0x5be005e0, 1, "f,g" },
+{ "cvttq/v", 0x5be035e0, 1, "f,g" },
+{ "cvttq/vc", 0x5be025e0, 1, "f,g" },
+{ "cvttq/sv", 0x5be0b5e0, 1, "f,g" },
+{ "cvttq/svc", 0x5be0a5e0, 1, "f,g" },
+{ "cvttq/svi", 0x5be0f5e0, 1, "f,g" },
+{ "cvttq/svic", 0x5be0e5e0, 1, "f,g" },
+{ "cvtqs", 0x5be01780, 1, "f,g" },
+{ "cvtqs/c", 0x5be00780, 1, "f,g" },
+{ "cvtqs/m", 0x5be00f80, 1, "f,g" },
+{ "cvtqs/d", 0x5be01f80, 1, "f,g" },
+{ "cvtqs/sui", 0x5be0f780, 1, "f,g" },
+{ "cvtqs/suic", 0x5be0e780, 1, "f,g" },
+{ "cvtqs/suim", 0x5be0ef80, 1, "f,g" },
+{ "cvtqs/suid", 0x5be0ff80, 1, "f,g" },
+{ "cvtqt", 0x5be017c0, 1, "f,g" },
+{ "cvtqt/c", 0x5be007c0, 1, "f,g" },
+{ "cvtqt/m", 0x5be00fc0, 1, "f,g" },
+{ "cvtqt/d", 0x5be01fc0, 1, "f,g" },
+{ "cvtqt/sui", 0x5be0f7c0, 1, "f,g" },
+{ "cvtqt/suic", 0x5be0e7c0, 1, "f,g" },
+{ "cvtqt/suim", 0x5be0efc0, 1, "f,g" },
+{ "cvtqt/suid", 0x5be0ffc0, 1, "f,g" },
+{ "cvtts", 0x5be01580, 1, "f,g" },
+{ "cvtts/c", 0x5be00580, 1, "f,g" },
+{ "cvtts/m", 0x5be00d80, 1, "f,g" },
+{ "cvtts/d", 0x5be01d80, 1, "f,g" },
+{ "cvtts/u", 0x5be03580, 1, "f,g" },
+{ "cvtts/uc", 0x5be02580, 1, "f,g" },
+{ "cvtts/um", 0x5be02d80, 1, "f,g" },
+{ "cvtts/ud", 0x5be03d80, 1, "f,g" },
+{ "cvtts/su", 0x5be0b580, 1, "f,g" },
+{ "cvtts/suc", 0x5be0a580, 1, "f,g" },
+{ "cvtts/sum", 0x5be0ad80, 1, "f,g" },
+{ "cvtts/sud", 0x5be0bd80, 1, "f,g" },
+{ "cvtts/sui", 0x5be0f580, 1, "f,g" },
+{ "cvtts/suic", 0x5be0e580, 1, "f,g" },
+{ "cvtts/suim", 0x5be0ed80, 1, "f,g" },
+{ "cvtts/suid", 0x5be0fd80, 1, "f,g" },
+
+{ "divs", 0x58001060, 1, "e,f,g" },
+{ "divs/c", 0x58000060, 1, "e,f,g" },
+{ "divs/m", 0x58000860, 1, "e,f,g" },
+{ "divs/d", 0x58001860, 1, "e,f,g" },
+{ "divs/u", 0x58003060, 1, "e,f,g" },
+{ "divs/uc", 0x58002060, 1, "e,f,g" },
+{ "divs/um", 0x58002860, 1, "e,f,g" },
+{ "divs/ud", 0x58003860, 1, "e,f,g" },
+{ "divs/su", 0x5800b060, 1, "e,f,g" },
+{ "divs/suc", 0x5800a060, 1, "e,f,g" },
+{ "divs/sum", 0x5800a860, 1, "e,f,g" },
+{ "divs/sud", 0x5800b860, 1, "e,f,g" },
+{ "divs/sui", 0x5800f060, 1, "e,f,g" },
+{ "divs/suic", 0x5800e060, 1, "e,f,g" },
+{ "divs/suim", 0x5800e860, 1, "e,f,g" },
+{ "divs/suid", 0x5800f860, 1, "e,f,g" },
+{ "divt", 0x58001460, 1, "e,f,g" },
+{ "divt/c", 0x58000460, 1, "e,f,g" },
+{ "divt/m", 0x58000c60, 1, "e,f,g" },
+{ "divt/d", 0x58001c60, 1, "e,f,g" },
+{ "divt/u", 0x58003460, 1, "e,f,g" },
+{ "divt/uc", 0x58002460, 1, "e,f,g" },
+{ "divt/um", 0x58002c60, 1, "e,f,g" },
+{ "divt/ud", 0x58003c60, 1, "e,f,g" },
+{ "divt/su", 0x5800b460, 1, "e,f,g" },
+{ "divt/suc", 0x5800a460, 1, "e,f,g" },
+{ "divt/sum", 0x5800ac60, 1, "e,f,g" },
+{ "divt/sud", 0x5800bc60, 1, "e,f,g" },
+{ "divt/sui", 0x5800f460, 1, "e,f,g" },
+{ "divt/suic", 0x5800e460, 1, "e,f,g" },
+{ "divt/suim", 0x5800ec60, 1, "e,f,g" },
+{ "divt/suid", 0x5800fc60, 1, "e,f,g" },
+{ "muls", 0x58001040, 1, "e,f,g" },
+{ "muls/c", 0x58000040, 1, "e,f,g" },
+{ "muls/m", 0x58000840, 1, "e,f,g" },
+{ "muls/d", 0x58001840, 1, "e,f,g" },
+{ "muls/u", 0x58003040, 1, "e,f,g" },
+{ "muls/uc", 0x58002040, 1, "e,f,g" },
+{ "muls/um", 0x58002840, 1, "e,f,g" },
+{ "muls/ud", 0x58003840, 1, "e,f,g" },
+{ "muls/su", 0x5800b040, 1, "e,f,g" },
+{ "muls/suc", 0x5800a040, 1, "e,f,g" },
+{ "muls/sum", 0x5800a840, 1, "e,f,g" },
+{ "muls/sud", 0x5800b840, 1, "e,f,g" },
+{ "muls/sui", 0x5800f040, 1, "e,f,g" },
+{ "muls/suic", 0x5800e040, 1, "e,f,g" },
+{ "muls/suim", 0x5800e840, 1, "e,f,g" },
+{ "muls/suid", 0x5800f840, 1, "e,f,g" },
+{ "mult", 0x58001440, 1, "e,f,g" },
+{ "mult/c", 0x58000440, 1, "e,f,g" },
+{ "mult/m", 0x58000c40, 1, "e,f,g" },
+{ "mult/d", 0x58001c40, 1, "e,f,g" },
+{ "mult/u", 0x58003440, 1, "e,f,g" },
+{ "mult/uc", 0x58002440, 1, "e,f,g" },
+{ "mult/um", 0x58002c40, 1, "e,f,g" },
+{ "mult/ud", 0x58003c40, 1, "e,f,g" },
+{ "mult/su", 0x5800b440, 1, "e,f,g" },
+{ "mult/suc", 0x5800a440, 1, "e,f,g" },
+{ "mult/sum", 0x5800ac40, 1, "e,f,g" },
+{ "mult/sud", 0x5800bc40, 1, "e,f,g" },
+{ "mult/sui", 0x5800f440, 1, "e,f,g" },
+{ "mult/suic", 0x5800e440, 1, "e,f,g" },
+{ "mult/suim", 0x5800ec40, 1, "e,f,g" },
+{ "mult/suid", 0x5800fc40, 1, "e,f,g" },
+
+/*
+ * Miscellaneous
+ */
+{ "pal", 0x00000000, 0, "I" }, /* 6o+26f */
+{ "call_pal", 0x00000000, 0, "I" }, /* alias */
+{ "bpt", 0x00000080, 0, "" },
+{ "chmk", 0x00000083, 0, "" },
+{ "imb", 0x00000086, 0, "" },
+
+{ "draint", 0x60000000, 0, "" }, /* 6o+5a+5b+16d */
+{ "trapb", 0x60000000, 0, "" }, /* 6o+5a+5b+16d */
+{ "fetch", 0x60008000, 0, "0(2)" },
+{ "fetch_m", 0x6000a000, 0, "0(2)" },
+{ "mb", 0x60004000, 0, "" },
+{ "rpcc", 0x6000c000, 0, "1" },
+{ "rc", 0x6000e000, 0, "1" },
+{ "rs", 0x6000f000, 0, "1" },
+
+/*
+ * PAL instructions
+ */
+{ "hw_ld", 0x6c000000, 0, "1,t(2)" },
+{ "hw_ld/p", 0x6c008000, 0, "1,t(2)" },
+{ "hw_ld/a", 0x6c004000, 0, "1,t(2)" },
+{ "hw_ld/r", 0x6c002000, 0, "1,t(2)" },
+{ "hw_ld/q", 0x6c001000, 0, "1,t(2)" },
+{ "hw_ld/pa", 0x6c00C000, 0, "1,t(2)" },
+{ "hw_ld/pr", 0x6c00A000, 0, "1,t(2)" },
+{ "hw_ld/pq", 0x6c009000, 0, "1,t(2)" },
+{ "hw_ld/ar", 0x6c006000, 0, "1,t(2)" },
+{ "hw_ld/aq", 0x6c005000, 0, "1,t(2)" },
+{ "hw_ld/rq", 0x6c003000, 0, "1,t(2)" },
+{ "hw_ld/par", 0x6c00e000, 0, "1,t(2)" },
+{ "hw_ld/paq", 0x6c00d000, 0, "1,t(2)" },
+{ "hw_ld/prq", 0x6c00b000, 0, "1,t(2)" },
+{ "hw_ld/arq", 0x6c007000, 0, "1,t(2)" },
+{ "hw_ld/parq", 0x6c00f000, 0, "1,t(2)" },
+
+{ "hw_ldq", 0x6c001000, 0, "1,t(2)" }, /* ldq/ldl variants for Eric */
+{ "hw_ldq/p", 0x6c009000, 0, "1,t(2)" },
+{ "hw_ldq/a", 0x6c005000, 0, "1,t(2)" },
+{ "hw_ldq/r", 0x6c003000, 0, "1,t(2)" },
+{ "hw_ldq/pa", 0x6c00d000, 0, "1,t(2)" },
+{ "hw_ldq/pr", 0x6c00b000, 0, "1,t(2)" },
+{ "hw_ldq/ar", 0x6c007000, 0, "1,t(2)" },
+{ "hw_ldq/par", 0x6c00f000, 0, "1,t(2)" },
+{ "hw_ldl", 0x6c000000, 0, "1,t(2)" },
+{ "hw_ldl/p", 0x6c008000, 0, "1,t(2)" },
+{ "hw_ldl/a", 0x6c004000, 0, "1,t(2)" },
+{ "hw_ldl/r", 0x6c002000, 0, "1,t(2)" },
+{ "hw_ldl/pa", 0x6c00C000, 0, "1,t(2)" },
+{ "hw_ldl/pr", 0x6c00A000, 0, "1,t(2)" },
+{ "hw_ldl/ar", 0x6c006000, 0, "1,t(2)" },
+{ "hw_ldl/par", 0x6c00e000, 0, "1,t(2)" },
+
+{ "hw_st/paq", 0x7c00c000, 0, "1,t(2)" },
+{ "hw_st/pa", 0x7c00b000, 0, "1,t(2)" },
+{ "hw_st/pq", 0x7c009000, 0, "1,t(2)" },
+{ "hw_st/aq", 0x7c005000, 0, "1,t(2)" },
+{ "hw_st/p", 0x7c008000, 0, "1,t(2)" },
+{ "hw_st/a", 0x7c004000, 0, "1,t(2)" },
+{ "hw_st/q", 0x7c001000, 0, "1,t(2)" },
+{ "hw_st", 0x7c000000, 0, "1,t(2)" },
+
+{ "hw_stq/pa", 0x7c00c000, 0, "1,t(2)" }, /* stq/stl variants for Eric */
+{ "hw_stq/p", 0x7c009000, 0, "1,t(2)" },
+{ "hw_stq", 0x7c001000, 0, "1,t(2)" },
+{ "hw_stq/a", 0x7c005000, 0, "1,t(2)" },
+{ "hw_stl/pa", 0x7c00b000, 0, "1,t(2)" },
+{ "hw_stl/p", 0x7c008000, 0, "1,t(2)" },
+{ "hw_stl/a", 0x7c004000, 0, "1,t(2)" },
+{ "hw_stl", 0x7c000000, 0, "1,t(2)" },
+
+{ "hw_mfpr/p", 0x64000080, 0, "R,3" },
+{ "hw_mfpr/a", 0x64000040, 0, "R,3" },
+{ "hw_mfpr/i", 0x64000020, 0, "R,3" },
+{ "hw_mfpr/pa", 0x640000c0, 0, "R,3" },
+{ "hw_mfpr/pi", 0x640000a0, 0, "R,3" },
+{ "hw_mfpr/ai", 0x64000060, 0, "R,3" },
+{ "hw_mfpr/pai",0x640000e0, 0, "R,3" },
+{ "hw_mfpr", 0x64000000, 0, "R,8" },
+
+{ "hw_mtpr/p", 0x74000080, 0, "R,3" },
+{ "hw_mtpr/a", 0x74000040, 0, "R,3" },
+{ "hw_mtpr/i", 0x74000020, 0, "R,3" },
+{ "hw_mtpr/pa", 0x740000c0, 0, "R,3" },
+{ "hw_mtpr/pi", 0x740000a0, 0, "R,3" },
+{ "hw_mtpr/ai", 0x74000060, 0, "R,3" },
+{ "hw_mtpr/pai",0x740000e0, 0, "R,3" },
+{ "hw_mtpr", 0x74000000, 0, "R,8" },
+
+{ "hw_rei", 0x7bff8000, 0, "" },
+/*
+ * More macros
+ */
+{ "nop", 0x47ff041f, 0, "" }, /* or zero,zero,zero */
+{ "mov", 0x47e00400, 0, "2,3" }, /* or zero,r2,r3 */
+};
+
+#define NUMOPCODES ((sizeof alpha_opcodes)/(sizeof alpha_opcodes[0]))
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/aout.h freebios/util/alpha-common/include/aout.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/aout.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/aout.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,218 @@
+/*
+ * HISTORY
+ * $Log: aout.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.1 1994/01/31 11:27:45 rusling
+ * Initial revision
+ *
+ * Revision 4.0 1993/10/18 15:37:42 rusling
+ * Include file.
+ *
+ */
+#ifndef _A_OUT_H_
+#define _A_OUT_H_ 1
+/* This file describes the a.out file format
+ Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+
+ /* Alpha's a.out. . . */
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+#include "c_32_64.h"
+typedef int32 boolean_t;
+#else
+#include <mach/std_types.h>
+#endif
+
+#if __osf__
+typedef long integer_t;
+#endif
+
+
+struct exec {
+ integer_t a_magic; /* Use macros N_MAGIC, etc for access */
+ vm_size_t a_text; /* bytes of text in file */
+ vm_size_t a_data; /* bytes of data in file */
+ vm_size_t a_bss; /* bytes of auto-zeroed data */
+ vm_size_t a_syms; /* bytes of symbol table data in file */
+ vm_offset_t a_entry; /* start PC */
+ vm_offset_t a_tstart; /* text start, in memory */
+ vm_offset_t a_dstart; /* data start, in memory */
+ vm_size_t a_trsize; /* bytes of text-relocation info in file */
+ vm_size_t a_drsize; /* bytes of data-relocation info in file */
+};
+
+#define __LDPGSZ 8192
+
+#ifndef OMAGIC
+#define OMAGIC 0407
+#define NMAGIC 0410
+#define ZMAGIC 0413
+#endif
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+
+#define N_BADMAG(x) \
+ (((x).a_magic.low)!=OMAGIC && ((x).a_magic.low)!=NMAGIC && ((x).a_magic.low)!=ZMAGIC)
+/* Address of the bottom of the text segment. */
+#define N_TXTADDR(x) \
+ ((x).a_tstart.low)
+
+/* Address of the bottom of the data segment. */
+#define N_DATADDR(x) \
+ ((x).a_dstart.low)
+
+/* Text segment offset. */
+#define N_TXTOFF(ex) \
+ ((ex).a_magic.low == ZMAGIC ? 0 : sizeof(struct exec))
+
+/* Data segment offset. */
+#define N_DATOFF(ex) \
+ ((N_TXTOFF(ex)) + ((ex).a_magic.low != ZMAGIC ? (ex).a_text.low : \
+ __LDPGSZ + ((ex).a_text.low - 1 & ~(__LDPGSZ - 1))))
+
+/* Symbol table offset. */
+#define N_SYMOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low + (x).a_trsize.low + (x).a_drsize.low)
+
+#define N_STROFF(x) \
+ (N_SYMOFF(x) + (x).a_syms.low)
+
+/* text relocation offset */
+#define N_TRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low)
+
+/* data relocation offset */
+#define N_DRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text.low + (x).a_data.low + (x).a_trsize.low)
+
+#else
+
+#define N_BADMAG(x) \
+ (((x).a_magic)!=OMAGIC && ((x).a_magic)!=NMAGIC && ((x).a_magic)!=ZMAGIC)
+
+/* Address of the bottom of the text segment. */
+#define N_TXTADDR(x) \
+ ((x).a_tstart)
+
+/* Address of the bottom of the data segment. */
+#define N_DATADDR(x) \
+ ((x).a_dstart)
+
+/* Text segment offset. */
+#define N_TXTOFF(ex) \
+ ((ex).a_magic == ZMAGIC ? 0 : sizeof(struct exec))
+
+/* Data segment offset. */
+#define N_DATOFF(ex) \
+ ((N_TXTOFF(ex)) + ((ex).a_magic != ZMAGIC ? (ex).a_text : \
+ __LDPGSZ + ((ex).a_text - 1 & ~(__LDPGSZ - 1))))
+
+/* Symbol table offset. */
+#define N_SYMOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data + (x).a_trsize + (x).a_drsize)
+
+#define N_STROFF(x) \
+ (N_SYMOFF(x) + (x).a_syms)
+
+/* text relocation offset */
+#define N_TRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data)
+
+/* data relocation offset */
+#define N_DRELOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data + (x).a_trsize)
+
+#endif
+
+struct nlist {
+ union {
+ char *n_name;
+ struct nlist *n_next;
+ long n_strx;
+ vm_offset_t n_pad_cross_compile;
+ } n_un;
+ char n_type;
+ char n_other;
+ short n_desc;
+ int n_pad;
+ vm_offset_t n_value;
+};
+
+#define N_UNDF 0x0
+#define N_ABS 0x2
+#define N_TEXT 0x4
+#define N_DATA 0x6
+#define N_BSS 0x8
+#define N_COMM 0x12
+#define N_FN 0x1f
+#define N_EXT 0x1
+#define N_TYPE 0x1e
+#define N_STAB 0xe0
+
+#define N_FORMAT "%016lx"
+
+enum reloc_type
+{
+ RELOC_0_7, RELOC_0_15, RELOC_0_31, RELOC_0_63,
+ RELOC_0_25, RELOC_16_31, RELOC_WDISP21, RELOC_BASE21,
+ RELOC_WDISP14, RELOC_BASE14, RELOC_32_47, RELOC_48_63,
+ RELOC_U_16_31, RELOC_U_32_47, RELOC_U_48_63, RELOC_0_12,
+ RELOC_0_8,
+
+ NO_RELOC,
+
+ BRELOC_0_15, BRELOC_0_31, BRELOC_16_31,
+ BRSET_0_15, BRSET_16_31
+};
+
+struct relocation_info {
+ vm_offset_t r_address;
+ unsigned int r_index;
+ unsigned char r_extern;
+ enum reloc_type r_type : 8;
+#ifdef VMS_HOST
+ short pad;
+#endif
+ integer_t r_addend;
+};
+
+/* The following constants are used for actually emitting relocation
+ * information on Alpha. The relocation_info structure can't be used
+ * directly because the NT compiler alligns structure members in strange
+ * ways (it appears to allign all members, including fields, on 4 byte
+ * boundries.).
+ */
+
+#define R_ADDRESS_OFFSET 0
+#define R_ADDRESS_SIZE 8
+#define R_INDEX_OFFSET 8
+#define R_INDEX_SIZE 4
+#define R_EXTERN_OFFSET 12
+#define R_EXTERN_SIZE 1
+#define R_TYPE_OFFSET 13
+#define R_TYPE_SIZE 1
+#define R_ADDEND_OFFSET 16
+#define R_ADDEND_SIZE 8
+#define RELOCATION_INFO_SIZE 24
+
+#endif /* _A_OUT_H_ */
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/c_32_64.h freebios/util/alpha-common/include/c_32_64.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/c_32_64.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/c_32_64.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,56 @@
+#ifndef _CROSS_H_
+#define _CROSS_H_ 1
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+
+#define int16 short int
+#define int32 int
+typedef struct {
+ int32 low;
+ int32 high;
+} int64;
+#define low32(x) (x).low
+#define high32(x) (x).high
+
+#define _MACHINE_VM_TYPES_H_ 1
+typedef int64 vm_offset_t;
+typedef int64 vm_size_t;
+typedef int64 integer_t;
+
+extern int64 zero;
+#define neq64(a,b) (((a).low != (b).low) || ((a).high != (b).high))
+#define eq64(a,b) (((a).low == (b).low) && ((a).high == (b).high))
+#define lt64(a,b) (((a).low < (b).low) && ((a).high < (b).high))
+#define assign64(a,b) { (a).low = (b).low; (a).high = (b).high; }
+#define assign64h(a,b) (a).high = b
+#define assign64l(a,b) (a).low = b
+extern int64 plus( int64, int64);
+extern int64 minus( int64, int64);
+extern int64 plus_a_32( int64, int32);
+
+#else /* CROSS_COMPILE_32_TO_64_BITS */
+
+#ifdef __osf__
+# include <mach/machine/vm_types.h>
+#endif
+
+#define int16 unsigned short int
+#define int32 unsigned int
+#define int64 unsigned long int
+
+#define low32(x) x
+#define high32(x) ((x >> 32) & 0xFFFFFFFF)
+#define zero 0
+#define neq64(a,b) ((a) != (b))
+#define eq64(a,b) ((a) == (b))
+#define lt64(a,b) ((a) < (b))
+#define assign64(a,b) (a) = (b)
+#define assign64h(a,b) a = (a&0xffffffffL) | ((b)<<32)
+#define assign64l(a,b) a = (a&0xffffffff00000000L) | (b)
+#define plus(a,b) (a) + (b)
+#define minus(a,b) (a) - (b)
+#define plus_a_32(a,b) (a) + (b)
+
+#endif /* CROSS_COMPILE_32_TO_64_BITS */
+
+#endif /* _CROSS_H_ */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/coff.h freebios/util/alpha-common/include/coff.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/coff.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/coff.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,113 @@
+/*
+ * Mach Operating System
+ * Copyright (c) 1991,1990,1989 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [EMAIL PROTECTED]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+/*
+ * HISTORY
+ * 31-May-92 Alessandro Forin (af) at Carnegie-Mellon University
+ * Adapted for Alpha.
+ *
+ * $Log: coff.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 4.0 1993/10/18 15:37:42 rusling
+ * Include file.
+ *
+ *
+ */
+/*
+ * File: coff.h
+ * Author: Alessandro Forin, Carnegie Mellon University
+ * Date: 10/89
+ *
+ * Structure definitions for COFF headers
+ */
+
+struct filehdr {
+ unsigned short f_magic; /* magic number */
+ unsigned short f_nscns; /* number of sections */
+ int f_timdat; /* time & date stamp */
+ unsigned long f_symptr; /* file pointer to symtab */
+ int f_nsyms; /* number of symtab entries */
+ unsigned short f_opthdr; /* sizeof(optional hdr) */
+ unsigned short f_flags; /* flags */
+};
+
+#define F_EXEC 0000002
+
+#define ALPHAMAGIC 0603
+
+struct scnhdr {
+ char s_name[8]; /* section name */
+ unsigned long s_paddr; /* physical address */
+ unsigned long s_vaddr; /* virtual address */
+ unsigned long s_size; /* section size */
+ unsigned long s_scnptr; /* file ptr to raw data for section */
+ unsigned long s_relptr; /* file ptr to relocation */
+ unsigned long s_lnnoptr; /* file ptr to line numbers */
+ unsigned short s_nreloc; /* number of relocation entries */
+ unsigned short s_nlnno; /* number of line number entries */
+ int s_flags; /* flags */
+};
+
+
+
+struct aouthdr {
+ short magic; /* see magic.h */
+ short vstamp; /* version stamp */
+ int pad; /* help for cross compilers */
+ unsigned long tsize; /* text size in bytes, padded to FW
+ bdry */
+ unsigned long dsize; /* initialized data " " */
+ unsigned long bsize; /* uninitialized data " " */
+ unsigned long entry; /* entry point, value of "start"*/
+ unsigned long text_start; /* base of text used for this file*/
+ unsigned long data_start; /* base of data used for this file*/
+ unsigned long bss_start; /* base of bss used for this file */
+ int gprmask; /* general purpose register mask*/
+ int fprmask; /* FPA register mask */
+ unsigned long gp_value; /* the gp value used for this object*/
+};
+
+
+#define OMAGIC 0407 /* old impure format */
+#define NMAGIC 0410 /* read-only text */
+#define ZMAGIC 0413 /* demand load format */
+
+#define N_BADMAG(a) \
+ ((a).magic != OMAGIC && (a).magic != NMAGIC && (a).magic != ZMAGIC)
+
+#define SCNROUND ((long)16)
+
+struct exechdr {
+ struct filehdr f;
+ struct aouthdr a;
+};
+
+#define N_TXTOFF(f, a) \
+ (((a).magic == ZMAGIC) ? 0 : \
+ ((sizeof(struct filehdr) + sizeof(struct aouthdr) + \
+ (f).f_nscns * sizeof(struct scnhdr) + SCNROUND-1) & ~(SCNROUND -1)))
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/dc21064.h freebios/util/alpha-common/include/dc21064.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/dc21064.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/dc21064.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,1056 @@
+#ifndef __DC21064_LOADED
+#define __DC21064_LOADED 1
+/*
+*****************************************************************************
+** *
+** Copyright � 1993, 1994 *
+** by Digital Equipment Corporation, Maynard, Massachusetts. *
+** *
+** All Rights Reserved *
+** *
+** Permission is hereby granted to use, copy, modify and distribute *
+** this software and its documentation, in both source code and *
+** object code form, and without fee, for the purpose of distribution *
+** of this software or modifications of this software within products *
+** incorporating an integrated circuit implementing Digital's AXP *
+** architecture, regardless of the source of such integrated circuit, *
+** provided that the above copyright notice and this permission notice *
+** appear in all copies, and that the name of Digital Equipment *
+** Corporation not be used in advertising or publicity pertaining to *
+** distribution of the document or software without specific, written *
+** prior permission. *
+** *
+** Digital Equipment Corporation disclaims all warranties and/or *
+** guarantees with regard to this software, including all implied *
+** warranties of fitness for a particular purpose and merchantability, *
+** and makes no representations regarding the use of, or the results *
+** of the use of, the software and documentation in terms of correctness, *
+** accuracy, reliability, currentness or otherwise; and you rely on *
+** the software, documentation and results solely at your own risk. *
+** *
+** AXP is a trademark of Digital Equipment Corporation. *
+** *
+*****************************************************************************
+**
+** FACILITY:
+**
+** DECchip 21064/21066 OSF/1 PALcode
+**
+** MODULE:
+**
+** dc21064.h
+**
+** MODULE DESCRIPTION:
+**
+** DECchip 21064/21066 specific definitions
+**
+** AUTHOR: ER
+**
+** CREATION DATE: 29-Oct-1992
+**
+** $Id: dc21064.h,v 1.1 2000/03/21 03:56:31 stepan Exp $
+**
+** MODIFICATION HISTORY:
+**
+** $Log: dc21064.h,v $
+** Revision 1.1 2000/03/21 03:56:31 stepan
+** Check in current version which is a nearly a 2.2-16
+**
+** Revision 2.2 1994/06/16 14:47:31 samberg
+** For ANSI, changed $ to _, except for pvc and reg def
+**
+** Revision 2.1 1994/04/01 21:55:51 ericr
+** 1-APR-1994 V2 OSF/1 PALcode
+**
+** Revision 1.6 1994/03/29 20:53:23 ericr
+** Fixed comments for ESR mask definitions NOT_CEE and ERR_NOT_CEE
+**
+** Revision 1.5 1994/03/29 19:32:22 ericr
+** Fixed IOC_STAT0<ERR> bit definition and mask.
+**
+** Revision 1.4 1994/03/14 20:45:58 ericr
+** Added FPR definitions
+**
+** Revision 1.3 1994/03/14 16:38:44 samberg
+** Use LOAD_REGION_BASE macro instead of individual load_x_csr macros
+**
+** Revision 1.2 1994/03/08 20:27:52 ericr
+** Replaced DEBUG_MONITOR conditional with KDEBUG
+**
+** Revision 1.1 1994/02/28 18:23:46 ericr
+** Initial revision
+**
+**
+*/
+
+/*======================================================================*/
+/* INTERNAL PROCESSOR REGISTER DEFINITIONS */
+/*======================================================================*/
+
+#define IPR_V_PAL 7
+#define IPR_M_PAL (1<<IPR_V_PAL)
+#define IPR_V_ABX 6
+#define IPR_M_ABX (1<<IPR_V_ABX)
+#define IPR_V_IBX 5
+#define IPR_M_IBX (1<<IPR_V_IBX)
+#define IPR_V_INDEX 0
+#define IPR_M_INDEX (0x1F<<IPR_V_INDEX)
+
+/*
+** Ibox IPR Definitions
+*/
+
+#define tbTag IPR_M_IBX + 0x0
+#define itbPte IPR_M_IBX + 0x1
+#define iccsr IPR_M_IBX + 0x2
+#define itbPteTemp IPR_M_IBX + 0x3
+#define excAddr IPR_M_IBX + 0x4
+#define slRcv IPR_M_IBX + 0x5
+#define itbZap IPR_M_IBX + 0x6
+#define itbAsm IPR_M_IBX + 0x7
+#define itbIs IPR_M_IBX + 0x8
+#define ps IPR_M_IBX + 0x9
+#define excSum IPR_M_IBX + 0xA
+#define palBase IPR_M_IBX + 0xB
+#define hirr IPR_M_IBX + 0xC
+#define sirr IPR_M_IBX + 0xD
+#define astrr IPR_M_IBX + 0xE
+#define hier IPR_M_IBX + 0x10
+#define sier IPR_M_IBX + 0x11
+#define aster IPR_M_IBX + 0x12
+#define slClr IPR_M_IBX + 0x13
+#define slXmit IPR_M_IBX + 0x16
+
+/*
+** Instruction Cache Control and Status Register (ICCSR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <45> 1 PME1 Performance Monitor Enable 1
+** <44> 1 PME0 Performance Monitor Enable 0
+** <42> 1 FPE Floating Point Enable
+** <41> 1 MAP I-stream superpage mapping enable
+** <40> 1 HWE Allow PALRES to be issued in kernel mode
+** <39> 1 DI Dual Issue enable
+** <38> 1 BHE Branch History Enable
+** <37> 1 JSE JSR Stack Enable
+** <36> 1 BPE Branch Prediction Enable
+** <35> 1 PIPE Pipeline enable
+** <34:32> 3 MUX1 Performance Counter 1 Select
+** <11:08> 3 MUX0 Performance Counter 0 Select
+** <3> 1 PC0 Performance Counter 0 Interrupt Enable
+** <0> 1 PC1 Performance Counter 1 Interrupt Enable
+*/
+
+#define ICCSR_V_PME1 45
+#define ICCSR_M_PME1 (1<<(ICCSR_V_PME1-32))
+#define ICCSR_V_PME0 44
+#define ICCSR_M_PME0 (1<<(ICCSR_V_PME0-32))
+#define ICCSR_V_FPE 42
+#define ICCSR_M_FPE (1<<(ICCSR_V_FPE-32))
+#define ICCSR_V_MAP 41
+#define ICCSR_M_MAP (1<<(ICCSR_V_MAP-32))
+#define ICCSR_V_HWE 40
+#define ICCSR_M_HWE (1<<(ICCSR_V_HWE-32))
+#define ICCSR_V_DI 39
+#define ICCSR_M_DI (1<<(ICCSR_V_DI-32))
+#define ICCSR_V_BHE 38
+#define ICCSR_M_BHE (1<<(ICCSR_V_BHE-32))
+#define ICCSR_V_JSE 37
+#define ICCSR_M_JSE (1<<(ICCSR_V_JSE-32))
+#define ICCSR_V_BPE 36
+#define ICCSR_M_BPE (1<<(ICCSR_V_BPE-32))
+#define ICCSR_V_PIPE 35
+#define ICCSR_M_PIPE (1<<(ICCSR_V_PIPE-32))
+#define ICCSR_V_MUX1 32
+#define ICCSR_M_MUX1 (7<<(ICCSR_V_MUX1-32))
+#define ICCSR_V_MUX0 8
+#define ICCSR_M_MUX0 (0xF<<ICCSR_V_MUX0)
+#define ICCSR_V_PC0 3
+#define ICCSR_M_PC0 (1<<ICCSR_V_PC0)
+#define ICCSR_V_PC1 0
+#define ICCSR_M_PC1 (1<<ICCSR_V_PC1)
+
+/*
+** Exception Summary Register (EXC_SUM) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ------------------------------------
+** <33> 1 MSK Exception Register Write Mask window
+** <8> 1 IOV Integer overflow
+** <7> 1 INE Inexact result
+** <6> 1 UNF Underflow
+** <5> 1 OVF Overflow
+** <4> 1 DZE Division by zero
+** <3> 1 INV Invalid operation
+** <2> 1 SWC Software completion
+*/
+
+#define EXC_V_MSK 33
+#define EXC_M_MSK (1<<(EXC_V_MSK-32))
+#define EXC_V_IOV 8
+#define EXC_M_IOV (1<<EXC_V_IOV)
+#define EXC_V_INE 7
+#define EXC_M_INE (1<<EXC_V_INE)
+#define EXC_V_UNF 6
+#define EXC_M_UNF (1<<EXC_V_UNF)
+#define EXC_V_OVF 5
+#define EXC_M_OVF (1<<EXC_V_OVF)
+#define EXC_V_DZE 4
+#define EXC_M_DZE (1<<EXC_V_DZE)
+#define EXC_V_INV 3
+#define EXC_M_INV (1<<EXC_V_INV)
+#define EXC_V_SWC 2
+#define EXC_M_SWC (1<<EXC_V_SWC)
+
+#ifdef DC21064
+/*
+** Hardware Interrupt Request Register (HIRR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <13> 1 SLR Serial Line interrupt
+** <12:10> 3 IRQ Corresponds to pins Irq_h[2:0]
+** <9> 1 PC0 Performance Counter 0 interrupt
+** <8> 1 PC1 Performance Counter 1 interrupt
+** <7> 1 IRQ5 Corresponds to pin Irq_h[5]
+** <6> 1 IRQ4 Corresponds to pin Irq_h[4]
+** <5> 1 IRQ3 Corresponds to pin Irq_h[3]
+** <4> 1 CRR Correctable read data interrupt
+** <3> 1 ATR AST interrupt
+** <2> 1 SWR Software interrupt
+** <1> 1 HWR Hardware interrupt
+*/
+#endif /* DC21064 */
+
+#ifdef DC21066
+/*
+** Hardware Interrupt Request Register (HIRR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <13> 1 SLR Serial Line interrupt
+** <12:10> 3 IRQ Corresponds to pins Irq_h[2:0]
+** <9> 1 PC0 Performance Counter 0 interrupt
+** <8> 1 PC1 Performance Counter 1 interrupt
+** <6> 1 MERR Memory error interrupt
+** <5> 1 IERR IOC error interrupt
+** <4> 1 CRR Correctable read data interrupt
+** <3> 1 ATR AST interrupt
+** <2> 1 SWR Software interrupt
+** <1> 1 HWR Hardware interrupt
+*/
+#endif /* DC21066 */
+
+#define HIRR_V_SLR 13
+#define HIRR_M_SLR (1<<HIRR_V_SLR)
+
+#define HIRR_V_IRQ2 12
+#define HIRR_M_IRQ2 (1<<HIRR_V_IRQ2)
+#define HIRR_V_IRQ1 11
+#define HIRR_M_IRQ1 (1<<HIRR_V_IRQ1)
+#define HIRR_V_IRQ0 10
+#define HIRR_M_IRQ0 (1<<HIRR_V_IRQ0)
+
+#define HIRR_V_PC0 9
+#define HIRR_M_PC0 (1<<HIRR_V_PC0)
+#define HIRR_V_PC1 8
+#define HIRR_M_PC1 (1<<HIRR_V_PC1)
+
+#ifdef DC21064
+#define HIRR_V_IRQ5 7
+#define HIRR_M_IRQ5 (1<<HIRR_V_IRQ5)
+#define HIRR_V_IRQ4 6
+#define HIRR_M_IRQ4 (1<<HIRR_V_IRQ4)
+#define HIRR_V_IRQ3 5
+#define HIRR_M_IRQ3 (1<<HIRR_V_IRQ3)
+#endif /* DC21064 */
+
+#ifdef DC21066
+#define HIRR_V_MERR 6
+#define HIRR_M_MERR (1<<HIRR_V_MERR)
+#define HIRR_V_IERR 5
+#define HIRR_M_IERR (1<<HIRR_V_IERR)
+#endif /* DC21066 */
+
+#define HIRR_V_CRR 4
+#define HIRR_M_CRR (1<<HIRR_V_CRR)
+#define HIRR_V_ATR 3
+#define HIRR_M_ATR (1<<HIRR_V_ATR)
+#define HIRR_V_SWR 2
+#define HIRR_M_SWR (1<<HIRR_V_SWR)
+#define HIRR_V_HWR 1
+#define HIRR_M_HWR (1<<HIRR_V_HWR)
+
+/*
+** Hardware Interrupt Enable Register (HIER) Write Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <32> 1 SLE Serial Line interrupt enable
+** <15> 1 PC1 Performance Counter 1 interrupt enable
+** <14:9> 6 HIER Interrupt enables for Irq_h<5:0>
+** <8> 1 PC0 Performance Counter 0 interrupt enable
+** <2> 1 CRE Correctable read data interrupt enable
+*/
+
+#define HIERW_V_SLE 32
+#define HIERW_V_PC1 15
+#define HIERW_V_PC0 8
+#define HIERW_V_CRE 2
+#define HIERW_M_CRE (1<<HIERW_V_CRE)
+
+#define HIERR_V_CRE 4
+#define HIERR_M_CRE (1<<HIERR_V_CRE)
+
+/*
+** Clear Serial Line Interrupt Register (SL_CLR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <32> 1 SLC W0C -- Clear serial line int request
+** <15> 1 PC1 W0C -- Clear PC1 interrupt request
+** <8> 1 PC0 W0C -- Clear PC0 interrupt request
+** <2> 1 CRD W0C -- Clear CRD interrupt request
+*/
+
+#define SL_CLR_V_SLC 32
+#define SL_CLR_V_PC1 15
+#define SL_CLR_V_PC0 8
+#define SL_CLR_V_CRD 2
+
+/*
+** Abox IPR Definitions
+*/
+
+#define dtbCtl IPR_M_ABX + 0x0
+#define tbCtl IPR_M_ABX + 0x0
+#define dtbPte IPR_M_ABX + 0x2
+#define dtbPteTemp IPR_M_ABX + 0x3
+#define mmcsr IPR_M_ABX + 0x4
+#define va IPR_M_ABX + 0x5
+#define dtbZap IPR_M_ABX + 0x6
+#define dtbAsm IPR_M_ABX + 0x7
+#define dtbIs IPR_M_ABX + 0x8
+
+#ifdef DC21064
+#define biuAddr IPR_M_ABX + 0x9
+#define biuStat IPR_M_ABX + 0xA
+#endif /* DC21064 */
+
+#define dcAddr IPR_M_ABX + 0xB
+#define dcStat IPR_M_ABX + 0xC
+
+#ifdef DC21064
+#define fillAddr IPR_M_ABX + 0xD
+#endif /* DC21064 */
+
+#define aboxCtl IPR_M_ABX + 0xE
+#define altMode IPR_M_ABX + 0xF
+#define cc IPR_M_ABX + 0x10
+#define ccCtl IPR_M_ABX + 0x11
+
+#ifdef DC21064
+#define biuCtl IPR_M_ABX + 0x12
+#define fillSyndrome IPR_M_ABX + 0x13
+#define bcTag IPR_M_ABX + 0x14
+#endif /* DC21064 */
+
+#define flushIc IPR_M_ABX + 0x15
+#define flushIcAsm IPR_M_ABX + 0x17
+#define xtbZap IPR_M_ABX + IPR_M_IBX + 0x6
+#define xtbAsm IPR_M_ABX + IPR_M_IBX + 0x7
+
+/*
+** Memory Management Control and Status Register (MM_CSR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <14:9> 6 OPC Opcode of faulting instruction
+** <8:4> 5 RA Ra field of faulting instruction
+** <3> 1 FOW Fault on write
+** <2> 1 FOR Fault on read
+** <1> 1 ACV Access violation
+** <0> 1 WR Faulting reference is a write
+*/
+
+#define MMCSR_V_OPC 9
+#define MMCSR_M_OPC (0x7E<<MMCSR_V_OPC)
+#define MMCSR_V_RA 4
+#define MMCSR_M_RA (0x1F<<MMCSR_V_RA)
+#define MMCSR_V_FOW 3
+#define MMCSR_M_FOW (1<<MMCSR_V_FOW)
+#define MMCSR_V_FOR 2
+#define MMCSR_M_FOR (1<<MMCSR_V_FOR)
+#define MMCSR_V_ACV 1
+#define MMCSR_M_ACV (1<<MMCSR_V_ACV)
+#define MMCSR_V_WR 0
+#define MMCSR_M_WR (1<<MMCSR_V_WR)
+
+#define MMCSR_M_FAULT 0x000E
+
+/*
+** Abox Control Register (ABOX_CTL) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <14> 1 NOCHK_PAR EV45 - Set to disable checking of
+** primary cache parity
+** <13> 1 F_TAG_ERR EV45 - Set to generate bad primary
+** cache tag parity
+** <12> 1 DC_16K EV45 - Set to select 16KB cache
+** <11> 1 DC_FHIT Dcache Force Hit
+** <10> 1 DC_ENA Dcache Enable
+** <6> 1 EMD_EN Limited big endian support enable
+** <5> 1 SPE_2 D-stream superpage 1 enable
+** <4> 1 SPE_1 D-stream superpage 2 enable
+** <3> 1 IC_SBUF_EN Icache Stream Buffer Enable
+** <2> 1 CRD_EN Corrected Read Data Enable
+** <1> 1 MCHK_EN Machine Check Enable
+** <0> 1 WB_DIS Write Buffer unload Disable
+*/
+
+#define ABOX_V_NOCHK_PAR 14
+#define ABOX_M_NOCHK_PAR (1<<ABOX_V_NOCHK_PAR)
+#define ABOX_V_F_TAG_ERR 13
+#define ABOX_M_F_TAG_ERR (1<<ABOX_V_F_TAG_ERR)
+#define ABOX_V_DC_16K 12
+#define ABOX_M_DC_16K (1<<ABOX_V_DC_16K)
+#define ABOX_V_DC_FHIT 11
+#define ABOX_M_DC_FHIT (1<<ABOX_V_DC_FHIT)
+#define ABOX_V_DC_ENA 10
+#define ABOX_M_DC_ENA (1<<ABOX_V_DC_ENA)
+#define ABOX_V_EMD_EN 6
+#define ABOX_M_EMD_EN (1<<ABOX_V_EMD_EN)
+#define ABOX_V_SPE_2 5
+#define ABOX_M_SPE_2 (1<<ABOX_V_SPE_2)
+#define ABOX_V_SPE_1 4
+#define ABOX_M_SPE_1 (1<<ABOX_V_SPE_1)
+#define ABOX_V_IC_SBUF_EN 3
+#define ABOX_M_IC_SBUF_EN (1<<ABOX_V_IC_SBUF_EN)
+#define ABOX_V_CRD_EN 2
+#define ABOX_M_CRD_EN (1<<ABOX_V_CRD_EN)
+#define ABOX_V_MCHK_EN 1
+#define ABOX_M_MCHK_EN (1<<ABOX_V_MCHK_EN)
+#define ABOX_V_WB_DIS 0
+#define ABOX_M_WB_DIS (1<<ABOX_V_WB_DIS)
+
+
+#ifdef DC21064
+/*
+** Bus Interface Unit Control Register (BIU_CTL) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <39> 1 IMAP_EN Allow dMapWe<1:0> to assert on
+** I-stream backup cache reads
+** <37> 1 BYTE_PARITY External byte parity (ignore if ECC set)
+** <36> 1 BAD_DP Force bad data parity/ECC check bits
+** <35:32> 4 BC_PA_DIS Don't cache PA quadrant specified
+** <31> 1 BAD_TCP Force bad tag parity
+** <30:28> 3 BC_SIZE External cache size
+** <27:13> 16 BC_WE_CTL External cache write enable control
+** <11:8> 4 BC_WR_SPD External cache write speed
+** <7:4> 4 BC_RD_SPD External cache read speed
+** <3> 1 BC_FHIT External cache force hit
+** <2> 1 OE Output enable
+** <1> 1 ECC Enable ECC
+** <0> 1 BC_ENA External cache enable
+*/
+
+#define BIU_V_IMAP_EN 39
+#define BIU_M_IMAP_EN (1<<(BIU_V_IMAP_EN-32))
+#define BIU_V_BYTE_PARITY 37
+#define BIU_M_BYTE_PARITY (1<<(BIU_V_BYTE_PARITY-32))
+#define BIU_V_BAD_DP 36
+#define BIU_M_BAD_DP (1<<(BIU_V_BAD_DP-32))
+#define BIU_V_BC_PA_DIS 32
+#define BIU_M_BC_PA_DIS (0xF<<(BIU_V_BC_PA_DIS-32))
+#define BIU_V_BAD_TCP 31
+#define BIU_M_BAD_TCP (1<<(BIU_V_BAD_TCP-16))
+#define BIU_V_BC_SIZE 28
+#define BIU_M_BC_SIZE (7<<(BIU_V_BC_SIZE-16))
+#define BIU_V_BC_WE_CTL 13
+#define BIU_M_BC_WE_CTL (0x7FFF<<BIU_V_BC_WE_CTL)
+#define BIU_V_BC_WR_SPD 8
+#define BIU_M_BC_WR_SPD (0xF<<BIU_V_BC_WR_SPD)
+#define BIU_V_BC_RD_SPD 4
+#define BIU_M_BC_RD_SPD (0xF<<BIU_V_BC_RD_SPD)
+#define BIU_V_BC_FHIT 3
+#define BIU_M_BC_FHIT (1<<BIU_V_BC_FHIT)
+#define BIU_V_OE 2
+#define BIU_M_OE (1<<BIU_V_OE)
+#define BIU_V_ECC 1
+#define BIU_M_ECC (1<<BIU_V_ECC)
+#define BIU_V_BC_ENA 0
+#define BIU_M_BC_ENA (1<<BIU_V_BC_ENA)
+
+/*
+** Bus Interface Unit Status Register (BIU_STAT) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <14> 1 FILL_SEO Second error while FILL_ECC or FILL_DPERR
+** <13:12> 2 FILL_QW Used with FILL_ADDR for physical address
+** <11> 1 FILL_IRD Icache fill when FILL_ECC or FILL_DPERR
+** <10> 1 FILL_DPERR Fill parity error or double bit ECC
+** <9> 1 FILL_CRD Corrected read data
+** <8> 1 FILL_ECC ECC error
+** <7> 1 BIU_SEO Second error while BIU or BC error
+** <6:4> 3 BIU_CMD Cycle type
+** <3> 1 BC_TCPERR Tag control parity error on external cache
+** <2> 1 BC_TPERR Tag address parity error on external cache
+** <1> 1 BIU_SERR cAck_h pins indicate SOFT_ERROR
+** <0> 1 BIU_HERR cAck_h pins indicate HARD_ERROR
+*/
+
+#define BIU_STAT_V_FILL_SEO 14
+#define BIU_STAT_M_FILL_SEO (1<<BIU_STAT_V_FILL_SEO)
+#define BIU_STAT_V_FILL_CRD 9
+#define BIU_STAT_M_FILL_CRD (1<<BIU_STAT_V_FILL_CRD)
+#define BIU_STAT_V_FILL_ECC 8
+#define BIU_STAT_M_FILL_ECC (1<<BIU_STAT_V_FILL_ECC)
+#define BIU_STAT_V_BC_TCPERR 3
+#define BIU_STAT_M_BC_TCPERR (1<<BIU_STAT_V_BC_TCPERR)
+#define BIU_STAT_V_BC_TPERR 2
+#define BIU_STAT_M_BC_TPERR (1<<BIU_STAT_V_BC_TPERR)
+#define BIU_STAT_V_BIU_SERR 1
+#define BIU_STAT_M_BIU_SERR (1<<BIU_STAT_V_BIU_SERR)
+#define BIU_STAT_V_BIU_HERR 0
+#define BIU_STAT_M_BIU_HERR (1<<BIU_STAT_V_BIU_HERR)
+
+/*
+** Bus Interface Unit Status Register (BIU_STAT) definitions:
+**
+** These definitions specify masks for identifying hard errors and all
+** potential BIU errors, derived from BIU_STAT definitions.
+*/
+
+#define BIU_STAT_M_HARD (BIU_STAT_M_BC_TPERR | BIU_STAT_M_BC_TCPERR | \
+ BIU_STAT_M_BIU_HERR)
+
+#define BIU_STAT_M_ALL (BIU_STAT_M_BIU_HERR | BIU_STAT_M_BIU_SERR | \
+ BIU_STAT_M_BC_TPERR | BIU_STAT_M_BC_TCPERR | \
+ BIU_STAT_M_FILL_SEO)
+
+/*
+** Cache Status Register (C_STAT) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <5> 1 IC_ERR EV45 - ICache parity error
+** <4> 1 DC_ERR EV45 - DCache parity error
+** <3> 1 DC_HIT Dcache hit
+** <2:0> 3 EV4 - 111 binary (pass3, i.e. with ECC)
+** EV45 - 101 binary
+*/
+
+#define C_STAT_V_IC_ERR 5
+#define C_STAT_M_IC_ERR (1<<C_STAT_V_IC_ERR)
+#define C_STAT_V_DC_ERR 4
+#define C_STAT_M_DC_ERR (1<<C_STAT_V_DC_ERR)
+#define C_STAT_V_DC_HIT 3
+#define C_STAT_M_DC_HIT (1<<C_STAT_V_DC_HIT)
+
+#endif /* DC21064 */
+
+#ifdef DC21066
+
+/*======================================================================*/
+/* DC21066 MEMORY MAPPED CSR DEFINITIONS */
+/*======================================================================*/
+
+/*
+** Macro to create the base of a region of physical address space
+** The inputs are:
+** reg the register to which the physical base address is written
+** base base<5:0> to be shifted left 28 bits into <33:28>
+*/
+
+#define LOAD_REGION_BASE(reg,base) \
+ lda reg, base(r31); \
+ sll reg, 28, reg
+
+/*
+** Memory Controller (MEM_CTL) Register Definitions
+*/
+
+#define MEM_CSR_BASE 0x12 /* Bits <33:28> of physical address base */
+
+/*
+** Offsets to Memory Controller CSRs
+*/
+
+#define bcr0 0x0 /* Bank Configuration 0 */
+#define bcr1 0x8 /* Bank Configuration 1 */
+#define bcr2 0x10 /* Bank Configuration 2 */
+#define bcr3 0x18 /* Bank Configuration 3 */
+#define bmr0 0x20 /* Bank Mask 0 */
+#define bmr1 0x28 /* Bank Mask 1 */
+#define bmr2 0x30 /* Bank Mask 2 */
+#define bmr3 0x38 /* Bank Mask 3 */
+#define btr0 0x40 /* Bank Timing 0 */
+#define btr1 0x48 /* Bank Timing 1 */
+#define btr2 0x50 /* Bank Timing 2 */
+#define btr3 0x58 /* Bank Timing 3 */
+#define gtr 0x60 /* Global Timing */
+#define esr 0x68 /* Error Status */
+#define ear 0x70 /* Error Address */
+#define car 0x78 /* Backup Cache Control */
+#define vgr 0x80 /* Video and Graphics Control */
+#define plm 0x88 /* Plane Mask */
+#define for 0x90 /* Foreground */
+
+/*
+** Bank Configuration Register (BCR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <28:20> 9 BASE Bank Base Address
+** <14> 1 BAV Base Address Valid
+** <13> 1 SBE Split (dual) Bank Enable
+** <12> 1 BWE Byte Write Enable
+** <11> 1 WRM Write Mode
+** <10> 1 ERM Error Mode
+** <9:6> 4 RAS Row Address Select
+*/
+
+#define bcr_v_ras 6
+#define bcr_m_ras (0xF<<bcr_v_ras)
+#define bcr_v_erm 10
+#define bcr_m_erm (1<<bcr_v_erm)
+#define bcr_v_wrm 11
+#define bcr_m_wrm (1<<bcr_v_wrm)
+#define bcr_v_bwe 12
+#define bcr_m_bwe (1<<bcr_v_bwe)
+#define bcr_v_sbe 13
+#define bcr_m_sbe (1<<bcr_v_sbe)
+#define bcr_v_bav 14
+#define bcr_m_bav (1<<bcr_v_bav)
+#define bcr_v_base 20
+
+/*
+** Bank Address Mask Register (BMR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <28:20> 9 MASK Bank Address Mask
+*/
+
+#define bmr_v_mask 20
+
+/*
+** Cache Register (CAR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <31> 1 HIT Backup Cache Hit
+** <15> 1 PWR Power Saving
+** <14> 1 WHD Write Hold Time
+** <13:11> 3 WRS Backup Cache Write Speed
+** <10:08> 3 RDS Backup Cache Read Speed
+** <07:05> 3 SIZE Backup Cache Size
+** <4> 1 ECE Backup Cache ECC
+** <3> 1 WWP Write Wrong Tag Parity
+** <2> 1 ETP Enable Tag Parity
+** <0> 1 BCE Backup Cache Enable
+*/
+
+#define CAR_V_BCE 0
+#define CAR_M_BCE (1<<CAR_V_BCE)
+#define CAR_V_ETP 2
+#define CAR_M_ETP (1<<CAR_V_ETP)
+#define CAR_V_WWP 3
+#define CAR_M_WWP (1<<CAR_V_WWP)
+#define CAR_V_ECE 4
+#define CAR_M_ECE (1<<CAR_V_ECE)
+#define CAR_V_SIZE 5
+#define CAR_M_SIZE (7<<CAR_V_SIZE)
+#define CAR_V_RDS 8
+#define CAR_M_RDS (7<<CAR_V_RDS)
+#define CAR_V_WRS 11
+#define CAR_M_WRS (7<<CAR_V_WRS)
+#define CAR_V_WHD 14
+#define CAR_M_WHD (1<<CAR_V_WHD)
+#define CAR_V_PWR 15
+#define CAR_M_PWR (1<<CAR_V_PWR)
+#define CAR_V_HIT 31
+#define CAR_M_HIT (1<<CAR_V_HIT)
+
+/*
+** Error Status Register (ESR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <12> 1 NXM Non-existant memory address
+** <11> 1 ICE Ignore corrected errors
+** <10> 1 MHE Multiple hard errors
+** <9> 1 MSE Multiple soft errors
+** <7> 1 CTE Cache tag parity error
+** <4> 1 SOR Error source (0=cache, 1=DRAM)
+** <3> 1 WRE Error access type (0=read, 1=write)
+** <2> 1 UEE Uncorrectable ECC error
+** <1> 1 CEE Correctable ECC error
+** <0> 1 EAV Error address valid
+*/
+
+#define ESR_V_NXM 12
+#define ESR_M_NXM (1<<ESR_V_NXM)
+#define ESR_V_ICE 11
+#define ESR_M_ICE (1<<ESR_V_ICE)
+#define ESR_V_MHE 10
+#define ESR_M_MHE (1<<ESR_V_MHE)
+#define ESR_V_MSE 9
+#define ESR_M_MSE (1<<ESR_V_MSE)
+#define ESR_V_CTE 7
+#define ESR_M_CTE (1<<ESR_V_CTE)
+#define ESR_V_SOR 4
+#define ESR_M_SOR (1<<ESR_V_SOR)
+#define ESR_V_WRE 3
+#define ESR_M_WRE (1<<ESR_V_WRE)
+#define ESR_V_UEE 2
+#define ESR_M_UEE (1<<ESR_V_UEE)
+#define ESR_V_CEE 1
+#define ESR_M_CEE (1<<ESR_V_CEE)
+#define ESR_V_EAV 0
+#define ESR_M_EAV (1<<ESR_V_EAV)
+
+/*
+** Mask to set all the write-1-to-clear bits
+*/
+
+#define ESR_M_INIT ESR_M_CEE | \
+ ESR_M_UEE | \
+ ESR_M_CTE | \
+ ESR_M_NXM | \
+ ESR_M_MSE | \
+ ESR_M_MHE | \
+ ESR_M_ICE
+/*
+** Mask to set all the write-1-to-clear bits except cee and mse.
+*/
+
+#define ESR_M_ERR_NOT_CEE ESR_M_UEE | \
+ ESR_M_CTE | \
+ ESR_M_NXM | \
+ ESR_M_MHE
+/*
+** Mask to set all the write-1-to-clear bits except cee and mse,
+** plus other bits which could be non-zero.
+*/
+
+#define ESR_M_NOT_CEE ESR_M_UEE | \
+ ESR_M_CTE | \
+ ESR_M_NXM | \
+ ESR_M_MHE | \
+ ESR_M_EAV | \
+ ESR_M_WRE | \
+ ESR_M_SOR | \
+ ESR_M_ICE
+/*
+** Error Address Register (EAR)
+*/
+
+#define ear_max_bit 29
+
+
+/*
+** I/O Controller (IOC) Register Definitions
+*/
+
+#define IOC_CSR_BASE 0x18 /* Bits <33:28> of physical address base */
+
+/*
+** Offsets to I/O controller CSRs
+*/
+
+#define ioc_hae 0x0 /* Host address extension */
+#define ioc_conf 0x20 /* Configuration cycle type */
+#define ioc_stat0 0x40 /* Error status */
+#define ioc_stat1 0x60 /* Error address */
+#define ioc_tbia 0x80 /* Scatter gather TB invalidate */
+#define ioc_tben 0xa0 /* Scatter gather TB enable */
+#define ioc_pci_rst 0xc0 /* PCI reset */
+#define ioc_w_base0 0x100 /* Window Base 0*/
+#define ioc_w_base1 0x120 /* Window Base 1*/
+#define ioc_w_mask0 0x140 /* Window Mask 0*/
+#define ioc_w_mask1 0x160 /* Window Mask 1*/
+#define ioc_t_base0 0x180 /* Translated Base 0*/
+#define ioc_t_base1 0x1a0 /* Translated Base 1*/
+
+/*
+** Error Status Register (ESR) Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <31:13> 19 NBR Error address
+** <10:8> 3 CODE Error type
+** <7> 1 TREF Target window reference indicator
+** <6> 1 THIT TB hit indicator
+** <5> 1 LOST Lost error
+** <4> 1 ERR Error status valid
+** <3:0> 4 CMD PCI command field of error cycle
+*/
+
+#define IOC_V_NBR 13
+#define IOC_V_CODE 8
+#define IOC_M_CODE (7<<IOC_V_CODE)
+#define IOC_V_TREF 7
+#define IOC_M_TREF (1<<IOC_V_TREF)
+#define IOC_V_THIT 6
+#define IOC_M_THIT (1<<IOC_V_THIT)
+#define IOC_V_LOST 5
+#define IOC_M_LOST (1<<IOC_V_LOST)
+#define IOC_V_ERR 4
+#define IOC_M_ERR (1<<IOC_V_ERR)
+#define IOC_V_CMD 0
+#define IOC_M_CMD (0xF<<IOC_V_CMD)
+
+/*
+** Mask to set all the write-1-to-clear bits
+*/
+
+#define IOC_M_INIT (IOC_M_LOST | IOC_M_ERR)
+
+#define IOC_V_HAE 27
+
+/*
+** Window Base Register Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <33> 1 WEN Window Enable
+** <32> 1 SG Scatter Gather Enable
+** <31:20> 19 WBASE Window Base
+*/
+
+#define IOC_V_WEN 33
+
+/*
+** PCI Reset Bit Summary
+**
+** Loc Size Name Function
+** ----- ---- ---- ---------------------------------
+** <6> 1 PCI_RST PCI Reset Bit
+*/
+
+#define IOC_V_PCI_RST 6
+#define IOC_M_PCI_RST 0x4
+
+#endif /* DC21066 */
+
+/*======================================================================*/
+/* GENERAL PURPOSE REGISTER DEFINITIONS */
+/*======================================================================*/
+
+#define r0 $0
+#define r1 $1
+#define r2 $2
+#define r3 $3
+#define r4 $4
+#define r5 $5
+#define r6 $6
+#define r7 $7
+#define r8 $8
+#define r9 $9
+#define r10 $10
+#define r11 $11
+#define r12 $12
+#define r13 $13
+#define r14 $14
+#define r15 $15
+#define r16 $16
+#define r17 $17
+#define r18 $18
+#define r19 $19
+#define r20 $20
+#define r21 $21
+#define r22 $22
+#define r23 $23
+#define r24 $24
+#define r25 $25
+#define r26 $26
+#define r27 $27
+#define r28 $28
+#define r29 $29
+#define r30 $30
+#define r31 $31
+
+/*======================================================================*/
+/* FLOATING POINT REGISTER DEFINITIONS */
+/*======================================================================*/
+
+#define f0 $f0
+#define f1 $f1
+#define f2 $f2
+#define f3 $f3
+#define f4 $f4
+#define f5 $f5
+#define f6 $f6
+#define f7 $f7
+#define f8 $f8
+#define f9 $f9
+#define f10 $f10
+#define f11 $f11
+#define f12 $f12
+#define f13 $f13
+#define f14 $f14
+#define f15 $f15
+#define f16 $f16
+#define f17 $f17
+#define f18 $f18
+#define f19 $f19
+#define f20 $f20
+#define f21 $f21
+#define f22 $f22
+#define f23 $f23
+#define f24 $f24
+#define f25 $f25
+#define f26 $f26
+#define f27 $f27
+#define f28 $f28
+#define f29 $f29
+#define f30 $f30
+#define f31 $f31
+
+/*======================================================================*/
+/* PAL TEMPORARY REGISTER DEFINITIONS */
+/*======================================================================*/
+
+#define pt0 IPR_M_PAL + 0x0
+#define pt1 IPR_M_PAL + 0x1
+#define pt2 IPR_M_PAL + 0x2
+#define pt3 IPR_M_PAL + 0x3
+#define pt4 IPR_M_PAL + 0x4
+#define pt5 IPR_M_PAL + 0x5
+#define pt6 IPR_M_PAL + 0x6
+#define pt7 IPR_M_PAL + 0x7
+#define pt8 IPR_M_PAL + 0x8
+#define pt9 IPR_M_PAL + 0x9
+#define pt10 IPR_M_PAL + 0xA
+#define pt11 IPR_M_PAL + 0xB
+#define pt12 IPR_M_PAL + 0xC
+#define pt13 IPR_M_PAL + 0xD
+#define pt14 IPR_M_PAL + 0XE
+#define pt15 IPR_M_PAL + 0xF
+#define pt16 IPR_M_PAL + 0x10
+#define pt17 IPR_M_PAL + 0x11
+#define pt18 IPR_M_PAL + 0x12
+#define pt19 IPR_M_PAL + 0x13
+#define pt20 IPR_M_PAL + 0x14
+#define pt21 IPR_M_PAL + 0x15
+#define pt22 IPR_M_PAL + 0x16
+#define pt23 IPR_M_PAL + 0x17
+#define pt24 IPR_M_PAL + 0x18
+#define pt25 IPR_M_PAL + 0x19
+#define pt26 IPR_M_PAL + 0x1A
+#define pt27 IPR_M_PAL + 0x1B
+#define pt28 IPR_M_PAL + 0x1C
+#define pt29 IPR_M_PAL + 0x1D
+#define pt30 IPR_M_PAL + 0x1E
+#define pt31 IPR_M_PAL + 0x1F
+
+/*======================================================================*/
+/* DECchip 21064/21066 Privileged Architecture Library Entry Points */
+/*======================================================================*/
+
+/*
+** Entry Name Offset (Hex) Length (Instructions)
+**
+** RESET 0000 8
+** MCHK 0020 16
+** ARITH 0060 32
+** INTERRUPT 00E0 64
+** D_FAULT 01E0 128
+** ITB_MISS 03E0 256
+** ITB_ACV 07E0 64
+** DTB_MISS (Native) 08E0 64
+** DTB_MISS (PAL) 09E0 512
+** UNALIGN 11E0 128
+** OPCDEC 13E0 256
+** FEN 17E0 520
+** CALL_PAL (Privileged) 2000
+** CALL_PAL (Unprivileged) 3000
+*/
+
+#define PAL_RESET_ENTRY 0x0000
+#define PAL_MCHK_ENTRY 0x0020
+#define PAL_ARITH_ENTRY 0x0060
+#define PAL_INTERRUPT_ENTRY 0x00E0
+#define PAL_D_FAULT_ENTRY 0x01E0
+#define PAL_ITB_MISS_ENTRY 0x03E0
+#define PAL_ITB_ACV_ENTRY 0x07E0
+#define PAL_NDTB_MISS_ENTRY 0x08E0
+#define PAL_PDTB_MISS_ENTRY 0x09E0
+#define PAL_UNALIGN_ENTRY 0x11E0
+#define PAL_OPCDEC_ENTRY 0x13E0
+#define PAL_FEN_ENTRY 0x17E0
+#define PAL_CALL_PAL_PRIV_ENTRY 0x2000
+#define PAL_CALL_PAL_UNPRIV_ENTRY 0x3000
+
+/*
+** Architecturally Reserved Opcode Definitions
+*/
+
+#define mtpr hw_mtpr
+#define mfpr hw_mfpr
+
+#define ldl_a hw_ldl/a
+#define ldq_a hw_ldq/a
+#define stq_a hw_stq/a
+#define stl_a hw_stl/a
+
+#define ldl_p hw_ldl/p
+#define ldq_p hw_ldq/p
+#define stl_p hw_stl/p
+#define stq_p hw_stq/p
+
+/*
+** Physical mode load-lock and store-conditional variants of
+** HW_LD and HW_ST.
+*/
+
+#define ldl_pa hw_ldl/pa
+#define ldq_pa hw_ldq/pa
+#define stl_pa hw_stl/pa
+#define stq_pa hw_stq/pa
+
+/*
+** This table is an accounting of the DECchip 21064/21066 storage
+** used to implement the SRM defined state for OSF/1.
+*/
+
+#define pt2_iccsr IPR_M_PAL + IPR_M_IBX + 0x2 /* ICCSR shadow register*/
+
+#define pt9_ps IPR_M_PAL + IPR_M_IBX + 0x9 /* PS shadow register */
+
+#define ptEntInt pt10 /* Entry point to HW interrupt dispatch */
+
+#if defined(KDEBUG)
+
+#define ptEntDbg pt11 /* Entry point to kernel debugger */
+
+#endif /* KDEBUG */
+
+#define ptEntArith pt12 /* Entry point to arithmetic trap dispatch */
+#define ptEntMM pt13 /* Entry point to MM fault dispatch */
+#define ptEntUna pt14 /* Entry point to unaligned access dispatch */
+#define ptEntSys pt15 /* Entry point to syscall dispatch */
+#define ptEntIF pt16 /* Entry point to instruction fault dispatch*/
+#define ptImpure pt17 /* Pointer to common impure area */
+#define ptUsp pt18 /* User stack pointer */
+#define ptKsp pt19 /* Kernel stack pointer */
+#define ptKgp pt20 /* Kernel global pointer */
+
+#define ptIntMask pt22 /* Interrupt enable masks for IRQ_L<7:0> */
+
+#define ptSysVal pt24 /* Per-processor system value */
+#define ptMces pt25 /* Machine check error status */
+#define ptWhami pt27 /* Who-Am-I ... and why am I here! ;^) */
+#define ptPtbr pt28 /* Page table base register */
+#define ptVptPtr pt29 /* Virtual page table pointer */
+
+#define ptPrevPal pt30 /* Previous PAL base */
+#define ptPrcb pt31 /* Pointer to process control block */
+
+#endif /* __DC21064_LOADED */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/dc21164.h freebios/util/alpha-common/include/dc21164.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/dc21164.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/dc21164.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,964 @@
+#ifndef __DC21164_LOADED
+#define __DC21164_LOADED 1
+/*
+*****************************************************************************
+** *
+** Copyright � 1993, 1994 *
+** by Digital Equipment Corporation, Maynard, Massachusetts. *
+** *
+** All Rights Reserved *
+** *
+** Permission is hereby granted to use, copy, modify and distribute *
+** this software and its documentation, in both source code and *
+** object code form, and without fee, for the purpose of distribution *
+** of this software or modifications of this software within products *
+** incorporating an integrated circuit implementing Digital's AXP *
+** architecture, regardless of the source of such integrated circuit, *
+** provided that the above copyright notice and this permission notice *
+** appear in all copies, and that the name of Digital Equipment *
+** Corporation not be used in advertising or publicity pertaining to *
+** distribution of the document or software without specific, written *
+** prior permission. *
+** *
+** Digital Equipment Corporation disclaims all warranties and/or *
+** guarantees with regard to this software, including all implied *
+** warranties of fitness for a particular purpose and merchantability, *
+** and makes no representations regarding the use of, or the results *
+** of the use of, the software and documentation in terms of correctness, *
+** accuracy, reliability, currentness or otherwise; and you rely on *
+** the software, documentation and results solely at your own risk. *
+** *
+** AXP is a trademark of Digital Equipment Corporation. *
+** *
+*****************************************************************************
+**
+** FACILITY:
+**
+** DECchip 21164 PALcode
+**
+** MODULE:
+**
+** dc21164.h
+**
+** MODULE DESCRIPTION:
+**
+** DECchip 21164 specific definitions
+**
+** AUTHOR: ER
+**
+** CREATION DATE: 24-Nov-1993
+**
+** $Id: dc21164.h,v 1.1 2000/03/21 03:56:31 stepan Exp $
+**
+** MODIFICATION HISTORY:
+**
+** $Log: dc21164.h,v $
+** Revision 1.1 2000/03/21 03:56:31 stepan
+** Check in current version which is a nearly a 2.2-16
+**
+** Revision 1.15 1995/04/21 02:06:30 fdh
+** Replaced C++ style comments with Standard C style comments.
+**
+** Revision 1.14 1995/03/20 14:55:23 samberg
+** Add flushIc to make Roger Cruz's life easier.
+**
+** Revision 1.13 1994/12/14 15:52:48 samberg
+** Add slXmit and slRcv bit definitions
+**
+** Revision 1.12 1994/09/07 15:43:49 samberg
+** Changes for Makefile.vpp, take out OSF definition
+**
+** Revision 1.11 1994/07/26 17:38:35 samberg
+** Changes for SD164.
+**
+** Revision 1.10 1994/07/08 17:02:12 samberg
+** Changes to support platform specific additions
+**
+** Revision 1.8 1994/05/31 15:49:21 ericr
+** Moved ptKdebug from pt10 to pt13; pt10 is used in MCHK flows
+**
+** Revision 1.7 1994/05/26 19:29:51 ericr
+** Added BC_CONFIG definitions
+**
+** Revision 1.6 1994/05/25 14:27:25 ericr
+** Added physical bit to ldq_lp and stq_cp macros
+**
+** Revision 1.5 1994/05/20 18:07:50 ericr
+** Changed line comments to C++ style comment character
+**
+** Revision 1.4 1994/01/17 21:46:54 ericr
+** Added floating point register definitions
+**
+** Revision 1.3 1994/01/03 19:31:49 ericr
+** Added cache parity error status register definitions
+**
+** Revision 1.2 1993/12/22 20:42:35 eric
+** Added ptTrap, ptMisc and flag definitions
+** Added PAL shadow regsiter definitions
+**
+** Revision 1.1 1993/12/16 21:55:05 eric
+** Initial revision
+**
+**
+**--
+*/
+
+
+/*
+**
+** INTERNAL PROCESSOR REGISTER DEFINITIONS
+**
+** The internal processor register definitions below are annotated
+** with one of the following symbols:
+**
+** RW - The register may be read and written
+** RO - The register may only be read
+** WO - The register may only be written
+**
+** For RO and WO registers, all bits and fields within the register are
+** also read-only or write-only. For RW registers, each bit or field
+** within the register is annotated with one of the following:
+**
+** RW - The bit/field may be read and written
+** RO - The bit/field may be read; writes are ignored
+** WO - The bit/field may be written; reads return UNPREDICTABLE
+** WZ - The bit/field may be written; reads return a zero value
+** W0C - The bit/field may be read; write-zero-to-clear
+** W1C - The bit/field may be read; write-one-to-clear
+** WA - The bit/field may be read; write-anything-to-clear
+** RC - The bit/field may be read, causing state to clear;
+** writes are ignored
+**
+*/
+
+
+/*
+**
+** Ibox IPR Definitions:
+**
+*/
+
+#define isr 0x100 /* RO - Interrupt Summary */
+#define itbTag 0x101 /* WO - ITB Tag */
+#define itbPte 0x102 /* RW - ITB Page Table Entry */
+#define itbAsn 0x103 /* RW - ITB Address Space Number */
+#define itbPteTemp 0x104 /* RO - ITB Page Table Entry Temporary */
+#define itbIa 0x105 /* WO - ITB Invalidate All */
+#define itbIap 0x106 /* WO - ITB Invalidate All Process */
+#define itbIs 0x107 /* WO - ITB Invalidate Single */
+#define sirr 0x108 /* RW - Software Interrupt Request */
+#define astrr 0x109 /* RW - Async. System Trap Request */
+#define aster 0x10A /* RW - Async. System Trap Enable */
+#define excAddr 0x10B /* RW - Exception Address */
+#define excSum 0x10C /* RW - Exception Summary */
+#define excMask 0x10D /* RO - Exception Mask */
+#define palBase 0x10E /* RW - PAL Base */
+#define ips 0x10F /* RW - Processor Status */
+#define ipl 0x110 /* RW - Interrupt Priority Level */
+#define intId 0x111 /* RO - Interrupt ID */
+#define iFaultVaForm 0x112 /* RO - Formatted Faulting VA */
+#define iVptBr 0x113 /* RW - I-Stream Virtual Page Table Base */
+#define hwIntClr 0x115 /* WO - Hardware Interrupt Clear */
+#define slXmit 0x116 /* WO - Serial Line Transmit */
+#define slRcv 0x117 /* RO - Serial Line Receive */
+#define icsr 0x118 /* RW - Ibox Control/Status */
+#define icFlush 0x119 /* WO - I-Cache Flush Control */
+#define flushIc 0x119 /* WO - I-Cache Flush Control (DC21064 Symbol) */
+#define icPerr 0x11A /* RW - I-Cache Parity Error Status */
+#define PmCtr 0x11C /* RW - Performance Counter */
+
+/*
+**
+** Ibox Control/Status Register (ICSR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <39> 1 TST RW,0 Assert Test Status
+** <38> 1 ISTA RO I-Cache BIST Status
+** <37> 1 DBS RW,1 Debug Port Select
+** <36> 1 FBD RW,0 Force Bad I-Cache Data Parity
+** <35> 1 FBT RW,0 Force Bad I-Cache Tag Parity
+** <34> 1 FMS RW,0 Force I-Cache Miss
+** <33> 1 SLE RW,0 Enable Serial Line Interrupts
+** <32> 1 CRDE RW,0 Enable Correctable Error Interrupts
+** <30> 1 SDE RW,0 Enable PAL Shadow Registers
+** <29:28> 2 SPE RW,0 Enable I-Stream Super Page Mode
+** <27> 1 HWE RW,0 Enable PALRES Instrs in Kernel Mode
+** <26> 1 FPE RW,0 Enable Floating Point Instructions
+** <25> 1 TMD RW,0 Disable Ibox Timeout Counter
+** <24> 1 TMM RW,0 Timeout Counter Mode
+**
+*/
+
+#define ICSR_V_TST 39
+#define ICSR_M_TST (1<<ICSR_V_TST)
+#define ICSR_V_ISTA 38
+#define ICSR_M_ISTA (1<<ICSR_V_ISTA)
+#define ICSR_V_DBS 37
+#define ICSR_M_DBS (1<<ICSR_V_DBS)
+#define ICSR_V_FBD 36
+#define ICSR_M_FBD (1<<ICSR_V_FBD)
+#define ICSR_V_FBT 35
+#define ICSR_M_FBT (1<<ICSR_V_FBT)
+#define ICSR_V_FMS 34
+#define ICSR_M_FMS (1<<ICSR_V_FMS)
+#define ICSR_V_SLE 33
+#define ICSR_M_SLE (1<<ICSR_V_SLE)
+#define ICSR_V_CRDE 32
+#define ICSR_M_CRDE (1<<ICSR_V_CRDE)
+#define ICSR_V_SDE 30
+#define ICSR_M_SDE (1<<ICSR_V_SDE)
+#define ICSR_V_SPE 28
+#define ICSR_M_SPE (3<<ICSR_V_SPE)
+#define ICSR_V_HWE 27
+#define ICSR_M_HWE (1<<ICSR_V_HWE)
+#define ICSR_V_FPE 26
+#define ICSR_M_FPE (1<<ICSR_V_FPE)
+#define ICSR_V_TMD 25
+#define ICSR_M_TMD (1<<ICSR_V_TMD)
+#define ICSR_V_TMM 24
+#define ICSR_M_TMM (1<<ICSR_V_TMM)
+
+/*
+**
+** Serial Line Tranmit Register (SL_XMIT)
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <7> 1 TMT WO,1 Serial line transmit data
+**
+*/
+
+#define SLXMIT_V_TMT 7
+#define SLXMIT_M_TMT (1<<SLXMIT_V_TMT)
+
+/*
+**
+** Serial Line Receive Register (SL_RCV)
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <6> 1 RCV RO Serial line receive data
+**
+*/
+
+#define SLRCV_V_RCV 6
+#define SLRCV_M_RCV (1<<SLRCV_V_RCV)
+
+/*
+**
+** Icache Parity Error Status Register (ICPERR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <13> 1 TMR W1C Timeout reset error
+** <12> 1 TPE W1C Tag parity error
+** <11> 1 DPE W1C Data parity error
+**
+*/
+
+#define ICPERR_V_TMR 13
+#define ICPERR_M_TMR (1<<ICPERR_V_TMR)
+#define ICPERR_V_TPE 12
+#define ICPERR_M_TPE (1<<ICPERR_V_TPE)
+#define ICPERR_V_DPE 11
+#define ICPERR_M_DPE (1<<ICPERR_V_DPE)
+
+#define ICPERR_M_ALL (ICPERR_M_TMR | ICPERR_M_TPE | ICPERR_M_DPE)
+
+/*
+**
+** Exception Summary Register (EXC_SUM) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <16> 1 IOV WA Integer overflow
+** <15> 1 INE WA Inexact result
+** <14> 1 UNF WA Underflow
+** <13> 1 FOV WA Overflow
+** <12> 1 DZE WA Division by zero
+** <11> 1 INV WA Invalid operation
+** <10> 1 SWC WA Software completion
+**
+*/
+
+#define EXC_V_IOV 16
+#define EXC_M_IOV (1<<EXC_V_IOV)
+#define EXC_V_INE 15
+#define EXC_M_INE (1<<EXC_V_INE)
+#define EXC_V_UNF 14
+#define EXC_M_UNF (1<<EXC_V_UNF)
+#define EXC_V_FOV 13
+#define EXC_M_FOV (1<<EXC_V_FOV)
+#define EXC_V_DZE 12
+#define EXC_M_DZE (1<<EXC_V_DZE)
+#define EXC_V_INV 11
+#define EXC_M_INV (1<<EXC_V_INV)
+#define EXC_V_SWC 10
+#define EXC_M_SWC (1<<EXC_V_SWC)
+
+/*
+**
+** Hardware Interrupt Clear Register (HWINT_CLR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <33> 1 SLC W1C Clear Serial Line interrupt
+** <32> 1 CRDC W1C Clear Correctable Read Data interrupt
+** <29> 1 PC2C W1C Clear Performance Counter 2 interrupt
+** <28> 1 PC1C W1C Clear Performance Counter 1 interrupt
+** <27> 1 PC0C W1C Clear Performance Counter 0 interrupt
+**
+*/
+
+#define HWINT_V_SLC 33
+#define HWINT_M_SLC (1<<HWINT_V_SLC)
+#define HWINT_V_CRDC 32
+#define HWINT_M_CRDC (1<<HWINT_V_CRDC)
+#define HWINT_V_PC2C 29
+#define HWINT_M_PC2C (1<<HWINT_V_PC2C)
+#define HWINT_V_PC1C 28
+#define HWINT_M_PC1C (1<<HWINT_V_PC1C)
+#define HWINT_V_PC0C 27
+#define HWINT_M_PC0C (1<<HWINT_V_PC0C)
+
+/*
+**
+** Interrupt Summary Register (ISR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <34> 1 HLT RO External Halt interrupt
+** <33> 1 SLI RO Serial Line interrupt
+** <32> 1 CRD RO Correctable ECC errors
+** <31> 1 MCK RO System Machine Check
+** <30> 1 PFL RO Power Fail
+** <29> 1 PC2 RO Performance Counter 2 interrupt
+** <28> 1 PC1 RO Performance Counter 1 interrupt
+** <27> 1 PC0 RO Performance Counter 0 interrupt
+** <23> 1 I23 RO External Hardware interrupt
+** <22> 1 I22 RO External Hardware interrupt
+** <21> 1 I21 RO External Hardware interrupt
+** <20> 1 I20 RO External Hardware interrupt
+** <19> 1 ATR RO Async. System Trap request
+** <18:4> 15 SIRR RO,0 Software Interrupt request
+** <3:0> 4 ASTRR RO Async. System Trap request (USEK)
+**
+**/
+
+#define ISR_V_HLT 34
+#define ISR_M_HLT (1<<ISR_V_HLT)
+#define ISR_V_SLI 33
+#define ISR_M_SLI (1<<ISR_V_SLI)
+#define ISR_V_CRD 32
+#define ISR_M_CRD (1<<ISR_V_CRD)
+#define ISR_V_MCK 31
+#define ISR_M_MCK (1<<ISR_V_MCK)
+#define ISR_V_PFL 30
+#define ISR_M_PFL (1<<ISR_V_PFL)
+#define ISR_V_PC2 29
+#define ISR_M_PC2 (1<<ISR_V_PC2)
+#define ISR_V_PC1 28
+#define ISR_M_PC1 (1<<ISR_V_PC1)
+#define ISR_V_PC0 27
+#define ISR_M_PC0 (1<<ISR_V_PC0)
+#define ISR_V_I23 23
+#define ISR_M_I23 (1<<ISR_V_I23)
+#define ISR_V_I22 22
+#define ISR_M_I22 (1<<ISR_V_I22)
+#define ISR_V_I21 21
+#define ISR_M_I21 (1<<ISR_V_I21)
+#define ISR_V_I20 20
+#define ISR_M_I20 (1<<ISR_V_I20)
+#define ISR_V_ATR 19
+#define ISR_M_ATR (1<<ISR_V_ATR)
+#define ISR_V_SIRR 4
+#define ISR_M_SIRR (0x7FFF<<ISR_V_SIRR)
+#define ISR_V_ASTRR 0
+#define ISR_M_ASTRR (0xF<<ISR_V_ASTRR)
+
+/*
+**
+** Mbox and D-Cache IPR Definitions:
+**
+*/
+
+#define dtbAsn 0x200 /* WO - DTB Address Space Number */
+#define dtbCm 0x201 /* WO - DTB Current Mode */
+#define dtbTag 0x202 /* WO - DTB Tag */
+#define dtbPte 0x203 /* RW - DTB Page Table Entry */
+#define dtbPteTemp 0x204 /* RO - DTB Page Table Entry Temporary */
+#define mmStat 0x205 /* RO - D-Stream MM Fault Status */
+#define va 0x206 /* RO - Faulting Virtual Address */
+#define vaForm 0x207 /* RO - Formatted Virtual Address */
+#define mVptBr 0x208 /* WO - Mbox Virtual Page Table Base */
+#define dtbIap 0x209 /* WO - DTB Invalidate All Process */
+#define dtbIa 0x20A /* WO - DTB Invalidate All */
+#define dtbIs 0x20B /* WO - DTB Invalidate Single */
+#define altMode 0x20C /* WO - Alternate Mode */
+#define cc 0x20D /* WO - Cycle Counter */
+#define ccCtl 0x20E /* WO - Cycle Counter Control */
+#define mcsr 0x20F /* RW - Mbox Control Register */
+#define dcFlush 0x210 /* WO - Dcache Flush */
+#define dcPerr 0x212 /* RW - Dcache Parity Error Status */
+#define dcTestCtl 0x213 /* RW - Dcache Test Tag Control */
+#define dcTestTag 0x214 /* RW - Dcache Test Tag */
+#define dcTestTagTemp 0x215 /* RW - Dcache Test Tag Temporary */
+#define dcMode 0x216 /* RW - Dcache Mode */
+#define mafMode 0x217 /* RW - Miss Address File Mode */
+
+/*
+**
+** D-Stream MM Fault Status Register (MM_STAT) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <16:11> 6 OPCODE RO Opcode of faulting instruction
+** <10:06> 5 RA RO Ra field of faulting instruction
+** <5> 1 BAD_VA RO Bad virtual address
+** <4> 1 DTB_MISS RO Reference resulted in DTB miss
+** <3> 1 FOW RO Fault on write
+** <2> 1 FOR RO Fault on read
+** <1> 1 ACV RO Access violation
+** <0> 1 WR RO Reference type
+**
+*/
+
+#define MMSTAT_V_OPC 11
+#define MMSTAT_M_OPC (0x3F<<MMSTAT_V_OPC)
+#define MMSTAT_V_RA 6
+#define MMSTAT_M_RA (0x1F<<MMSTAT_V_RA)
+#define MMSTAT_V_BAD_VA 5
+#define MMSTAT_M_BAD_VA (1<<MMSTAT_V_BAD_VA)
+#define MMSTAT_V_DTB_MISS 4
+#define MMSTAT_M_DTB_MISS (1<<MMSTAT_V_DTB_MISS)
+#define MMSTAT_V_FOW 3
+#define MMSTAT_M_FOW (1<<MMSTAT_V_FOW)
+#define MMSTAT_V_FOR 2
+#define MMSTAT_M_FOR (1<<MMSTAT_V_FOR)
+#define MMSTAT_V_ACV 1
+#define MMSTAT_M_ACV (1<<MMSTAT_V_ACV)
+#define MMSTAT_V_WR 0
+#define MMSTAT_M_WR (1<<MMSTAT_V_WR)
+
+
+/*
+**
+** Mbox Control Register (MCSR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <5> 1 DBG1 RW,0 Mbox Debug Packet Select
+** <4> 1 E_BE RW,0 Ebox Big Endian mode enable
+** <3> 1 DBG0 RW,0 Debug Test Select
+** <2:1> 2 SP RW,0 Superpage mode enable
+** <0> 1 M_BE RW,0 Mbox Big Endian mode enable
+**
+*/
+
+#define MCSR_V_DBG1 5
+#define MCSR_M_DBG1 (1<<MCSR_V_DBG1)
+#define MCSR_V_E_BE 4
+#define MCSR_M_E_BE (1<<MCSR_V_E_BE)
+#define MCSR_V_DBG0 3
+#define MCSR_M_DBG0 (1<<MCSR_V_DBG0)
+#define MCSR_V_SP 1
+#define MCSR_M_SP (3<<MCSR_V_SP)
+#define MCSR_V_M_BE 0
+#define MCSR_M_M_BE (1<<MCSR_V_M_BE)
+
+/*
+**
+** Dcache Parity Error Status Register (DCPERR) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ------------------------------------
+** <5> 1 TP1 RO Dcache bank 1 tag parity error
+** <4> 1 TP0 RO Dcache bank 0 tag parity error
+** <3> 1 DP1 RO Dcache bank 1 data parity error
+** <2> 1 DP0 RO Dcache bank 0 data parity error
+** <1> 1 LOCK W1C Locks/clears bits <5:2>
+** <0> 1 SEO W1C Second Dcache parity error occurred
+**
+*/
+
+#define DCPERR_V_TP1 5
+#define DCPERR_M_TP1 (1<<DCPERR_V_TP1)
+#define DCPERR_V_TP0 4
+#define DCPERR_M_TP0 (1<<DCPERR_V_TP0)
+#define DCPERR_V_DP1 3
+#define DCPERR_M_DP1 (1<<DCPERR_V_DP1)
+#define DCPERR_V_DP0 2
+#define DCPERR_M_DP0 (1<<DCPERR_V_DP0)
+#define DCPERR_V_LOCK 1
+#define DCPERR_M_LOCK (1<<DCPERR_V_LOCK)
+#define DCPERR_V_SEO 0
+#define DCPERR_M_SEO (1<<DCPERR_V_SEO)
+
+#define DCPERR_M_ALL (DCPERR_M_LOCK | DCPERR_M_SEO)
+
+/*
+**
+** Dcache Mode Register (DC_MODE) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <4> 1 DOA RO Hardware Dcache Disable
+** <3> 1 PERR_DIS RW,0 Disable Dcache Parity Error reporting
+** <2> 1 BAD_DP RW,0 Force Dcache data bad parity
+** <1> 1 FHIT RW,0 Force Dcache hit
+** <0> 1 ENA RW,0 Software Dcache Enable
+**
+*/
+
+#define DC_V_DOA 4
+#define DC_M_DOA (1<<DC_V_DOA)
+#define DC_V_PERR_DIS 3
+#define DC_M_PERR_DIS (1<<DC_V_PERR_DIS)
+#define DC_V_BAD_DP 2
+#define DC_M_BAD_DP (1<<DC_V_BAD_DP)
+#define DC_V_FHIT 1
+#define DC_M_FHIT (1<<DC_V_FHIT)
+#define DC_V_ENA 0
+#define DC_M_ENA (1<<DC_V_ENA)
+
+/*
+**
+** Miss Address File Mode Register (MAF_MODE) Bit Summay
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <7> 1 WB RO,0 If set, pending WB request
+** <6> 1 DREAD RO,0 If set, pending D-read request
+**
+*/
+
+#define MAF_V_WB_PENDING 7
+#define MAF_M_WB_PENDING (1<<MAF_V_WB_PENDING)
+#define MAF_V_DREAD_PENDING 6
+#define MAF_M_DREAD_PENDING (1<<MAF_V_DREAD_PENDING)
+
+/*
+**
+** Cbox IPR Definitions:
+**
+*/
+
+#define scCtl 0x0A8 /* RW - Scache Control */
+#define scStat 0x0E8 /* RO - Scache Error Status */
+#define scAddr 0x188 /* RO - Scache Error Address */
+#define bcCtl 0x128 /* WO - Bcache/System Interface Control */
+#define bcCfg 0x1C8 /* WO - Bcache Configuration Parameters */
+#define bcTagAddr 0x108 /* RO - Bcache Tag */
+#define eiStat 0x168 /* RO - Bcache/System Error Status */
+#define eiAddr 0x148 /* RO - Bcache/System Error Address */
+#define fillSyn 0x068 /* RO - Fill Syndrome */
+#define ldLock 0x1E8 /* RO - LDx_L Address */
+
+/*
+**
+** Scache Control Register (SC_CTL) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <15:13> 3 SET_EN RW,1 Set enable
+** <12> 1 BLK_SIZE RW,1 Scache/Bcache block size select
+** <11:08> 4 FB_DP RW,0 Force bad data parity
+** <07:02> 6 TAG_STAT RW Tag status and parity
+** <1> 1 FLUSH RW,0 If set, clear all tag valid bits
+** <0> 1 FHIT RW,0 Force hits
+**
+*/
+
+#define SC_V_SET_EN 13
+#define SC_M_SET_EN (7<<SC_V_SET_EN)
+#define SC_V_BLK_SIZE 12
+#define SC_M_BLK_SIZE (1<<SC_V_BLK_SIZE)
+#define SC_V_FB_DP 8
+#define SC_M_FB_DP (0xF<<SC_V_FB_DP)
+#define SC_V_TAG_STAT 2
+#define SC_M_TAG_STAT (0x3F<<SC_V_TAG_STAT)
+#define SC_V_FLUSH 1
+#define SC_M_FLUSH (1<<SC_V_FLUSH)
+#define SC_V_FHIT 0
+#define SC_M_FHIT (1<<SC_V_FHIT)
+
+/*
+**
+** Bcache Control Register (BC_CTL) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <27> 1 DIS_VIC_BUF WO,0 Disable Scache victim buffer
+** <26> 1 DIS_BAF_BYP WO,0 Disable speculative Bcache reads
+** <25> 1 DBG_MUX_SEL WO,0 Debug MUX select
+** <24:19> 6 PM_MUX_SEL WO,0 Performance counter MUX select
+** <18:17> 2 BC_WAVE WO,0 Number of cycles of wave pipelining
+** <16> 1 TL_PIPE_LATCH WO,0 Pipe system control pins
+** <15> 1 EI_DIS_ERR WO,1 Disable ECC (parity) error
+** <14:13> 2 BC_BAD_DAT WO,0 Force bad data
+** <12:08> 5 BC_TAG_STAT WO Bcache tag status and parity
+** <7> 1 BC_FHIT WO,0 Bcache force hit
+** <6> 1 EI_ECC WO,1 ECC or byte parity mode
+** <5> 1 VTM_FIRST WO,1 Drive out victim block address first
+** <4> 1 CORR_FILL_DAT WO,1 Correct fill data
+** <3> 1 EI_CMD_GRP3 WO,0 Drive MB command to external pins
+** <2> 1 EI_CMD_GRP2 WO,0 Drive LOCK & SET_DIRTY to ext. pins
+** <1> 1 ALLOC_CYC WO,0 Allocate cycle for non-cached LDs.
+** <0> 1 BC_ENA W0,0 Bcache enable
+**
+*/
+#define BC_V_DIS_SC_VIC_BUF 27
+#define BC_M_DIS_SC_VIC_BUF (1<<BC_V_DIS_SC_VIC_BUF)
+#define BC_V_DIS_BAF_BYP 26
+#define BC_M_DIS_BAF_BYP (1<<BC_V_DIS_BAF_BYP)
+#define BC_V_DBG_MUX_SEL 25
+#define BC_M_DBG_MUX_SEL (1<<BC_V_DBG_MUX_SEL)
+#define BC_V_PM_MUX_SEL 19
+#define BC_M_PM_MUX_SEL (0x3F<<BC_V_PM_MUX_SEL)
+#define BC_V_BC_WAVE 17
+#define BC_M_BC_WAVE (3<<BC_V_BC_WAVE)
+#define BC_V_TL_PIPE_LATCH 16
+#define BC_M_TL_PIPE_LATCH (1<<BC_V_TL_PIPE_LATCH)
+#define BC_V_EI_DIS_ERR 15
+#define BC_M_EI_DIS_ERR (1<<BC_V_EI_DIS_ERR)
+#define BC_V_BC_BAD_DAT 13
+#define BC_M_BC_BAD_DAT (3<<BC_V_BC_BAD_DAT)
+#define BC_V_BC_TAG_STAT 8
+#define BC_M_BC_TAG_STAT (0x1F<<BC_V_BC_TAG_STAT)
+#define BC_V_BC_FHIT 7
+#define BC_M_BC_FHIT (1<<BC_V_BC_FHIT)
+#define BC_V_EI_ECC_OR_PARITY 6
+#define BC_M_EI_ECC_OR_PARITY (1<<BC_V_EI_ECC_OR_PARITY)
+#define BC_V_VTM_FIRST 5
+#define BC_M_VTM_FIRST (1<<BC_V_VTM_FIRST)
+#define BC_V_CORR_FILL_DAT 4
+#define BC_M_CORR_FILL_DAT (1<<BC_V_CORR_FILL_DAT)
+#define BC_V_EI_CMD_GRP3 3
+#define BC_M_EI_CMD_GRP3 (1<<BC_V_EI_CMD_GRP3)
+#define BC_V_EI_CMD_GRP2 2
+#define BC_M_EI_CMD_GRP2 (1<<BC_V_EI_CMD_GRP2)
+#define BC_V_ALLOC_CYC 1
+#define BC_M_ALLOC_CYC (1<<BC_V_ALLOC_CYC)
+#define BC_V_BC_ENA 0
+#define BC_M_BC_ENA (1<<BC_V_BC_ENA)
+
+#define BC_K_DFAULT \
+ (((BC_M_EI_DIS_ERR) | \
+ (BC_M_EI_ECC_OR_PARITY) | \
+ (BC_M_VTM_FIRST) | \
+ (BC_M_CORR_FILL_DAT))>>1)
+/*
+**
+** Bcache Configuration Register (BC_CONFIG) Bit Summary
+**
+** Extent Size Name Type Function
+** ------ ---- ---- ---- ---------------------------------
+** <35:29> 7 RSVD WO Reserved - Must Be Zero
+** <28:20> 9 WE_CTL WO,0 Bcache write enable control
+** <19:19> 1 RSVD WO,0 Reserved - Must Be Zero
+** <18:16> 3 WE_OFF WO,1 Bcache fill write enable pulse offset
+** <15:15> 1 RSVD WO,0 Reserved - Must Be Zero
+** <14:12> 3 RD_WR_SPC WO,7 Bcache private read/write spacing
+** <11:08> 4 WR_SPD WO,4 Bcache write speed in CPU cycles
+** <07:04> 4 RD_SPD WO,4 Bcache read speed in CPU cycles
+** <03:03> 1 RSVD WO,0 Reserved - Must Be Zero
+** <02:00> 3 SIZE WO,1 Bcache size
+*/
+#define BC_V_WE_CTL 20
+#define BC_M_WE_CTL (0x1FF<<BC_V_WE_CTL)
+#define BC_V_WE_OFF 16
+#define BC_M_WE_OFF (0x7<<BC_V_WE_OFF)
+#define BC_V_RD_WR_SPC 12
+#define BC_M_RD_WR_SPC (0x7<<BC_V_RD_WR_SPC)
+#define BC_V_WR_SPD 8
+#define BC_M_WR_SPD (0xF<<BC_V_WR_SPD)
+#define BC_V_RD_SPD 4
+#define BC_M_RD_SPD (0xF<<BC_V_RD_SPD)
+#define BC_V_SIZE 0
+#define BC_M_SIZE (0x7<<BC_V_SIZE)
+
+#define BC_K_CONFIG \
+ ((0x1<<BC_V_WE_OFF) | \
+ (0x7<<BC_V_RD_WR_SPC) | \
+ (0x4<<BC_V_WR_SPD) | \
+ (0x4<<BC_V_RD_SPD) | \
+ (0x1<<BC_V_SIZE))
+
+/*
+**
+** DECchip 21164 Privileged Architecture Library Entry Offsets:
+**
+** Entry Name Offset (Hex)
+**
+** RESET 0000
+** IACCVIO 0080
+** INTERRUPT 0100
+** ITB_MISS 0180
+** DTB_MISS (Single) 0200
+** DTB_MISS (Double) 0280
+** UNALIGN 0300
+** D_FAULT 0380
+** MCHK 0400
+** OPCDEC 0480
+** ARITH 0500
+** FEN 0580
+** CALL_PAL (Privileged) 2000
+** CALL_PAL (Unprivileged) 3000
+**
+*/
+
+#define PAL_RESET_ENTRY 0x0000
+#define PAL_IACCVIO_ENTRY 0x0080
+#define PAL_INTERRUPT_ENTRY 0x0100
+#define PAL_ITB_MISS_ENTRY 0x0180
+#define PAL_DTB_MISS_ENTRY 0x0200
+#define PAL_DOUBLE_MISS_ENTRY 0x0280
+#define PAL_UNALIGN_ENTRY 0x0300
+#define PAL_D_FAULT_ENTRY 0x0380
+#define PAL_MCHK_ENTRY 0x0400
+#define PAL_OPCDEC_ENTRY 0x0480
+#define PAL_ARITH_ENTRY 0x0500
+#define PAL_FEN_ENTRY 0x0580
+#define PAL_CALL_PAL_PRIV_ENTRY 0x2000
+#define PAL_CALL_PAL_UNPRIV_ENTRY 0x3000
+
+/*
+**
+** Architecturally Reserved Opcode (PALRES) Definitions:
+**
+*/
+
+#define mtpr hw_mtpr
+#define mfpr hw_mfpr
+
+#define ldl_a hw_ldl/a
+#define ldq_a hw_ldq/a
+#define stq_a hw_stq/a
+#define stl_a hw_stl/a
+
+#define ldl_p hw_ldl/p
+#define ldq_p hw_ldq/p
+#define stl_p hw_stl/p
+#define stq_p hw_stq/p
+
+/*
+** Virtual PTE fetch variants of HW_LD.
+*/
+#define ld_vpte hw_ldq/v
+
+/*
+** Physical mode load-lock and store-conditional variants of
+** HW_LD and HW_ST.
+*/
+
+#define ldq_lp hw_ldq/pl
+#define stq_cp hw_stq/pc
+
+/*
+**
+** General Purpose Register Definitions:
+**
+*/
+
+#define r0 $0
+#define r1 $1
+#define r2 $2
+#define r3 $3
+#define r4 $4
+#define r5 $5
+#define r6 $6
+#define r7 $7
+#define r8 $8
+#define r9 $9
+#define r10 $10
+#define r11 $11
+#define r12 $12
+#define r13 $13
+#define r14 $14
+#define r15 $15
+#define r16 $16
+#define r17 $17
+#define r18 $18
+#define r19 $19
+#define r20 $20
+#define r21 $21
+#define r22 $22
+#define r23 $23
+#define r24 $24
+#define r25 $25
+#define r26 $26
+#define r27 $27
+#define r28 $28
+#define r29 $29
+#define r30 $30
+#define r31 $31
+
+/*
+**
+** Floating Point Register Definitions:
+**
+*/
+
+#define f0 $f0
+#define f1 $f1
+#define f2 $f2
+#define f3 $f3
+#define f4 $f4
+#define f5 $f5
+#define f6 $f6
+#define f7 $f7
+#define f8 $f8
+#define f9 $f9
+#define f10 $f10
+#define f11 $f11
+#define f12 $f12
+#define f13 $f13
+#define f14 $f14
+#define f15 $f15
+#define f16 $f16
+#define f17 $f17
+#define f18 $f18
+#define f19 $f19
+#define f20 $f20
+#define f21 $f21
+#define f22 $f22
+#define f23 $f23
+#define f24 $f24
+#define f25 $f25
+#define f26 $f26
+#define f27 $f27
+#define f28 $f28
+#define f29 $f29
+#define f30 $f30
+#define f31 $f31
+
+/*
+**
+** PAL Temporary Register Definitions:
+**
+*/
+
+#define pt0 0x140
+#define pt1 0x141
+#define pt2 0x142
+#define pt3 0x143
+#define pt4 0x144
+#define pt5 0x145
+#define pt6 0x146
+#define pt7 0x147
+#define pt8 0x148
+#define pt9 0x149
+#define pt10 0x14A
+#define pt11 0x14B
+#define pt12 0x14C
+#define pt13 0x14D
+#define pt14 0x14E
+#define pt15 0x14F
+#define pt16 0x150
+#define pt17 0x151
+#define pt18 0x152
+#define pt19 0x153
+#define pt20 0x154
+#define pt21 0x155
+#define pt22 0x156
+#define pt23 0x157
+
+/*
+** PAL Shadow Registers:
+**
+** The DECchip 21164 shadows r8-r14 and r25 when in PALmode and
+** ICSR<SDE> = 1.
+*/
+
+#define p0 r8 /* ITB/DTB Miss Scratch */
+#define p1 r9 /* ITB/DTB Miss Scratch */
+#define p2 r10 /* ITB/DTB Miss Scratch */
+#define p3 r11
+#define ps r11 /* Processor Status */
+#define p4 r12 /* Local Scratch */
+#define p5 r13 /* Local Scratch */
+#define p6 r14 /* Local Scratch */
+#define p7 r25 /* Local Scratch */
+
+/*
+** SRM Defined State Definitions:
+*/
+
+/*
+** This table is an accounting of the DECchip 21164 storage used to
+** implement the SRM defined state for OSF/1.
+**
+** IPR Name Internal Storage
+** -------- ----------------
+** Processor Status ps, dtbCm, ipl, r11
+** Program Counter Ibox
+** Interrupt Entry ptEntInt
+** Arith Trap Entry ptEntArith
+** MM Fault Entry ptEntMM
+** Unaligned Access Entry ptEntUna
+** Instruction Fault Entry ptEntIF
+** Call System Entry ptEntSys
+** User Stack Pointer ptUsp
+** Kernel Stack Pointer ptKsp
+** Kernel Global Pointer ptKgp
+** System Value ptSysVal
+** Page Table Base Register ptPtbr
+** Virtual Page Table Base iVptBr, mVptBr
+** Process Control Block Base ptPcbb
+** Address Space Number itbAsn, dtbAsn
+** Cycle Counter cc, ccCtl
+** Float Point Enable icsr
+** Lock Flag Cbox/System
+** Unique PCB
+** Who-Am-I ptWhami
+*/
+
+#define ptEntUna pt2 /* Unaligned Access Dispatch Entry */
+#define ptImpure pt3 /* Pointer To PAL Scratch Area */
+#define ptEntIF pt7 /* Instruction Fault Dispatch Entry */
+#define ptIntMask pt8 /* Interrupt Enable Mask */
+#define ptEntSys pt9 /* Call System Dispatch Entry */
+#define ptTrap pt11
+#define ptEntInt pt11 /* Hardware Interrupt Dispatch Entry */
+#define ptEntArith pt12 /* Arithmetic Trap Dispatch Entry */
+#if defined(KDEBUG)
+#define ptEntDbg pt13 /* Kernel Debugger Dispatch Entry */
+#endif /* KDEBUG */
+#define ptMisc pt16 /* Miscellaneous Flags */
+#define ptWhami pt16 /* Who-Am-I Register Pt16<15:8> */
+#define ptMces pt16 /* Machine Check Error Summary Pt16<4:0> */
+#define ptSysVal pt17 /* Per-Processor System Value */
+#define ptUsp pt18 /* User Stack Pointer */
+#define ptKsp pt19 /* Kernel Stack Pointer */
+#define ptPtbr pt20 /* Page Table Base Register */
+#define ptEntMM pt21 /* MM Fault Dispatch Entry */
+#define ptKgp pt22 /* Kernel Global Pointer */
+#define ptPcbb pt23 /* Process Control Block Base */
+
+/*
+**
+** Miscellaneous PAL State Flags (ptMisc) Bit Summary
+**
+** Extent Size Name Function
+** ------ ---- ---- ---------------------------------
+** <55:48> 8 SWAP Swap PALcode flag -- character 'S'
+** <47:32> 16 MCHK Machine Check Error code
+** <31:16> 16 SCB System Control Block vector
+** <15:08> 8 WHAMI Who-Am-I identifier
+** <04:00> 5 MCES Machine Check Error Summary bits
+**
+*/
+
+#define PT16_V_MCES 0
+#define PT16_V_WHAMI 8
+#define PT16_V_SCB 16
+#define PT16_V_MCHK 32
+#define PT16_V_SWAP 48
+
+#endif /* __DC21164_LOADED */
+
+
+
+
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/exec.h freebios/util/alpha-common/include/exec.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/exec.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/exec.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,71 @@
+/*
+ * Mach Operating System
+ * Copyright (c) 1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [EMAIL PROTECTED]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+/*
+ * HISTORY
+ * $Log: exec.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 4.0 1993/10/18 15:37:42 rusling
+ * Include file.
+ *
+ * Revision 4.0 1993/10/18 14:38:36 rusling
+ * *** empty log message ***
+ *
+ */
+/*
+ * exec stucture in an a.out file derived from FSF's
+ * a.out.gnu.h file.
+ */
+
+#ifndef _ALPHA_EXEC_H_
+#define _ALPHA_EXEC_H_
+
+/*
+ * Header prepended to each a.out file.
+ */
+struct exec
+{
+ integer_t a_magic; /* Use macros N_MAGIC, etc for access */
+ vm_size_t a_text; /* bytes of text in file */
+ vm_size_t a_data; /* bytes of data in file */
+ vm_size_t a_bss; /* bytes of auto-zeroed data */
+ vm_size_t a_syms; /* bytes of symbol table data in file */
+ vm_offset_t a_entry; /* start PC */
+ vm_offset_t a_tstart; /* text start, in memory */
+ vm_offset_t a_dstart; /* data start, in memory */
+ vm_size_t a_trsize; /* bytes of text-relocation info in file */
+ vm_size_t a_drsize; /* bytes of data-relocation info in file */
+};
+
+/* Code indicating object file or impure executable. */
+#define OMAGIC 0407
+/* Code indicating pure executable. */
+#define NMAGIC 0410
+/* Code indicating demand-paged executable. */
+#define ZMAGIC 0413
+
+#endif _ALPHA_EXEC_H_
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/local.h freebios/util/alpha-common/include/local.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/local.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/local.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,97 @@
+#ifndef __LOCAL_H_LOADED
+#define __LOCAL_H_LOADED
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: local.h,v 1.1 2000/03/21 03:56:31 stepan Exp $;
+ */
+
+/*
+ * $Log: local.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.3 1995/02/27 21:27:56 fdh
+ * Include <ctype.h>
+ *
+ * Revision 1.2 1995/02/10 02:03:16 fdh
+ * Added definitions for TRUE and FALSE.
+ *
+ * Revision 1.1 1995/02/07 00:44:43 fdh
+ * Initial revision
+ *
+ */
+
+/*
+ * Source files that are common between the ebfw source
+ * tree and the ebtools source tree could have inherent
+ * conflicts in their requirements for libraries, definitions,
+ * etc. The basic difference is that ebtools are built
+ * to run natively with an operating system where the ebfw
+ * tree is built to run in a freestanding environment on,
+ * typically, an evaluation board target. Therefore, this
+ * file is used to provide the proper environment for building
+ * those common files in the ebtools source tree.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <ctype.h>
+#include "c_32_64.h"
+
+#define ub unsigned char
+#define uw unsigned short int
+
+#ifdef CROSS_COMPILE_32_TO_64_BITS
+
+#define ui unsigned int
+#define sl int64
+#define ul int64
+
+#else /* CROSS_COMPILE_32_TO_64_BITS */
+
+#ifdef _WIN32
+#define ul unsigned __int64
+#define sl __int64
+#define ui unsigned long
+#else
+#define ul unsigned long
+#define sl long
+#define ui unsigned int
+#endif
+
+#endif /* CROSS_COMPILE_32_TO_64_BITS */
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#endif /* __LOCAL_H_LOADED */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/paldefs.h freebios/util/alpha-common/include/paldefs.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/paldefs.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/paldefs.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,76 @@
+#ifndef __PALDEFS_H_LOADED
+#define __PALDEFS_H_LOADED
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: paldefs.h,v 1.1 2000/03/21 03:56:31 stepan Exp $;
+ */
+
+/*
+ * $Log: paldefs.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.1 1995/02/24 15:54:10 fdh
+ * Initial revision
+ *
+ */
+
+#define PAL_halt 0x0000
+#define PAL_cflush 0x0001
+#define PAL_draina 0x0002
+#define PAL_cobratt 0x0009
+#define PAL_ipir 0x000d
+#define PAL_mtpr_mces 0x0011
+#define PAL_wrfen 0x002b
+#define PAL_wrvptptr 0x002d
+#define PAL_jtopal 0x002e
+#define PAL_swpctx 0x0030
+#define PAL_wrval 0x0031
+#define PAL_rdval 0x0032
+#define PAL_tbi 0x0033
+#define PAL_wrent 0x0034
+#define PAL_swpipl 0x0035
+#define PAL_rdps 0x0036
+#define PAL_wrkgp 0x0037
+#define PAL_wrusp 0x0038
+#define PAL_wrperfmon 0x0039
+#define PAL_rdusp 0x003a
+#define PAL_whami 0x003c
+#define PAL_rtsys 0x003d
+#define PAL_rti 0x003f
+#define PAL_bpt 0x0080
+#define PAL_bugchk 0x0081
+#define PAL_chmk 0x0083
+#define PAL_callsys 0x0083
+#define PAL_imb 0x0086
+#define PAL_rduniq 0x009e
+#define PAL_wruniq 0x009f
+#define PAL_gentrap 0x00aa
+#define PAL_nphalt 0x00be
+
+#endif /* __PALDEFS_H_LOADED */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/regdefs.h freebios/util/alpha-common/include/regdefs.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/regdefs.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/regdefs.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,83 @@
+#ifndef __REGDEFS_H_LOADED
+#define __REGDEFS_H_LOADED
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: regdefs.h,v 1.1 2000/03/21 03:56:31 stepan Exp $;
+ */
+
+/*
+ * $Log: regdefs.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.2 1995/02/24 16:00:18 fdh
+ * Conditional around #define AT.
+ *
+ * Revision 1.1 1995/02/24 15:54:26 fdh
+ * Initial revision
+ *
+ */
+
+#define v0 $0
+#define t0 $1
+#define t1 $2
+#define t2 $3
+#define t3 $4
+#define t4 $5
+#define t5 $6
+#define t6 $7
+#define t7 $8
+#define s0 $9
+#define s1 $10
+#define s2 $11
+#define s3 $12
+#define s4 $13
+#define s5 $14
+#define s6 $15
+#define fp $15 /* fp & s6 are the same */
+#define a0 $16
+#define a1 $17
+#define a2 $18
+#define a3 $19
+#define a4 $20
+#define a5 $21
+#define t8 $22
+#define t9 $23
+#define t10 $24
+#define t11 $25
+#define ra $26
+#define pv $27 /* pv and t5 are the same */
+#define t12 $27
+#ifndef AT
+#define AT $at
+#endif
+#define gp $29
+#define sp $30
+#define zero $31
+
+#endif /* __REGDEFS_H_LOADED */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/reloc.h freebios/util/alpha-common/include/reloc.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/reloc.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/reloc.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,116 @@
+struct reloc {
+ long r_vaddr; /* (virtual) address of reference */
+ unsigned r_symndx; /* index into symbol table */
+ unsigned r_type : 8; /* relocation type */
+ unsigned r_extern: 1; /* if 1 symndx is an index into the external
+ symbol table, else symndx is a section # */
+
+ unsigned r_offset:6; /* for R_OP_STORE, quad based LE bit offset */
+ unsigned r_reserved:11; /* Must be zero */
+ unsigned r_size:6; /* R_OP_STORE, bit size */
+};
+#define RELOC struct reloc
+#define RELSZ sizeof(RELOC)
+
+
+/*
+ * ALPHA machines r_type values
+ *
+ * reloc. already performed to symbol in the same section
+ * 32-bit reference
+ * 64-bit reference
+ * 32-bit displacement from gp
+ * reference to global pointer relative literal pool item
+ * identifies useage of a literal address previously loaded
+ * lda/ldah instruction pair to initialize gp.
+ * 21-bit branch reference
+ * 14-bit jsr hint reference
+ */
+
+#define R_ABS 0
+#define R_REFLONG 1
+#define R_REFQUAD 2
+#define R_GPREL32 3
+#define R_LITERAL 4
+#define R_LITUSE 5
+#define R_GPDISP 6
+#define R_BRADDR 7
+#define R_HINT 8
+/*
+ * self relative relocations mean that the memory location at
+ * r_vaddr contains an offset to the destination. If the relocation
+ * is r_extern==1, then the value at the memory location is ignored
+ * (maybe we should allow offsets?). If r_extern==0, then the value
+ * at the memory location is the actual offset.
+ *
+ * The linker uses the relocated target and a relocated r_vaddr to
+ * determine the offset. Offsets are considered signed.
+ */
+#define R_SREL16 9 /* self relative 16 bit offset */
+#define R_SREL32 10 /* self relative 32 bit offset */
+#define R_SREL64 11 /* self relative 64 bit offset */
+/*
+ * stack relocations provide a primitive expression evaluator for
+ * relocatable and constant values at link time. It also provides
+ * a way to store a value into a bit field (the R_OP_STORE has a
+ * bit size and offset field (from a quadword aligned qaudword)).
+ *
+ * The operations specify what they relocate and what happens to
+ * the linktime stack. It is an error to cause a stack underflow
+ * or have values left on the stack when the relocation for a section
+ * is complete.
+ *
+ * terms:
+ * tos top of stack
+ * stack qaudword array representing the stack
+ * vaddr address field in reloc record or
+ * extern symbol address
+ * relocate(X) relocate address X
+ * X(o:s) address X, bitoffset o, bit size s
+ * r_offset offset field in reloc record
+ * r_size bitsize field in reloc record
+ *
+ * Note: use R_SN_ABS as the section for constants (like in shifts).
+ *
+ */
+#define R_OP_PUSH 12 /* stack[++tos] = relocate(vaddr) */
+#define R_OP_STORE 13 /* vaddr(r_offset:r_size) = stack[tos--] */
+#define R_OP_PSUB 14 /* stack[tos] = stack[tos] - relocate(vaddr) */
+#define R_OP_PRSHIFT 15 /* stack[tos] = stack[tos] >> relocate(vaddr) */
+
+#define MAX_R_TYPE 16
+
+/*
+ * Section numbers for symndex for local relocation entries (r_extern == 0).
+ * For these entries the starting address for the section referenced by the
+ * section number is used in place of an external symbol table entry's value.
+ */
+#define R_SN_NULL 0
+#define R_SN_TEXT 1
+#define R_SN_RDATA 2
+#define R_SN_DATA 3
+#define R_SN_SDATA 4
+#define R_SN_SBSS 5
+#define R_SN_BSS 6
+#define R_SN_INIT 7
+#define R_SN_LIT8 8
+#define R_SN_LIT4 9
+#define R_SN_XDATA 10
+#define R_SN_PDATA 11
+#define R_SN_FINI 12
+#define R_SN_LITA 13
+#define R_SN_ABS 14 /* constant relocation r_vaddr's */
+#define MAX_R_SN 14
+
+/*
+ * symindex values when type is R_LITUSE
+ *
+ * literal address in register of a memory format instruction
+ * literal address in byte offset register of byte-manipulation instruction
+ * literal address is in target register of a jsr instruction.
+ */
+
+#define R_LU_BASE 1
+#define R_LU_BYTOFF 2
+#define R_LU_JSR 3
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/romhead.h freebios/util/alpha-common/include/romhead.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/romhead.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/romhead.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,354 @@
+#ifndef __ROMHEAD_H_LOADED
+#define __ROMHEAD_H_LOADED
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: romhead.h,v 1.1 2000/03/21 03:56:31 stepan Exp $;
+ */
+
+/*
+ * $Log: romhead.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.16 1995/03/05 00:51:01 fdh
+ * Fixed up a couple of MACROS.
+ *
+ * Revision 1.15 1995/03/04 05:55:57 fdh
+ * Bracket COMPUTE_CHECKSUM Macro.
+ *
+ * Revision 1.14 1995/02/27 15:36:21 fdh
+ * Removed ul definitions. Replaced with structs of ui's.
+ *
+ * Revision 1.13 1995/02/16 22:06:06 fdh
+ * Changed Open VMS to OpenVMS because of some trademark junk.
+ *
+ * Revision 1.12 1995/02/14 21:19:33 cruz
+ * Fixed up header picture to match implementation.
+ *
+ * Revision 1.11 1995/02/10 02:19:03 fdh
+ * Created COMPUTE_CHECKSUM Macro.
+ * Corrected prototypes.
+ *
+ * Revision 1.10 1995/02/08 00:34:44 fdh
+ * Added ROMH_VERSION and ROTATE_RIGHT macros.
+ *
+ * Revision 1.9 1995/02/07 22:28:09 fdh
+ * Changed Windows NT alias from "WNT" to "NT".
+ *
+ * Revision 1.8 1995/02/07 04:54:33 fdh
+ * Added ostype definitions.
+ * Modified ROM_HEADER_CHECKSUM Macro.
+ *
+ * Revision 1.7 1995/02/06 02:47:40 fdh
+ * Added prototypes for romhead.c routines.
+ *
+ * Revision 1.6 1995/02/05 01:53:05 fdh
+ * Modified the definition for the ROM header.
+ * Added a MACRO that can be used to access the
+ * ROM header checksum which can be in different location
+ * for different versions of the header.
+ *
+ * Revision 1.5 1995/02/02 20:05:31 fdh
+ * Moved fwid_array[] initialization to header file.
+ *
+ * Revision 1.4 1995/01/31 23:44:00 fdh
+ * Added field for "OPTIONAL FW ID, continued" to make
+ * the optional field really 7 bytes.
+ *
+ * Revision 1.3 1995/01/31 23:21:25 fdh
+ * Updated...
+ *
+ * Revision 1.2 1995/01/23 22:34:32 fdh
+ * Extended the ROM header spec. This is now version one
+ * which is a super-set of the version 0 header.
+ *
+ * Revision 1.1 1994/11/19 03:47:29 fdh
+ * Initial revision
+ *
+ *
+ *
+ * Special ROM header
+ * ==================
+ * The System ROM can contain multiple ROM images, each with
+ * its own header. That header tells the SROM where to load
+ * the image and also if it has been compressed with the
+ * "makerom" tool. For System ROMs which contain a single
+ * image, the header is optional. If the header does not
+ * exist the complete System ROM is loaded and executed at
+ * physical address zero.
+ *
+ * 31 0
+ * +---------------------------------------------+
+ * | VALIDATION PATTERN 0x5A5AC3C3 | 0x00
+ * +---------------------------------------------+
+ * | INVERSE VALIDATION PATTERN 0xA5A53C3C | 0x04
+ * +---------------------------------------------+
+ * | HEADER SIZE (Bytes) | 0x08
+ * +---------------------------------------------+
+ * | IMAGE CHECKSUM | 0x0C
+ * +---------------------------------------------+
+ * | IMAGE SIZE (Memory Footprint) | 0x10
+ * +---------------------------------------------+
+ * | DECOMPRESSION FLAG | 0x14
+ * +---------------------------------------------+
+ * | DESTINATION ADDRESS LOWER LONGWORD | 0x18
+ * +---------------------------------------------+
+ * | DESTINATION ADDRESS UPPER LONGWORD | 0x1C
+ * +---------------------------------------------+
+ * | RSVD<31:16>| ID <15:8>| HEADER REV <7:0> | 0x20 \
+ * +---------------------------------------------+ \
+ * | ROM IMAGE SIZE | 0x24 |
+ * +---------------------------------------------+ | New for
+ * | OPTIONAL FIRMWARE ID <31:0> | 0x28 +- Rev 1
+ * +---------------------------------------------+ | headers.
+ * | OPTIONAL FIRMWARE ID <63:32> | 0x2C |
+ * +---------------------------------------------+ /
+ * | HEADER CHECKSUM (excluding this field) | 0x30 /
+ * +---------------------------------------------+
+ *
+ * VALIDATION PATTERN
+ * ------------------
+ * The first quadword contains a special signature pattern
+ * that is used to verify that this "special" ROM header
+ * has been located. The pattern is 0x5A5AC3C3A5A53C3C.
+ *
+ * HEADER SIZE (Bytes)
+ * -------------------
+ * The header size is the next longword. This is provided
+ * to allow for some backward compatibility in the event that
+ * the header is extended in the future. When the header
+ * is located, current versions of SROM code determine where
+ * the image begins based on the header size. Additional data
+ * added to the header in the future will simply be ignored
+ * by current SROM code. Additionally, the header size = 0x20
+ * implies version 0 of this header spec. For any other size
+ * see HEADER REVISION to determine header version.
+ *
+ *
+ * IMAGE CHECKSUM
+ * --------------
+ * The next longword contains the image checksum. This is
+ * used to verify the integrity of the ROM. Checksum is computed
+ * in the same fashion as the header checksum.
+ *
+ * IMAGE SIZE (Memory Footprint)
+ * -----------------------------
+ * The image size reflects the size of the image after it has
+ * been loaded into memory from the ROM. See ROM IMAGE SIZE.
+ *
+ * DECOMPRESSION FLAG
+ * ------------------
+ * The decompression flag tells the SROM code if the makerom
+ * tool was used to compress the ROM image with a "trivial
+ * repeating byte algorithm". The SROM code contains routines
+ * which perform this decompression algorithm. Other
+ * compression/decompression schemes may be employed which work
+ * independently from this one.
+ *
+ * DESTINATION ADDRESS
+ * -------------------
+ * This quadword contains the destination address for the
+ * image. The SROM code will begin loading the image at this
+ * address and subsequently begin its execution there.
+ *
+ * HEADER REV
+ * ----------
+ * The revision of the header specifications used in this
+ * header. This is necessary to provide compatibility to
+ * future changes to this header spec. Version 0 headers
+ * are identified by the size of the header. See HEADER
+ * SIZE.
+ *
+ * FIRMWARE ID
+ * -----------
+ * The firmware ID is a byte that specifies the firmware type.
+ * This facilitates image boot options necessary to boot
+ * different operating systems.
+ *
+ * firmware
+ * firmware type
+ * -------- --------
+ * DBM 0 Alpha Evaluation Boards Debug Monitor
+ * WNT 1 Windows NT Firmware
+ * SRM 2 Alpha System Reference Manual Console
+ *
+ * ROM IMAGE SIZE
+ * --------------
+ * The ROM image size reflects the size of the image as it is
+ * contained in the ROM. See IMAGE SIZE.
+ *
+ * OPTIONAL FW ID
+ * --------------
+ * This is an optional field that can be used to provide
+ * additional firmware information such as firmware revision
+ * or a character descriptive string up to 8 characters.
+ *
+ * HEADER CHECKSUM
+ * ---------------
+ * The checksum of the header. This is used to validate
+ * the presence of a header beyond the validation provided
+ * by the validation pattern. See VALIDATION PATTERN.
+ * The header checksum is computed from the beginning of
+ * the header up to but excluding the header checksum
+ * field itself. If there are future versions of this
+ * header the header checksum should always be the last
+ * field defined in the header. The checksum algorithm used
+ * is compatible with the standard BSD4.3 algorithm provided
+ * on most implementations of Unix. Algorithm: The checksum
+ * is rotated right by one bit around a 16 bit field before
+ * adding in the value of each byte.
+ *
+ */
+
+#include "local.h" /* Include environment specific definitions */
+
+#define ROM_H_SIGNATURE 0x5A5AC3C3
+#define ROM_H_REVISION 1
+
+
+typedef union {
+ struct {
+ /*
+ * Version 0 definition of the ROM header.
+ */
+ struct {
+ ui signature; /* validation signature */
+ ui csignature; /* inverse validation signature */
+ ui hsize; /* header size */
+ ui checksum; /* checksum */
+ ui size; /* image size (Memory Footprint) */
+ ui decomp; /* decompression algorithm */
+ struct {
+ ui low;
+ ui high;
+ } destination; /* destination address */
+ } V0;
+
+ /*
+ * Version 1 extensions to the ROM header.
+ */
+ struct {
+ char hversion; /* ROM header version (Byte 0) */
+ char fw_id; /* Firmware ID (Byte 1) */
+ char reserved[2]; /* Reserved (Bytes 3:2) */
+ ui rimage_size; /* ROM image size */
+ union {
+ char id[8]; /* Optional Firmware ID (character array) */
+ struct {
+ ui low;
+ ui high;
+ } id_S;
+ } fwoptid;
+ } V1;
+
+ /*
+ * Future extensions to the header should be included before
+ * this header checksum. (See HEADER CHECKSUM description)
+ */
+ ui hchecksum; /* Header checksum, (Always last entry) */
+ } romh;
+ ui romh_array[1]; /* To allow longword access to the data */
+} romheader_t;
+
+/*
+ * Registered Firmware types.
+ */
+#define FW_DBM 0
+#define FW_WNT 1
+#define FW_SRM 2
+
+#define FW_DBM_STRINGS "Alpha Evaluation Board Debug Monitor", "DBM", "Debug Monitor", "Monitor", NULL
+#define FW_WNT_STRINGS "Windows NT Firmware", "WNT", "NTFW", "ARC", "NT", NULL
+#define FW_SRM_STRINGS "Alpha SRM Console", "SRM", "VMS", "OSF", NULL
+
+typedef struct fw_id {
+ int firmware_id;
+ char **id_string;
+} fw_id_t;
+
+extern fw_id_t fwid_array[];
+
+#define FW_OSTYPE_DBM 0
+#define FW_OSTYPE_WNT 1
+#define FW_OSTYPE_VMS 2
+#define FW_OSTYPE_OSF 3
+
+#define OS_DBM_STRINGS "Alpha Evaluation Board Debug Monitor", "DBM"
+#define OS_WNT_STRINGS "The Windows NT Operating System", "NT"
+#define OS_VMS_STRINGS "OpenVMS", "VMS"
+#define OS_OSF_STRINGS "DEC OSF/1", "OSF"
+
+typedef struct os_types {
+ int ostype;
+ int firmware_id;
+ char **id_string;
+} ostype_t;
+
+extern ostype_t ostype_array[];
+
+/*
+ * The ROM header checksum should always be assigned to the last
+ * field in the header. Therefore, when reading headers created
+ * by various versions of makerom the ROM header checksum can be
+ * in different locations. This macro can be used to access the
+ * ROM header checksum in the proper location.
+ */
+#define ROM_HEADER_CHECKSUM(x) \
+ ((x)->romh_array[((x)->romh.V0.hsize - sizeof((x)->romh.hchecksum))/sizeof(ui)])
+
+/*
+ * Macro to provide the header version number
+ */
+#define ROMH_VERSION(x) ((x)->romh.V0.hsize == 0x20 ? 0 : (x)->romh.V1.hversion)
+
+/*
+ * Macro to assist in computing the BSD4.3 style checksum.
+ */
+#define ROTATE_RIGHT(x) if ((x) & 1) (x) = ((x) >>1) + 0x8000; else (x) = (x) >>1;
+
+/*
+ * Macro used to increment the checksum
+ * by a new byte while keeping the total
+ * checksum within the 16 bit range.
+ */
+#define COMPUTE_CHECKSUM(c,k) \
+ {ROTATE_RIGHT(k); k += (ub) c; k &= 0xffff;}
+
+/*
+ * romheader.c prototypes
+ */
+extern fw_id_t * fwid_match(char * arg);
+extern fw_id_t * fwid_match_i(int fwid);
+extern void fwid_dump(char * pre);
+extern ostype_t * ostype_match(char * arg);
+extern ostype_t * ostype_match_i(int ostype);
+extern void ostype_dump(char * pre);
+extern ui compute_romh_chksum(romheader_t * header);
+extern int dumpHeader(romheader_t * header);
+
+#endif /* __ROMHEAD_H_LOADED */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/syms.h freebios/util/alpha-common/include/syms.h
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/include/syms.h Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/include/syms.h Fri Mar 16 13:33:32 2001
@@ -0,0 +1,637 @@
+/*
+ * Mach Operating System
+ * Copyright (c) 1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [EMAIL PROTECTED]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+/*
+ * HISTORY
+ * 31-May-92 Alessandro Forin (af) at Carnegie-Mellon University
+ * Adapted for Alpha.
+ *
+ * $Log: syms.h,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 4.0 1993/10/18 15:37:42 rusling
+ * Include file.
+ *
+ * Revision 4.0 1993/10/18 14:39:10 rusling
+ * *** empty log message ***
+ *
+ *
+ */
+/* --------------------------------------------------- */
+/* | Copyright (c) 1986 MIPS Computer Systems, Inc. | */
+/* | All Rights Reserved. | */
+/* --------------------------------------------------- */
+
+/* (C) Copyright 1984 by Third Eye Software, Inc.
+ *
+ * Third Eye Software, Inc. grants reproduction and use rights to
+ * all parties, PROVIDED that this comment is maintained in the copy.
+ *
+ * Third Eye makes no claims about the applicability of this
+ * symbol table to a particular use.
+ */
+
+/* glevels for field in FDR */
+#define GLEVEL_0 2
+#define GLEVEL_1 1
+#define GLEVEL_2 0 /* for upward compat reasons. */
+#define GLEVEL_3 3
+
+/* magic number for symheader */
+#define magicSym 0x1992
+
+/* Language codes */
+#define langC 0
+#define langPascal 1
+#define langFortran 2
+#define langAssembler 3 /* one Assembley inst might map to many mach */
+#define langMachine 4
+#define langNil 5
+#define langAda 6
+#define langPl1 7
+#define langCobol 8
+#define langMax 32
+
+/* The following are value definitions for the fields in the SYMR */
+
+/*
+ * Storage Classes
+ */
+
+#define scNil 0
+#define scText 1 /* text symbol */
+#define scData 2 /* initialized data symbol */
+#define scBss 3 /* un-initialized data symbol */
+#define scRegister 4 /* value of symbol is register number */
+#define scAbs 5 /* value of symbol is absolute */
+#define scUndefined 6 /* who knows? */
+#define scCdbLocal 7 /* variable's value is IN se->va.?? */
+#define scBits 8 /* this is a bit field */
+#define scCdbSystem 9 /* variable's value is IN CDB's address space */
+#define scDbx 9 /* overlap dbx internal use */
+#define scRegImage 10 /* register value saved on stack */
+#define scInfo 11 /* symbol contains debugger information */
+#define scUserStruct 12 /* address in struct user for current process */
+#define scSData 13 /* load time only small data */
+#define scSBss 14 /* load time only small common */
+#define scRData 15 /* load time only read only data */
+#define scVar 16 /* Var parameter (fortran,pascal) */
+#define scCommon 17 /* common variable */
+#define scSCommon 18 /* small common */
+#define scVarRegister 19 /* Var parameter in a register */
+#define scVariant 20 /* Variant record */
+#define scSUndefined 21 /* small undefined(external) data */
+#define scInit 22 /* .init section symbol */
+#define scBasedVar 23 /* Fortran or PL/1 ptr based var */
+#define scXData 24 /* exception handling data */
+#define scPData 25 /* Procedure section */
+#define scFini 26 /* .fini section */
+#define scMax 32
+
+
+/*
+ * Symbol Types
+ */
+
+#define stNil 0 /* Nuthin' special */
+#define stGlobal 1 /* external symbol */
+#define stStatic 2 /* static */
+#define stParam 3 /* procedure argument */
+#define stLocal 4 /* local variable */
+#define stLabel 5 /* label */
+#define stProc 6 /* " " Procedure */
+#define stBlock 7 /* beginnning of block */
+#define stEnd 8 /* end (of anything) */
+#define stMember 9 /* member (of anything - struct/union/enum */
+#define stTypedef 10 /* type definition */
+#define stFile 11 /* file name */
+#define stRegReloc 12 /* register relocation */
+#define stForward 13 /* forwarding address */
+#define stStaticProc 14 /* load time only static procs */
+#define stConstant 15 /* const */
+#define stStaParam 16 /* Fortran static parameters */
+ /* Psuedo-symbols - internal to debugger */
+#define stStr 60 /* string */
+#define stNumber 61 /* pure number (ie. 4 NOR 2+2) */
+#define stExpr 62 /* 2+2 vs. 4 */
+#define stType 63 /* post-coersion SER */
+#define stMax 64
+
+/* definitions for fields in TIR */
+
+/* type qualifiers for ti.tq0 -> ti.(itqMax-1) */
+#define tqNil 0 /* bt is what you see */
+#define tqPtr 1 /* pointer */
+#define tqProc 2 /* procedure */
+#define tqArray 3 /* duh */
+#define tqFar 4 /* longer addressing - 8086/8 land */
+#define tqVol 5 /* volatile */
+#define tqConst 6 /* const */
+#define tqMax 8
+
+/* basic types as seen in ti.bt */
+#define btNil 0 /* undefined */
+#define btAdr32 1 /* 32-bit address */
+#define btAdr btAdr32 /* address - integer same size as pointer */
+#define btChar 2 /* character */
+#define btUChar 3 /* unsigned character */
+#define btShort 4 /* short */
+#define btUShort 5 /* unsigned short */
+#define btInt32 6 /* 32-bit int */
+#define btInt btInt32 /* int */
+#define btUInt32 7 /* 32-bit unsigned int */
+#define btUInt btUInt32 /* unsigned int */
+#define btLong32 8 /* 32-bit long */
+#define btLong btLong32 /* long */
+#define btULong32 9 /* 32-bit unsigned long */
+#define btULong btULong32 /* unsigned long */
+#define btFloat 10 /* float (real) */
+#define btDouble 11 /* Double (real) */
+#define btStruct 12 /* Structure (Record) */
+#define btUnion 13 /* Union (variant) */
+#define btEnum 14 /* Enumerated */
+#define btTypedef 15 /* defined via a typedef, isymRef points */
+#define btRange 16 /* subrange of int */
+#define btSet 17 /* pascal sets */
+#define btComplex 18 /* fortran complex */
+#define btDComplex 19 /* fortran double complex */
+#define btIndirect 20 /* forward or unnamed typedef */
+#define btFixedDec 21 /* Fixed Decimal */
+#define btFloatDec 22 /* Float Decimal */
+#define btString 23 /* Varying Length Character String */
+#define btBit 24 /* Aligned Bit String */
+#define btPicture 25 /* Picture */
+#define btVoid 26 /* void */
+#define btPtrMem 27 /* DEC C++: Pointer to member */
+#define btInt64 28 /* 64-bit int */
+#define btUInt64 29 /* 64-bit unsigned int */
+#define btLong64 30 /* 64-bit long */
+#define btULong64 31 /* 64-bit unsigned long */
+#define btLongLong64 32 /* 64-bit long long */
+#define btLongLong btLongLong64 /* long long */
+#define btULongLong64 33 /* 64-bit unsigned long long */
+#define btULongLong btULongLong64 /* unsigned long long */
+#define btAdr64 34 /* 64-bit address */
+#define btMax 64
+
+#if (MFG == MIPS)
+/* optimization type codes */
+#define otNil 0
+#define otReg 1 /* move var to reg */
+#define otBlock 2 /* begin basic block */
+#define otProc 3 /* procedure */
+#define otInline 4 /* inline procedure */
+#define otEnd 5 /* whatever you started */
+#define otMax 6 /* KEEP UP TO DATE */
+#endif (MFG == MIPS)
+
+
+#ifdef LANGUAGE_C
+
+/*
+ * This (part of the) file contains the definition of the Third Eye Symbol Table.
+ *
+ * Symbols are assumed to be in 'encounter order' - i.e. the order that
+ * the things they represent were encountered by the compiler/assembler/loader.
+ * EXCEPT for globals! These are assumed to be bunched together,
+ * probably right after the last 'normal' symbol. Globals ARE sorted
+ * in ascending order.
+ *
+ * -----------------------------------------------------------------
+ * A brief word about Third Eye naming/use conventions:
+ *
+ * All arrays and index's are 0 based.
+ * All "ifooMax" values are the highest legal value PLUS ONE. This makes
+ * them good for allocating arrays, etc. All checks are "ifoo < ifooMax".
+ *
+ * "isym" Index into the SYMbol table.
+ * "ipd" Index into the Procedure Descriptor array.
+ * "ifd" Index into the File Descriptor array.
+ * "iss" Index into String Space.
+ * "cb" Count of Bytes.
+ * "rgPd" array whose domain is "0..ipdMax-1" and RanGe is PDR.
+ * "rgFd" array whose domain is "0..ifdMax-1" and RanGe is FDR.
+ */
+
+
+/*
+ * Symbolic Header (HDR) structure.
+ * As long as all the pointers are set correctly,
+ * we don't care WHAT order the various sections come out in!
+ *
+ * A file produced solely for the use of CDB will probably NOT have
+ * any instructions or data areas in it, as these are available
+ * in the original.
+ */
+
+typedef struct {
+ short magic; /* to verify validity of the table */
+ short vstamp; /* version stamp */
+ int ilineMax; /* number of line number entries */
+ int idnMax; /* max index into dense number table */
+ int ipdMax; /* number of procedures */
+ int isymMax; /* number of local symbols */
+ int ioptMax; /* max index into optimization symbol entries */
+ int iauxMax; /* number of auxillary symbol entries */
+ int issMax; /* max index into local strings */
+ int issExtMax; /* max index into external strings */
+ int ifdMax; /* number of file descriptor entries */
+ int crfd; /* number of relative file descriptor entries */
+ int iextMax; /* max index into external symbols */
+ unsigned long cbLine; /* number of bytes for line number entries */
+ unsigned long cbLineOffset;/* offset to start of line number entries*/
+ unsigned long cbDnOffset;/* offset to start dense number table */
+ unsigned long cbPdOffset;/* offset to procedure descriptor table */
+ unsigned long cbSymOffset;/* offset to start of local symbols*/
+ unsigned long cbOptOffset;/* offset to optimization symbol entries */
+ unsigned long cbAuxOffset;/* offset to start of auxillary symbol entries*/
+ unsigned long cbSsOffset;/* offset to start of local strings */
+ unsigned long cbSsExtOffset;/* offset to start of external strings */
+ unsigned long cbFdOffset;/* offset to file descriptor table */
+ unsigned long cbRfdOffset;/* offset to relative file descriptor table */
+ unsigned long cbExtOffset;/* offset to start of external symbol entries*/
+ /* If you add machine dependent fields, add them here */
+ } HDRR, *pHDRR;
+#define cbHDRR sizeof(HDRR)
+#define hdrNil ((pHDRR)0)
+
+/*
+ * The FDR and PDR structures speed mapping of address <-> name.
+ * They are sorted in ascending memory order and are kept in
+ * memory by CDB at runtime.
+ */
+
+/*
+ * File Descriptor
+ *
+ * There is one of these for EVERY FILE, whether compiled with
+ * full debugging symbols or not. The name of a file should be
+ * the path name given to the compiler. This allows the user
+ * to simply specify the names of the directories where the COMPILES
+ * were done, and we will be able to find their files.
+ * A field whose comment starts with "R - " indicates that it will be
+ * setup at runtime.
+ */
+typedef struct fdr {
+ unsigned long adr; /* memory address of beginning of file */
+ unsigned long cbLineOffset;/* byte offset from header for this file ln's */
+ unsigned long cbLine; /* size of lines for this file */
+ unsigned long cbSs; /* number of bytes in the ss */
+ int rss; /* file name (of source, if known) */
+ int issBase; /* file's string space */
+ int isymBase; /* beginning of symbols */
+ int csym; /* count file's of symbols */
+ int ilineBase; /* file's line symbols */
+ int cline; /* count of file's line symbols */
+ int ioptBase; /* file's optimization entries */
+ int copt; /* count of file's optimization entries */
+ int ipdFirst; /* start of procedures for this file */
+ int cpd; /* count of procedures for this file */
+ int iauxBase; /* file's auxiliary entries */
+ int caux; /* count of file's auxiliary entries */
+ int rfdBase; /* index into the file indirect table */
+ int crfd; /* count file indirect entries */
+ unsigned lang: 5; /* language for this file */
+ unsigned fMerge : 1; /* whether this file can be merged */
+ unsigned fReadin : 1; /* true if it was read in (not just created) */
+ unsigned fBigendian : 1;/* if set, was compiled on big endian machine */
+ /* aux's will be in compile host's sex */
+ unsigned glevel : 2; /* level this file was compiled with */
+ unsigned reserved : 22; /* reserved for future use */
+ } FDR, *pFDR;
+#define cbFDR sizeof(FDR)
+#define fdNil ((pFDR)0)
+#define ifdNil -1
+#define ifdTemp 0
+#define ilnNil -1
+
+
+/*
+ * Procedure Descriptor
+ *
+ * There is one of these for EVERY TEXT LABEL.
+ * If a procedure is in a file with full symbols, then isym
+ * will point to the PROC symbols, else it will point to the
+ * global symbol for the label.
+ */
+
+typedef struct pdr {
+ unsigned long adr; /* memory address of start of procedure */
+ unsigned long cbLineOffset;/* byte offset for this procedure from the fd base */
+ int isym; /* start of local symbol entries */
+ int iline; /* start of line number entries*/
+ int regmask; /* save register mask */
+ int regoffset; /* save register offset */
+ int iopt; /* start of optimization symbol entries*/
+ int fregmask; /* save floating point register mask */
+ int fregoffset; /* save floating point register offset */
+ int frameoffset; /* frame size */
+ int lnLow; /* lowest line in the procedure */
+ int lnHigh; /* highest line in the procedure */
+ unsigned gp_prologue : 8; /* byte size of GP prologue */
+ unsigned gp_used : 1; /* true if the procedure uses GP */
+ unsigned reserved : 23;
+ short framereg; /* frame pointer register */
+ short pcreg; /* offset or reg of return pc */
+ } PDR, *pPDR;
+#define cbPDR sizeof(PDR)
+#define pdNil ((pPDR) 0)
+#define ipdNil -1
+
+/*
+ * The structure of the runtime procedure descriptor created by the loader
+ * for use by the static exception system.
+ */
+typedef struct runtime_pdr {
+ unsigned long adr; /* memory address of start of procedure */
+ int regmask; /* save register mask */
+ int regoffset; /* save register offset */
+ int fregmask; /* save floating point register mask */
+ int fregoffset; /* save floating point register offset */
+ int frameoffset; /* frame size */
+ short framereg; /* frame pointer register */
+ short pcreg; /* offset or reg of return pc */
+ int irpss; /* index into the runtime string table */
+ int reserved;
+ struct exception_info *exception_info;/* pointer to exception array */
+} RPDR, *pRPDR;
+#define cbRPDR sizeof(RPDR)
+#define rpdNil ((pRPDR) 0)
+
+/*
+ * Line Numbers
+ *
+ * Line Numbers are segregated from the normal symbols because they
+ * are [1] smaller , [2] are of no interest to your
+ * average loader, and [3] are never needed in the middle of normal
+ * scanning and therefore slow things down.
+ *
+ * By definition, the first LINER for any given procedure will have
+ * the first line of a procedure and represent the first address.
+ */
+
+typedef int LINER, *pLINER;
+#define lineNil ((pLINER)0)
+#define cbLINER sizeof(LINER)
+#define ilineNil -1
+
+
+
+/*
+ * The Symbol Structure (GFW, to those who Know!)
+ */
+
+typedef struct {
+ unsigned long value; /* value of symbol */
+ int iss; /* index into String Space of name */
+ unsigned st : 6; /* symbol type */
+ unsigned sc : 5; /* storage class - text, data, etc */
+ unsigned reserved : 1; /* reserved */
+ unsigned index : 20; /* index into sym/aux table */
+ } SYMR, *pSYMR;
+#define symNil ((pSYMR)0)
+#define cbSYMR sizeof(SYMR)
+#define isymNil -1
+#define indexNil 0xfffff
+#define issNil -1
+#define issNull 0
+
+
+/* The following converts a memory resident string to an iss.
+ * This hack is recognized in SbFIss, in sym.c of the debugger.
+ */
+#define IssFSb(sb) (0x80000000 | ((unsigned int)(sb)))
+
+/* E X T E R N A L S Y M B O L R E C O R D
+ *
+ * Same as the SYMR except it contains file context to determine where
+ * the index is.
+ */
+typedef struct {
+ SYMR asym; /* symbol for the external */
+ unsigned jmptbl:1; /* symbol is a jump table entry for shlibs */
+ unsigned cobol_main:1; /* symbol is a cobol main procedure */
+ unsigned weakext:1; /* symbol is weak external */
+ unsigned reserved:29; /* reserved for future use */
+ int ifd; /* where the iss and index fields point into */
+ } EXTR, *pEXTR;
+#define extNil ((pEXTR)0)
+#define cbEXTR sizeof(EXTR)
+
+
+/* A U X I L L A R Y T Y P E I N F O R M A T I O N */
+
+/*
+ * Type Information Record
+ */
+typedef struct {
+ unsigned fBitfield : 1; /* set if bit width is specified */
+ unsigned continued : 1; /* indicates additional TQ info in next AUX */
+ unsigned bt : 6; /* basic type */
+ unsigned tq4 : 4;
+ unsigned tq5 : 4;
+ /* ---- 16 bit boundary ---- */
+ unsigned tq0 : 4;
+ unsigned tq1 : 4; /* 6 type qualifiers - tqPtr, etc. */
+ unsigned tq2 : 4;
+ unsigned tq3 : 4;
+ } TIR, *pTIR;
+#define cbTIR sizeof(TIR)
+#define tiNil ((pTIR)0)
+#define itqMax 6
+
+/*
+ * Relative symbol record
+ *
+ * If the rfd field is 4095, the index field indexes into the global symbol
+ * table.
+ */
+
+typedef struct {
+ unsigned rfd : 12; /* index into the file indirect table */
+ unsigned index : 20; /* index int sym/aux/iss tables */
+ } RNDXR, *pRNDXR;
+#define cbRNDXR sizeof(RNDXR)
+#define rndxNil ((pRNDXR)0)
+
+/* dense numbers or sometimes called block numbers are stored in this type,
+ * a rfd of 0xffffffff is an index into the global table.
+ */
+typedef struct {
+ unsigned int rfd; /* index into the file table */
+ unsigned int index; /* index int sym/aux/iss tables */
+ } DNR, *pDNR;
+#define cbDNR sizeof(DNR)
+#define dnNil ((pDNR)0)
+
+
+
+/*
+ * Auxillary information occurs only if needed.
+ * It ALWAYS occurs in this order when present.
+
+ isymMac used by stProc only
+ TIR type info
+ TIR additional TQ info (if first TIR was not enough)
+ rndx if (bt == btStruct,btUnion,btEnum,btSet,btRange,
+ btTypedef):
+ rsym.index == iaux for btSet or btRange
+ else rsym.index == isym
+ dimLow btRange, btSet
+ dimMac btRange, btSet
+ rndx0 As many as there are tq arrays
+ dimLow0
+ dimHigh0
+ ...
+ rndxMax-1
+ dimLowMax-1
+ dimHighMax-1
+ width in bits if (bit field), width in bits.
+ */
+#define cAuxMax (6 + (idimMax*3))
+
+/* a union of all possible info in the AUX universe */
+typedef union {
+ TIR ti; /* type information record */
+ RNDXR rndx; /* relative index into symbol table */
+ int dnLow; /* low dimension */
+ int dnHigh; /* high dimension */
+ int isym; /* symbol table index (end of proc) */
+ int iss; /* index into string space (not used) */
+ int width; /* width for non-default sized struc fields */
+ int count; /* count of ranges for variant arm */
+ } AUXU, *pAUXU;
+#define cbAUXU sizeof(AUXU)
+#define auxNil ((pAUXU)0)
+#define iauxNil -1
+
+
+/*
+ * Optimization symbols
+ *
+ * Optimization symbols contain some overlap information with the normal
+ * symbol table. In particular, the proc information
+ * is somewhat redundant but necessary to easily find the other information
+ * present.
+ *
+ * All of the offsets are relative to the beginning of the last otProc
+ */
+
+typedef struct {
+ unsigned ot: 8; /* optimization type */
+ unsigned value: 24; /* address where we are moving it to */
+ RNDXR rndx; /* points to a symbol or opt entry */
+ unsigned int offset; /* relative offset this occured */
+ } OPTR, *pOPTR;
+#define optNil ((pOPTR) 0)
+#define cbOPTR sizeof(OPTR)
+#define ioptNil -1
+
+/*
+ * File Indirect
+ *
+ * When a symbol is referenced across files the following procedure is used:
+ * 1) use the file index to get the File indirect entry.
+ * 2) use the file indirect entry to get the File descriptor.
+ * 3) add the sym index to the base of that file's sym table
+ *
+ */
+
+typedef int RFDT, *pRFDT;
+#define cbRFDT sizeof(RFDT)
+#define rfdNil -1
+
+/*
+ * The file indirect table in the mips loader is known as an array of FITs.
+ * This is done to keep the code in the loader readable in the area where
+ * these tables are merged. Note this is only a name change.
+ */
+typedef int FIT, *pFIT;
+#define cbFIT sizeof(FIT)
+#define ifiNil -1
+#define fiNil ((pFIT) 0)
+
+
+/* Dense numbers
+ *
+ * Rather than use file index, symbol index pairs to represent symbols
+ * and globals, we use dense number so that they can be easily embeded
+ * in intermediate code and the programs that process them can
+ * use direct access tabls instead of hash table (which would be
+ * necesary otherwise because of the sparse name space caused by
+ * file index, symbol index pairs. Dense number are represented
+ * by RNDXRs.
+ */
+
+/*
+ * The following table defines the meaning of each SYM field as
+ * a function of the "st". (scD/B == scData OR scBss)
+ *
+ * Note: the value "isymMac" is used by symbols that have the concept
+ * of enclosing a block of related information. This value is the
+ * isym of the first symbol AFTER the end associated with the primary
+ * symbol. For example if a procedure was at isym==90 and had an
+ * isymMac==155, the associated end would be at isym==154, and the
+ * symbol at 155 would probably (although not necessarily) be the
+ * symbol for the next procedure. This allows rapid skipping over
+ * internal information of various sorts. "stEnd"s ALWAYS have the
+ * isym of the primary symbol that started the block.
+ *
+
+ST SC VALUE INDEX
+-------- ------ -------- ------
+stFile scText address isymMac
+stLabel scText address ---
+stGlobal scD/B address iaux
+stStatic scD/B address iaux
+stParam scAbs offset iaux
+stLocal scAbs offset iaux
+stProc scText address iaux (isymMac is first AUX)
+stStaticProc scText address iaux (isymMac is first AUX)
+
+stMember scNil ordinal --- (if member of enum)
+stMember scNil byte offset iaux (if member of struct/union)
+stMember scBits bit offset iaux (bit field spec)
+
+stBlock scText address isymMac (text block)
+stBlock scNil cb isymMac (struct/union member define)
+stBlock scNil cMembers isymMac (enum member define)
+
+stEnd scText address isymStart
+stEnd scNil ------- isymStart (struct/union/enum)
+
+stTypedef scNil ------- iaux
+stRegReloc sc??? value old register number
+stForward sc??? new address isym to original symbol
+
+stConstant scInfo value --- (scalar)
+stConstant scInfo iss --- (complex, e.g. string)
+
+ *
+ */
+
+#endif LANGUAGE_C
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/romhead.c freebios/util/alpha-common/romhead.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/alpha-common/romhead.c Wed Dec 31 17:00:00 1969
+++ freebios/util/alpha-common/romhead.c Fri Mar 16 13:32:23 2001
@@ -0,0 +1,285 @@
+
+/*****************************************************************************
+
+ Copyright � 1993, 1994 Digital Equipment Corporation,
+ Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+#ifndef LINT
+static char *rcsid = "$Id: romhead.c,v 1.1 2000/03/21 03:56:31 stepan Exp $";
+#endif
+
+/*
+ * $Log: romhead.c,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.13 1995/02/27 19:22:33 fdh
+ * Print header->romh.V0.destination as two longwords instead of
+ * a single quadword.
+ *
+ * Revision 1.12 1995/02/27 15:35:26 fdh
+ * Modified to not use 64 bit ints for portability.
+ *
+ * Revision 1.11 1995/02/25 05:18:13 fdh
+ * Print 64bit fields as type long.
+ *
+ * Revision 1.10 1995/02/19 17:47:31 fdh
+ * Modified an error message.
+ *
+ * Revision 1.9 1995/02/16 20:46:31 fdh
+ * Print out decimal representation of image checksum too.
+ *
+ * Revision 1.8 1995/02/10 19:08:55 fdh
+ * Minor fixup.
+ *
+ * Revision 1.7 1995/02/10 02:18:11 fdh
+ * Moved compute_romh_chksum() to this file.
+ *
+ * Revision 1.5 1995/02/07 04:57:30 fdh
+ * Modified fwid_match_i().
+ * Added ostype_array[] and routines for accessing it.
+ *
+ * Revision 1.4 1995/02/07 01:04:05 fdh
+ * Removed some unnecessary definitions.
+ *
+ * Revision 1.3 1995/02/06 02:44:42 fdh
+ * Added fwid_match(), fwid_match_i(), and fwid_dump() routines.
+ *
+ * Revision 1.2 1995/02/05 01:59:05 fdh
+ * Added include files and definitions.
+ *
+ * Revision 1.1 1995/02/03 16:35:37 fdh
+ * Initial revision
+ *
+ */
+
+#include <stdlib.h>
+#include "romhead.h"
+
+char *fw_dbm_id[] = {FW_DBM_STRINGS};
+char *fw_wnt_id[] = {FW_WNT_STRINGS};
+char *fw_srm_id[] = {FW_SRM_STRINGS};
+
+fw_id_t fwid_array[] = {
+ { FW_DBM, fw_dbm_id},
+ { FW_WNT, fw_wnt_id},
+ { FW_SRM, fw_srm_id},
+ { 0, NULL}
+};
+
+char *ostype_dbm[] = {OS_DBM_STRINGS};
+char *ostype_wnt[] = {OS_WNT_STRINGS};
+char *ostype_vms[] = {OS_VMS_STRINGS};
+char *ostype_osf[] = {OS_OSF_STRINGS};
+
+ostype_t ostype_array[] = {
+ { FW_OSTYPE_DBM, FW_DBM, ostype_dbm},
+ { FW_OSTYPE_WNT, FW_WNT, ostype_wnt},
+ { FW_OSTYPE_VMS, FW_SRM, ostype_vms},
+ { FW_OSTYPE_OSF, FW_SRM, ostype_osf},
+ { 0, 0, NULL}
+};
+
+#define MAXSTRING 80
+char strbuf1[MAXSTRING+1];
+char strbuf2[MAXSTRING+1];
+
+fw_id_t *fwid_match(char *arg)
+{
+ fw_id_t *ptr;
+ int i, k;
+
+ ptr = fwid_array;
+ strncpy(strbuf1, arg, MAXSTRING);
+ strbuf1[MAXSTRING+1] = '\0';
+ k = 0;
+ while ((strbuf1[k] = tolower(strbuf1[k])) != '\0') ++k;
+
+ while (ptr->id_string) {
+ i = 0;
+ while (ptr->id_string[i]) {
+ strncpy(strbuf2, ptr->id_string[i], MAXSTRING);
+ strbuf2[MAXSTRING+1] = '\0';
+ k = 0;
+ while ((strbuf2[k] = tolower(strbuf2[k])) != '\0') ++k;
+
+ if (strcmp(strbuf1, strbuf2) == 0)
+ return (ptr);
+
+ ++i;
+ }
+ ++ptr;
+ }
+ return ((fw_id_t *)NULL);
+}
+
+fw_id_t *fwid_match_i(int fwid)
+{
+ fw_id_t *ptr;
+
+ ptr = fwid_array;
+ while (ptr->id_string) {
+ if (fwid == ptr->firmware_id)
+ return (ptr);
+
+ ++ptr;
+ }
+ return ((fw_id_t *)NULL);
+}
+
+void fwid_dump(char *pre)
+{
+ fw_id_t *ptr;
+ int i;
+
+ ptr = fwid_array;
+ while (ptr->id_string) {
+ i = 0;
+ printf("%s\"%d\"", pre, ptr->firmware_id);
+ while (ptr->id_string[i])
+ printf(" \"%s\"", ptr->id_string[i++]);
+ printf("\n");
+ ++ptr;
+ }
+}
+
+ostype_t *ostype_match(char *arg)
+{
+ ostype_t *ptr;
+ int i, k;
+
+ ptr = ostype_array;
+ strncpy(strbuf1, arg, MAXSTRING);
+ strbuf1[MAXSTRING+1] = '\0';
+ k = 0;
+ while ((strbuf1[k] = tolower(strbuf1[k])) != '\0') ++k;
+
+ while (ptr->id_string) {
+ for (i=0; i<2; ++i) {
+ strncpy(strbuf2, ptr->id_string[i], MAXSTRING);
+ strbuf2[MAXSTRING+1] = '\0';
+ k = 0;
+ while ((strbuf2[k] = tolower(strbuf2[k])) != '\0') ++k;
+
+ if (strcmp(strbuf1, strbuf2) == 0)
+ return (ptr);
+ }
+ ++ptr;
+ }
+ return ((ostype_t *)NULL);
+}
+
+ostype_t *ostype_match_i(int ostype)
+{
+ ostype_t *ptr;
+
+ ptr = ostype_array;
+ while (ptr->id_string) {
+ if (ostype == ptr->ostype)
+ return (ptr);
+ ++ptr;
+ }
+ return ((ostype_t *)NULL);
+}
+
+void ostype_dump(char *pre)
+{
+ ostype_t *ptr;
+ int i;
+
+ ptr = ostype_array;
+ while (ptr->id_string) {
+ printf("%s\"%d\"", pre, ptr->ostype);
+ for (i=0; i<2; ++i)
+ printf(" \"%s\"", ptr->id_string[i]);
+ printf("\n");
+ ++ptr;
+ }
+}
+
+/*
+ * Compute the header checksum.
+ */
+ui compute_romh_chksum(romheader_t *header)
+{
+ char *ptr;
+ ui chksum = 0;
+
+ ptr = (char *) header;
+ while (ptr < (char *) &header->romh.hchecksum) {
+ COMPUTE_CHECKSUM(*ptr,chksum);
+ ++ptr;
+ }
+ return (chksum);
+}
+
+/* Prints out the ROM header pointed to by argument.
+ * Returns TRUE if header is valid; FALSE otherwise.
+ */
+int dumpHeader(romheader_t *header)
+{
+
+ int i, hver;
+ ui hchksum;
+ fw_id_t *fwid_ptr;
+
+ printf(" Header Size......... %d bytes\n", header->romh.V0.hsize);
+ printf(" Image Checksum...... 0x%04x (%d)\n",
+ header->romh.V0.checksum, header->romh.V0.checksum);
+ printf(" Image Size (Uncomp). %d (%d KB)\n", header->romh.V0.size, header->romh.V0.size/1024);
+ printf(" Compression Type.... %d\n", header->romh.V0.decomp);
+ printf(" Image Destination... 0x%08x%08x\n",
+ header->romh.V0.destination.high,
+ header->romh.V0.destination.low);
+
+ if ((hver = ROMH_VERSION(header)) > 0) /* Version > 0 */
+ {
+ printf(" Header Version...... %d\n", (ui) hver);
+
+ fwid_ptr = fwid_match_i(header->romh.V1.fw_id);
+ printf(" Firmware ID......... %d - %s\n",
+ (ui) header->romh.V1.fw_id,
+ fwid_ptr == NULL ? "Unknown ID Type." : fwid_ptr->id_string[0]);
+
+ printf(" ROM Image Size...... %d (%d KB)\n", header->romh.V1.rimage_size,
+ header->romh.V1.rimage_size/1024);
+
+ printf(" Firmware ID (Opt.).. %08x%08x ",
+ header->romh.V1.fwoptid.id_S.high,
+ header->romh.V1.fwoptid.id_S.low);
+ for (i = 0; i < 8; i++)
+ if (isprint(header->romh.V1.fwoptid.id[i]))
+ printf ("%c", header->romh.V1.fwoptid.id[i]);
+ else printf (".");
+ printf("\n Header Checksum..... 0x%04x", header->romh.hchecksum);
+ hchksum = compute_romh_chksum(header);
+ if (hchksum != header->romh.hchecksum) {
+ printf("\nERROR: Bad ROM header checksum. 0x%04x\n", hchksum);
+ return (FALSE);
+ }
+ else
+ printf ("\n");
+ }
+ return (TRUE);
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/NLBConfig.py freebios/util/config/NLBConfig.py
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/NLBConfig.py Mon Mar 12 21:22:19 2001
+++ freebios/util/config/NLBConfig.py Wed Mar 21 17:56:40 2001
@@ -7,6 +7,12 @@
debug = 0;
+# Architecture variables
+arch = '';
+makebase = '';
+crt0base = '';
+ldscriptbase = '';
+
makeoptions = {};
# rule format. Key is the rule name. value is a list of lists. The first
# element of the list is the dependencies, the rest are actions.
@@ -15,10 +21,10 @@
outputdir = '';
# config variables for the ldscript
-data = 0x4000;
-bss = 0x5000;
-stack = 0x90000;
-linuxbiosbase = 0xf0000;
+# Initialize the to zero so we get a link error if the
+# are not set.
+rambase = 0;
+linuxbiosbase = 0;
objectrules = [];
userrules = [];
@@ -90,13 +96,25 @@
handleconfig(realpath)
return fullpath
+def set_arch(dir, my_arch):
+ global arch, makebase, crt0base, ldscriptbase
+ arch = my_arch
+ configpath = os.path.join(treetop, os.path.join("src/arch/", os.path.join(my_arch, "config")))
+ makebase = os.path.join(configpath, "make.base")
+ crt0base = os.path.join(configpath, "crt0.base")
+ ldscriptbase = os.path.join(configpath, "ldscript.base")
+ print "Now Process the ", my_arch, " base files"
+ if (debug):
+ print "Makebase is :", makebase, ":"
+ makedefine(dir, "ARCH="+my_arch)
+ doconfigfile(treetop, makebase)
+
def dir(base_dir, name):
regexp = re.compile(r"^/(.*)")
m = regexp.match(name)
if m and m.group(1):
# /dir
- fullpath = os.path.join("src", m.group(1))
- fullpath = os.path.join(treetop, fullpath)
+ fullpath = os.path.join(treetop, m.group(1))
else:
# dir
fullpath = os.path.join(base_dir, name)
@@ -223,7 +241,7 @@
# we do all these rules by hand because docipl will always be special
# it's more or less a stand-alone bootstrap
def docipl(dir, ipl_name):
- global data, bss, stack, linuxbiosbase
+ global rambase, linuxbiosbase
mainboard = command_vals['mainboard']
mainboard_dir = os.path.join(treetop, 'src', mainboard)
# add the docipl rule
@@ -236,23 +254,20 @@
# Now we need a mainboard-specific include path
userrules.append("\tcc $(CPUFLAGS) -I%s -c $<" % mainboard_dir)
# now set new values for the ldscript.ld. Should be a script?
- data = 0x4000
- bss = 0x5000
- stack = 0x90000
+ rambase = 0x4000
linuxbiosbase = 0x80000
def linux(dir, linux_name):
linuxrule = 'LINUX=' + linux_name
makedefine(dir, linuxrule)
-def setdata(dir, address):
- data = address
-def setbss(dir, address):
- bss = address
-def setstack(dir, address):
- stack = address
+def setrambase(dir, address):
+ global rambase
+ rambase = string.atol(address,0)
+
def setlinuxbiosbase(dir, address):
- linuxbiosbase = address
+ global linuxbiosbase
+ linuxbiosbase = string.atol(address,0)
list_vals = {
# 'option': []
@@ -275,6 +290,7 @@
}
command_actions = {
+ 'arch' : set_arch,
'TOP' : top,
'target' : target,
'mainboard' : mainboard,
@@ -295,9 +311,7 @@
'addaction' : addaction,
'option' : option,
'nooption' : nooption,
- 'data' : setdata,
- 'bss' : setbss,
- 'stack' : setstack,
+ 'rambase': setrambase,
'biosbase' : setlinuxbiosbase,
'commandline' : commandline
}
@@ -307,7 +321,7 @@
def readfile(filename):
# open file, extract lines, and close
if not os.path.isfile(filename):
- print config_file, "is not a file \n"
+ print filename, "is not a file \n"
sys.exit()
fileobject = open(filename, "r")
filelines = fileobject.readlines()
@@ -336,6 +350,9 @@
verb = command.group(1)
args = command.group(3)
+ if ((arch == '') and (verb != 'arch')):
+ print "arch must be the first command not ", verb, "\n"
+ sys.exit()
if command_actions.has_key(verb):
command_actions[verb](dir, args)
elif list_vals.has_key(verb):
@@ -346,7 +363,7 @@
# output functions
# write crt0
-def writep5crt0(path):
+def writecrt0(path):
crt0filepath = os.path.join(path, "crt0.S")
raminitfiles = command_vals["raminit"]
paramfile = os.path.join(treetop, 'src/include',
@@ -392,16 +409,15 @@
# write ldscript
def writeldscript(path):
+ global rambase, linuxbiosbase
ldfilepath = os.path.join(path, "ldscript.ld")
print "Trying to create ", ldfilepath
# try:
file = open(ldfilepath, 'w+')
# print out the ldscript rules
# print out the values of defined variables
- file.write('_PDATABASE = 0x%x;\n' % data)
- file.write('_RAMBASE = 0x%x;\n' % bss)
- file.write('_KERNSTK = 0x%x;\n' % stack)
- file.write('_ROMBASE = 0x%x;\n' % linuxbiosbase)
+ file.write('_ROMBASE = 0x%lx;\n' % linuxbiosbase)
+ file.write('_RAMBASE = 0x%lx;\n' % rambase)
ldlines = readfile(ldscriptbase)
if (debug):
@@ -489,13 +505,13 @@
# set the default locations for config files
makebase = os.path.join(treetop, "util/config/make.base")
-crt0base = os.path.join(treetop, "util/config/p5crt0.base")
-ldscriptbase = os.path.join(treetop, "util/config/ldscript.base")
+crt0base = os.path.join(treetop, "arch/i386/config/crt0.base")
+ldscriptbase = os.path.join(treetop, "arch/alpha/config/ldscript.base")
-# now read in the base files.
-print "Now Process the base files"
-print "Makebase is :", makebase, ":"
-doconfigfile(treetop, makebase)
+## now read in the base files.
+#print "Now Process the base files"
+#print "Makebase is :", makebase, ":"
+#doconfigfile(treetop, makebase)
# now read in the customizing script
doconfigfile(treetop, sys.argv[1])
@@ -507,4 +523,4 @@
writemakefile(outputdir)
writeldscript(outputdir)
-writep5crt0(outputdir)
+writecrt0(outputdir)
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/ldscript.base freebios/util/config/ldscript.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/ldscript.base Wed Jan 10 21:03:42 2001
+++ freebios/util/config/ldscript.base Wed Dec 31 17:00:00 1969
@@ -1,114 +0,0 @@
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
- *
- * $Id: ldscript.base,v 1.2 2001/01/11 04:03:42 rminnich Exp $
- *
- */
-
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- */
-/*
- * We use ELF as output format. So that we can
- * debug the code in some form.
- */
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-/* oh, barf. This wont work if all you use is .o's. -- RGM */
-
-/*
- * Memory map:
- *
- * 0x00000 (4*4096 bytes) : stack
- * 0x04000 (4096 bytes) : private data
- * 0x05000 : data space
- * 0x90000 : kernel stack
- * 0xf0000 (64 Kbyte) : EPROM
- */
-MEMORY
-{
- ram (rwx) : ORIGIN = 0x00000000, LENGTH = 128M /* 128 MB memory is max for STPC */
- rom (rx) : ORIGIN = 0x000f0000, LENGTH = 128K /* 128 K EPROM */
-}
-
- /* These are now set by the config tool
- _PDATABASE = 0x04000;
- _RAMBASE = 0x05000;
- _KERNSTK = 0x90000;
- _ROMBASE = 0x80000;
- */
-
-/*
- * Entry point is not really nececary, since the mkrom(8)
- * tool creates a entry point that jumps to $0xc000:0x0000.
- */
-/* baloney, but ... RGM*/
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- * First we place the code and read only data (typically const declared).
- * This get placed in rom.
- */
- .text _ROMBASE : {
- _text = .;
- *(.text);
- *(.rodata);
- _etext = .;
- }
-
- _pdata = .;
-
-/*
- .pdata _PDATABASE : AT ( LOADADDR(.text) + SIZEOF(.text) +
- SIZEOF(.rodata)) {
- */
- .pdata _PDATABASE : AT ( _etext ) {
- *(.pdata);
- }
-
- _epdata = LOADADDR(.pdata) + SIZEOF(.pdata);
-
- /*
- * After the code we place initialized data (typically initialized
- * global variables). This gets copied into ram by startup code.
- * __data_start and __data_end shows where in ram this should be placed,
- * whereas __data_loadstart and __data_loadend shows where in rom to
- * copy from.
- */
- .data _RAMBASE : AT ( LOADADDR(.pdata) + SIZEOF(.pdata) ) {
- _data = .;
- *(.data)
- *(.sdata)
- *(.sdata2)
- *(.got)
- _edata = .;
- }
-
- _ldata = LOADADDR(.data);
- _eldata = LOADADDR(.data) + SIZEOF(.data);
-
- /*
- * bss does not contain data, it is just a space that should be zero
- * initialized on startup. (typically uninitialized global variables)
- * crt0.S fills between __bss_start and __bss_end with zeroes.
- */
- .bss ( ADDR(.data) + SIZEOF(.data) ) : {
- _bss = .;
- *(.bss)
- *(.sbss)
- *(COMMON)
- _ebss = .;
- _heap = .;
- }
-}
-
-/*
- * This provides the start and end address for the whole image
- */
-_image = LOADADDR(.text);
-_eimage = LOADADDR(.data) + SIZEOF(.data);
-
-/* EOF */
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/make.base freebios/util/config/make.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/make.base Mon Mar 12 21:22:19 2001
+++ freebios/util/config/make.base Wed Dec 31 17:00:00 1969
@@ -1,34 +0,0 @@
-makedefine LINK = ld -T ldscript.ld -o $@ $(OBJECTS)
-makedefine CPPFLAGS= -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include $(CPUFLAGS)
-makedefine CFLAGS= $(CPPFLAGS) -O2 -nostdinc -nostdlib -Wall
-makedefine CC=cc
-makerule all : romimage ;
-makerule floppy : all ; mcopy -o romimage a:
-makerule romimage : linuxbios.rom vmlinux.bin.gz.block ; cat vmlinux.bin.gz.block linuxbios.rom > romimage
-makerule linuxbios.rom: linuxbios.strip mkrom ; ./mkrom -s 64 -f -o linuxbios.rom linuxbios.strip
-makerule linuxbios.strip: linuxbios ; objcopy -O binary -R .note -R .comment -S linuxbios linuxbios.strip
-makerule linuxbios: $(OBJECTS) vmlinux.bin.gz ; @rm -f biosobject
-addaction linuxbios $(LINK)
-addaction linuxbios nm -n linuxbios > linuxbios.map
-
-makerule crt0.s: crt0.S ; $(CC) $(CPPFLAGS) -I$(TOP)/src -E $< > crt0.s
-
-makerule crt0.o : crt0.s; $(CC) -c crt0.s
-makerule mkrom: $(TOP)/mkrom/mkrom.c ; $(CC) -o mkrom $<
-
-makerule clean : ; rm -f linuxbios.* vmlinux.* *.o mkrom xa? *~
-addaction clean rm -f linuxbios romimage crt0.s
-addaction clean rm -f a.out *.s *.l
-addaction clean rm -f TAGS tags
-addaction clean rm -f docipl
-
-
-makerule vmlinux.bin.gz.block : vmlinux.bin.gz ; dd conv=sync bs=448k if=vmlinux.bin.gz of=vmlinux.bin.gz.block
-makerule vmlinux.bin.gz: vmlinux.bin ;gzip -f -3 vmlinux.bin
-makerule vmlinux.bin: $(LINUX)/vmlinux ; objcopy -O binary -R .note -R .comment -S $< vmlinux.bin
-
-
-# do standard config files that the user need not specify
-# for now, this is just 'lib', but it may be more later.
-dir /lib
-dir /boot
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/p5crt0.base freebios/util/config/p5crt0.base
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/config/p5crt0.base Wed Jan 10 20:51:00 2001
+++ freebios/util/config/p5crt0.base Wed Dec 31 17:00:00 1969
@@ -1,108 +0,0 @@
-/*
- * $ $
- *
- */
-
-#include <asm.h>
-#include <intel.h>
-
-#include <pciconf.h>
-/*
- * This is the entry code (the mkrom(8) utility makes a jumpvector
- * to this adddess.
- *
- * When we get here we are in x86 real mode.
- *
- * %cs = 0xf000 %ip = 0x0000
- * %ds = 0x0000 %es = 0x0000
- * %dx = 0x0yxx (y = 3 for i386, 5 for pentium, 6 for P6,
- * where x is undefined)
- * %fl = 0x0002
- */
- .text
- .code16
-
-#include <cpu/p5/start32.inc>
-
-#include <pc80/i8259.inc>
-
-CRT0_PARAMETERS
-
-/* Turn on mtrr for faster boot */
-#include <cpu/p6/earlymtrr.inc>
-
-/*
- * Copy data into RAM and clear the BSS. Since these segments
- * isn\'t really that big we just copy/clear using bytes, not
- * double words.
- */
- intel_chip_post_macro(0x11) /* post 11 */
-
-#ifdef SERIAL_CONSOLE
- TTYS0_TX_STRING($str_after_ram)
-#endif /* SERIAL_CONSOLE */
-
- cld /* clear direction flag */
-
- /* copy data segment from FLASH ROM to RAM */
- leal EXT(_ldata), %esi
- leal EXT(_data), %edi
- movl $EXT(_eldata), %ecx
- subl %esi, %ecx
- jz .Lnodata /* should not happen */
- rep
- movsb
-.Lnodata:
- intel_chip_post_macro(0x12) /* post 12 */
-
-#ifdef SERIAL_CONSOLE
- TTYS0_TX_STRING($str_after_ram)
-#endif /* SERIAL_CONSOLE */
-
- /** clear stack */
- xorl %edi, %edi
- movl $_PDATABASE, %ecx
- xorl %eax, %eax
- rep
- stosb
-
- /** clear bss */
- leal EXT(_bss), %edi
- movl $EXT(_ebss), %ecx
- subl %edi, %ecx
- jz .Lnobss
- xorl %eax, %eax
- rep
- stosb
-.Lnobss:
-
-/*
- * Now we are finished. Memory is up, data is copied and
- * bss is cleared. Now we call the main routine and
- * let it do the rest.
- */
- intel_chip_post_macro(0xfe) /* post fe */
-
-#ifdef SERIAL_CONSOLE
- TTYS0_TX_STRING($str_pre_main)
-#endif /* SERIAL_CONSOLE */
-
-
-/* memory is up. Let\'s do the rest in C -- much easier. */
-
- /* set new stack */
- movl $_PDATABASE, %esp
-
- intel_chip_post_macro(0xfd) /* post fe */
- call EXT(intel_main)
- /*NOTREACHED*/
-.Lhlt:
- intel_chip_post_macro(0xee) /* post fe */
- hlt
- jmp .Lhlt
-
-ttyS0_test: .string "\r\n\r\nHello world!!\r\n"
-str_after_ram: .string "Ram Initialize?\r\n"
-str_after_copy: .string "after copy?\r\n"
-str_pre_main: .string "before main\r\n"
-newline: .string "\r\n"
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/Config freebios/util/makerom/Config
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/Config Wed Dec 31 17:00:00 1969
+++ freebios/util/makerom/Config Fri Mar 16 16:07:33 2001
@@ -0,0 +1,9 @@
+
+
+makerule makerom: commlib.a makerom.o compress.o ; $(CC) -o makerom makerom.o compress.o commlib.a
+
+makerule makerom.o: $(TOP)/util/makerom/makerom.c ; $(CC) -c -I$(TOP)/util/alpha-common/include $(TOP)/util/makerom/makerom.c
+
+makerule compress.o: $(TOP)/util/makerom/compress.c ; $(CC) -c -I$(TOP)/util/alpha-common/include $(TOP)/util/makerom/compress.c
+
+dir /util/alpha-common
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/Makefile freebios/util/makerom/Makefile
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/Makefile Wed Dec 31 17:00:00 1969
+++ freebios/util/makerom/Makefile Fri Mar 16 13:16:01 2001
@@ -0,0 +1,33 @@
+PROG = makerom
+OBJS = makerom.o compress.o
+
+COMMON = ../common
+COMMONLIB = $(COMMON)/commlib.a
+
+BIN = ../bin
+
+CC = gcc
+STRIP = strip
+CHMOD = chmod
+RM = rm -f
+CP = cp -fp
+
+CFLAGS = -O2
+INCLUDES = -I../include
+
+all: $(PROG)
+
+$(PROG): $(OBJS) $(COMMONLIB)
+ $(CC) -o $(PROG) $(OBJS) $(COMMONLIB)
+ $(STRIP) $(PROG)
+
+install: $(PROG)
+ $(CP) $(PROG) $(BIN)
+ $(CHMOD) 775 $(BIN)/$(PROG)
+
+clean:
+ $(RM) $(BIN)/$(PROG) $(PROG) *.o *~
+
+.c.o:
+ $(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -c -o $*.o $<
+
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/compress.c freebios/util/makerom/compress.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/compress.c Wed Dec 31 17:00:00 1969
+++ freebios/util/makerom/compress.c Fri Mar 16 13:16:01 2001
@@ -0,0 +1,345 @@
+/*****************************************************************************
+
+Copyright � 1994, Digital Equipment Corporation, Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+/*
+**
+** FACILITY:
+**
+** EBxx Software Tools - makerom
+**
+** FUNCTIONAL DESCRIPTION:
+**
+** Makerom makes roms. It takes a series of input files
+** adds headers to them and outputs them either compressed
+** or uncompressed (the default). This module contains the
+** compressioin code.
+**
+** CALLING ENVIRONMENT:
+**
+** user mode
+**
+** AUTHOR: David A Rusling
+**
+** CREATION-DATE: 04-Feb-1994
+**
+** MODIFIED BY:
+**
+*/
+#ifndef lint
+static char *RCSid = "$Id: compress.c,v 1.1 2000/03/21 03:56:31 stepan Exp $";
+#endif
+
+/*
+ * $Log: compress.c,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.9 1995/03/04 05:54:15 fdh
+ * Keep track of output size.
+ * Use the pre-defined macros for computing checksum.
+ *
+ * Revision 1.8 1995/02/08 01:22:40 fdh
+ * Pad to longword align the end of the ROM image.
+ *
+ * Revision 1.7 1995/02/07 01:01:12 fdh
+ * Removed some unnecessary definitions.
+ *
+ * Revision 1.6 1995/02/05 02:02:07 fdh
+ * Modified to accept the latest romheader definition.
+ *
+ * Revision 1.5 1995/02/02 20:28:03 fdh
+ * Wrapped _fputc() with output_c() to keep count of the
+ * bytes written.
+ * Modified to work in two passes with conditional
+ * output enable.
+ *
+ * Revision 1.4 1994/07/04 10:58:22 rusling
+ * Fixed WNT compile warnings.
+ *
+ * Revision 1.3 1994/04/19 12:37:53 rusling
+ * Fixed up compression message.
+ *
+ * Revision 1.2 1994/03/03 16:15:38 rusling
+ * Fixed bug.
+ *
+ * Revision 1.5 1994/02/04 11:51:26 rusling
+ * Ported to Alpha WNT.
+ *
+ * Revision 1.3 1994/02/04 11:22:35 rusling
+ * Fixed but (not resetting index) in push() when
+ * we flush some of the stack.
+ *
+ * Revision 1.2 1994/02/04 10:17:26 rusling
+ * Added RCS bits to the file.
+ *
+ */
+
+#include <stdio.h>
+#include <ctype.h>
+#include <string.h>
+#include <stdlib.h>
+#include "c_32_64.h"
+#include "romhead.h"
+
+/*
+ * Function prototypes
+ */
+extern int compress(FILE * in , FILE * out);
+static int pop(void);
+static void flush(FILE * out);
+static void push(int c , FILE * out);
+static void Repeater(int c , int repeat , FILE * out);
+static void output_c(int c , FILE * f);
+
+#define MAXDIFFERENT 127
+#define MAXREPEAT 128
+#define MINREPEAT 2 /* As when this is output as
+ a repeated record, then the
+ output is no longer than the
+ input */
+
+#define _minimum(a,b) ((a < b)? (a) : (b))
+#define _maximum(a,b) ((a > b)? (a) : (b))
+
+/*
+ * Global variables used by the helper routines.
+ */
+#define MAXBUFFER (2 * (MINREPEAT + MAXDIFFERENT))
+int buffer[MAXBUFFER];
+int idx = 0;
+extern int output_enable;
+extern romheader_t head;
+
+/*
+ * Global values used by statistics gatherers.
+ */
+int ccount;
+int ocount;
+int rrecords;
+int nrecords;
+int toosmall;
+/*****************************************************
+ * Helper routines maintaining a stack. *
+ *****************************************************/
+
+/*
+ * Pop the top charater off of the stack.
+ */
+static int pop()
+{
+ if (idx != 0)
+ return buffer[idx--];
+ else {
+ fprintf(stderr, "ERROR: attempting to pop an empty stack\n");
+ exit(0);
+ }
+}
+
+/*
+ * Flush the stack out as a series of non
+ * repeating records of maximum size MAXDIFFERENT.
+ */
+static void flush(FILE *out)
+{
+ int i = 0, j;
+
+ while (idx > i) {
+ j = 0;
+ output_c(_minimum(MAXDIFFERENT, idx - i), out);
+ while (j < _minimum(MAXDIFFERENT, idx - i)) {
+ output_c(buffer[i + (j++)], out);
+ }
+ nrecords++;
+ i = i + MAXDIFFERENT;
+ }
+ idx = 0;
+}
+/*
+ * Push a character onto the stack, if it gets full
+ * then flush it. The last character must be available.
+ * This is wy we pass in the output file stream pointer.
+ */
+static void push(int c, FILE *out)
+{
+ if (idx == MAXBUFFER)
+ flush(out);
+
+ buffer[idx++] = c;
+}
+
+/*
+ * Print out a series of repeater records.
+ */
+static void Repeater(int c, int repeat, FILE *out)
+{
+ int i = 0;
+
+ while (repeat > i) {
+ output_c(-(_minimum(MAXREPEAT, repeat - i)), out);
+ output_c(c, out);
+ rrecords++;
+ i = i + MAXREPEAT;
+ }
+}
+
+
+int compress(FILE *in, FILE *out)
+{
+ int last, this;
+ int padding;
+
+#define REPEATING 1
+#define NONE 0
+ int state = NONE;
+ int repeat = 0;
+ float compression;
+
+ccount = 0;
+ocount = 0;
+rrecords = 0;
+nrecords = 0;
+toosmall = 0;
+
+/*
+ * Read the input stream byte by byte writing
+ * compression records. These are either repeating records
+ * or non-repeating records. Finally, output an end of
+ * file record (0).
+ */
+ last = getc(in);
+ push(last, out);
+ ccount++;
+
+ this = getc(in);
+ while (!feof(in)) {
+ ccount++;
+ if (state == REPEATING) {
+/*
+ * At least the last two characters were the same. If this
+ * one is then we're still in a run of the same character
+ * (which is "last"). However, if it's different, then
+ * we've reached the end of the repeat run.
+ */
+ if (last == this) {
+ repeat++;
+ } else {
+/*
+ * We've reached the end of a repeating string of character
+ * "last". If this repeat string is not long enough, then do
+ * not worry about, just stick it on the stack, otherwise
+ * put out whatever was before the repeated character and
+ * then put out a repeat record.
+ */
+ state = NONE;
+ if (repeat < MINREPEAT+1) {
+ toosmall++;
+ while (repeat--)
+ push(last, out);
+ } else {
+ flush(out); /* flush the non-repeating record
+ * before we got to the repetitive
+ * character */
+ Repeater(last, repeat, out);
+ /* write out the repeater record */
+ repeat = 0;
+ }
+ push(this, out);
+ }
+ } else {
+/*
+ * We're just bumbling along seeing different characters
+ * all the time. If we see the same character as last time,
+ * then we change our state to repeating and take that
+ * last character off of the stack. Otherwise we just
+ * carry on pushing characters onto the stack. When the
+ * stack fills, then it will be emptied as non-repeating
+ * records by flush().
+ */
+ if (last == this) {
+ state = REPEATING;
+ pop(); /* don't put repeating chars on the
+ * stack, we did, so take it off! */
+ repeat = 2; /* this one and the last one! */
+ } else {
+ push(this, out);
+ }
+ }
+ last = this;
+ this = getc(in);
+ }
+/*
+ * Flush whatever is lying in the stack as non-repeating
+ * records. Then put out any repeat record.
+ */
+ flush(out);
+ Repeater(last, repeat, out);
+/*
+ * Print out the end of file record.
+ */
+ output_c(0, out);
+
+ /* Pad to longword align the end of the file */
+ padding = 0;
+ while((ocount%4) != 0) {
+ output_c(0, out);
+ ++padding;
+ }
+
+ /* Print on 2nd pass if necessary */
+ if ((output_enable) && (padding))
+ printf(" Image padded by %d bytes\n", padding);
+
+/*
+ * Now tell the user what happened.
+ */
+ if (output_enable) {
+ compression = (float)(ccount - ocount) / ((float)ccount) * 100;
+ fprintf(stderr, "...Compression Statistics:\n");
+ fprintf(stderr, "\tinput char count = %d,", ccount);
+ fprintf(stderr, "output char count = %d,\n", ocount);
+ fprintf(stderr, "\tCompression = %2.2f%%\n", compression);
+ fprintf(stderr, "\trepeating records = %d,", rrecords);
+ fprintf(stderr, "non-repeating records = %d\n", nrecords);
+ fprintf(stderr, "\trepeated strings less than minimum (%d) = %d\n\n",
+ MINREPEAT, toosmall);
+ }
+ /*
+ * Return the total bytes written to the caller.
+ */
+ return ocount;
+ }
+
+
+/*
+ * Control output of characters and compute
+ * checksum and size.
+ */
+static void output_c(int c, FILE* f)
+{
+ ocount++;
+ if (output_enable)
+ fputc(c,f);
+ else
+ COMPUTE_CHECKSUM(c, head.romh.V0.checksum)
+}
diff -uNrX freebios-exclude-files BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/makerom.c freebios/util/makerom/makerom.c
--- BEFORE_ERIC_MAJOR_MERGE/freebios/util/makerom/makerom.c Wed Dec 31 17:00:00 1969
+++ freebios/util/makerom/makerom.c Fri Mar 16 13:16:01 2001
@@ -0,0 +1,672 @@
+/*****************************************************************************
+
+Copyright � 1994, Digital Equipment Corporation, Maynard, Massachusetts.
+
+ All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+/*
+**
+** FACILITY:
+**
+** EBxx Software Tools - makerom
+**
+** FUNCTIONAL DESCRIPTION:
+**
+** Makerom makes roms. It takes a series of input files
+** adds headers to them and outputs them either compressed
+** or uncompressed (the default). This module contains the
+** command parsing code.
+**
+** CALLING ENVIRONMENT:
+**
+** user mode
+**
+** AUTHOR: David A Rusling
+**
+** CREATION-DATE: 04-Feb-1994
+**
+** MODIFIED BY:
+**
+*/
+#ifndef lint
+static char *RCSid =
+ "$Id: makerom.c,v 1.1 2000/03/21 03:56:31 stepan Exp $";
+#endif
+
+/*
+ * $Log: makerom.c,v $
+ * Revision 1.1 2000/03/21 03:56:31 stepan
+ * Check in current version which is a nearly a 2.2-16
+ *
+ * Revision 1.18 1995/02/27 15:34:24 fdh
+ * Modified to not use 64 bit ints for portability.
+ *
+ * Revision 1.17 1995/02/25 05:14:40 fdh
+ * Clean up handling of options with 64bit quantities.
+ * Updated usage().
+ *
+ * Revision 1.16 1995/02/16 20:45:46 fdh
+ * Inform user when image is padded.
+ *
+ * Revision 1.15 1995/02/10 15:44:47 fdh
+ * Modified image size to reflect the size after any necessary
+ * padding is added to align to a 32 bit boundary.
+ *
+ * Revision 1.14 1995/02/10 02:10:40 fdh
+ * Modified to use the COMPUTE_CHECKSUM Macro.
+ *
+ * Revision 1.13 1995/02/09 23:38:40 fdh
+ * Corrected char sign extension problem when computing
+ * checksums.
+ * Print out standard header summary.
+ *
+ * Revision 1.12 1995/02/08 01:23:15 fdh
+ * Pad to longword align the ROM image.
+ * ROTATE_RIGHT macro was moved to romhead.h.
+ *
+ * Revision 1.11 1995/02/07 23:16:06 fdh
+ * Modified the -x and -f options to work with 32 bit OS's.
+ *
+ * Revision 1.10 1995/02/07 04:51:37 fdh
+ * Modified to work with a change to fwid_match_i().
+ *
+ * Revision 1.9 1995/02/07 01:00:22 fdh
+ * Corrected header size computation.
+ * Corrected comments.
+ *
+ * Revision 1.8 1995/02/06 02:42:36 fdh
+ * Moved some code to library file routines
+ * fwid_match(), fwid_match_i(), and fwid_dump().
+ *
+ * Revision 1.7 1995/02/05 02:01:10 fdh
+ * Modified to accept the latest romheader definition.
+ *
+ * Revision 1.6 1995/02/02 20:19:28 fdh
+ * Modified to use ROM header version 1.
+ * Computes header and image checksums.
+ * Added -s -x and -f switches to specify user
+ * optional revision data in the header.
+ * Added -i switch used to specify the firmware
+ * ID type as either a registered string, registered
+ * number, or unregistered number.
+ *
+ * Revision 1.5 1995/01/23 21:23:46 fdh
+ * Modified to use common include file "romhead.h"
+ *
+ * Revision 1.4 1994/07/01 14:23:56 rusling
+ * Fixed up NT warnings.
+ *
+ * Revision 1.3 1994/03/03 16:26:09 rusling
+ * Fixed help text.
+ *
+ * Revision 1.6 1994/02/04 11:51:35 rusling
+ * Ported to Alpha WNT.
+ *
+ * Revision 1.5 1994/02/04 11:39:03 rusling
+ * Oops.
+ *
+ * Revision 1.3 1994/02/04 10:17:47 rusling
+ * Added RCS bits to the file.
+ *
+ */
+
+#include <stdio.h>
+#include <ctype.h>
+#include <string.h>
+#include <stdlib.h>
+#include "c_32_64.h"
+#include "romhead.h"
+
+/*
+ * Macros
+ */
+#define TRUE 1
+#define FALSE 0
+#define BLOCK_SIZE 1000
+
+
+#define _SEEN(o) seen[o-'a']
+#define _OPTION(o) (_SEEN(o) == TRUE)
+
+romheader_t head;
+
+typedef struct fileinfo {
+ struct fileinfo *next; /* next file in the list */
+ char *file;
+ struct {
+ ui low;
+ ui high;
+ } load; /* load point for this file */
+ int32 compress; /* Should we compress this file? */
+ int32 size; /* size of the file */
+ int32 padding; /* padding required to longword align at the end of the file */
+ int32 outputfile; /* is this an output file? */
+ fw_id_t *fwid_ptr; /* Points to a predefined table */
+ int fwid_alt; /* Used when user specified */
+ union int_char {
+ char ch[8];
+ struct {
+ ui low;
+ ui high;
+ } data;
+ } fwid_optional;
+} fileinfo_t;
+fileinfo_t *files = NULL;
+fileinfo_t *last = NULL;
+int32 fcount = 0;
+
+
+int output_enable = 0;
+/*
+ * Global data (all names preceded by 'rhdr_g'.
+ */
+#define SEEN_SIZE 100
+char seen[SEEN_SIZE]; /* upper and lower case */
+
+/*
+ * Forward routine descriptions.
+ */
+fileinfo_t *allocate_fileinfo();
+int main(int argc, char **argv);
+void process_file(fileinfo_t *ifile, FILE *out);
+void usage();
+void read_file(char *filename);
+void write_file(char *filename);
+int32 fsize(FILE *file);
+/*
+ * External routines.
+ */
+extern int compress(FILE *in, FILE *out);
+
+fileinfo_t *allocate_fileinfo()
+{
+ fileinfo_t *file;
+
+ file = (fileinfo_t *) malloc(sizeof(fileinfo_t));
+ if (file == NULL) {
+ fprintf(stderr, "ERROR: failed to allocate memory\n");
+ exit(0);
+ } else {
+ file->load.high = 0;
+ file->load.low = 0;
+ file->size = 0;
+ file->compress = 0; /* no compression */
+ file->file = NULL;
+ file->outputfile = FALSE;
+ }
+ fcount++;
+/*
+ * return the address of the fileinfo structure to the
+ * caller.
+ */
+ return file;
+}
+
+int main(int argc, char **argv)
+{
+ char *arg, option;
+ int i;
+ fileinfo_t *now, *output;
+ FILE *out;
+
+ for (i = 0; i < SEEN_SIZE; i++)
+ seen[i] = FALSE;
+/*
+ * Allocate at least one file description block.
+ */
+ now = last = files = allocate_fileinfo();
+ now->fwid_ptr = NULL;
+
+ if (argc < 2) {
+ usage();
+ exit(1);
+ }
+/*
+ * Parse arguments, but we are only interested in flags.
+ * Skip argv[0].
+ */
+ for (i = 1; i < argc; i++) {
+ arg = argv[i];
+ if (*arg == '-') {
+
+/*
+ * This is a -xyz style options list. Work out the options specified.
+ */
+ arg++; /* skip the '-' */
+ while (option = *arg++) { /* until we reach the '0' string
+ * terminator */
+ switch (option) {
+ case 'h':
+ case 'H':
+ usage();
+ exit(1);
+ case 'v': /* verbose */
+ case 'V':
+ _SEEN(tolower(option)) = TRUE;
+ break;
+ case 'C':
+ case 'c':
+/*
+ * The -C,-c option means "compress the image". The compression algorithm
+ * is a simple removal of repeating bytes. The decompression algorithm is
+ * implemented in the SROM code itself.
+ */
+ _SEEN(tolower(option)) = TRUE;
+ now->compress = TRUE;
+ break;
+ case 'O':
+ case 'o':
+/*
+ * This file is marked as an output file.
+ */
+ if (_SEEN(tolower(option))) {
+ fprintf(stderr,
+ "ERROR: two output file names given\n");
+ exit(0);
+ } else {
+ _SEEN(tolower(option)) = TRUE;
+ now->outputfile = TRUE;
+ }
+ case 'L':
+ case 'l':
+/*
+ * This is a special one, the -l option is followed (immediately)
+ * by the address where the file should be loaded into memory.
+ */
+ _SEEN(tolower(option)) = TRUE;
+ {
+ int i, j;
+ char strbuf[16+1];
+
+ sscanf(arg, "%16s", strbuf);
+ i = strlen(strbuf);
+
+ j = ((i-8)>0)?(i-8):0;
+ now->load.low = strtoul(&strbuf[j], NULL, 16);
+ strbuf[j] = '\0';
+ now->load.high = strtoul(strbuf, NULL, 16);
+ }
+ arg = arg + strlen(arg);
+ break;
+
+ case 'I':
+ case 'i':
+/*
+ * This is a special one, the -i option is followed (immediately)
+ * by a firmware type identifier.
+ */
+ _SEEN(tolower(option)) = TRUE;
+
+ if ((now->fwid_ptr = fwid_match(arg)) == NULL) {
+ now->fwid_alt = atoi(arg);
+ now->fwid_ptr = fwid_match_i(now->fwid_alt);
+ }
+
+ arg = arg + strlen(arg);
+ break;
+
+ case 'X':
+ case 'x':
+/*
+ * This is a special one, the -x option is followed (immediately)
+ * by a Hex value, truncated to 8 digits.
+ */
+ _SEEN(tolower(option)) = TRUE;
+ {
+ int i, j;
+ char strbuf[16+1];
+
+ sscanf(arg, "%16s", strbuf);
+ i = strlen(strbuf);
+
+ j = ((i-8)>0)?(i-8):0;
+ now->fwid_optional.data.low = strtoul(&strbuf[j], NULL, 16);
+ strbuf[j] = '\0';
+ now->fwid_optional.data.high = strtoul(strbuf, NULL, 16);
+ }
+ arg = arg + strlen(arg);
+ break;
+
+ case 'S':
+ case 's':
+/*
+ * This is a special one, the -s option is followed (immediately)
+ * by a 8 character string.
+ */
+ _SEEN(tolower(option)) = TRUE;
+ strncpy(now->fwid_optional.ch, arg, 8);
+ arg = arg + strlen(arg);
+ break;
+
+ case 'F':
+ case 'f':
+/*
+ * This is a special one, the -f option is followed (immediately)
+ * by a filename from which the first 8 bytes will be read and
+ * placed into the optional firmware ID field of the ROM header.
+ */
+ _SEEN(tolower(option)) = TRUE;
+ {
+ FILE *inf;
+ int i, j;
+ int ch;
+ int quote;
+ char strbuf[16+1];
+
+ inf = fopen(arg, "rb");
+ if (inf == NULL) {
+ fprintf(stderr, "ERROR: failed to open input file %s\n",
+ arg);
+ exit(0);
+ }
+ if (fscanf(inf, "%16s", strbuf) && isxdigit(strbuf[0])) {
+ i = strlen(strbuf);
+
+ j = ((i-8)>0)?(i-8):0;
+ now->fwid_optional.data.low = strtoul(&strbuf[j], NULL, 16);
+ strbuf[j] = '\0';
+ now->fwid_optional.data.high = strtoul(strbuf, NULL, 16);
+ }
+ else {
+ rewind(inf);
+ /* Ignore leading white space */
+ while((ch = getc(inf)) != EOF) {
+ if (isspace(ch)) continue;
+ break;
+ }
+
+ quote = FALSE;
+ j=0;
+ /* Open quote if necessary */
+ /* Otherwise store the character. */
+ if (ch == '"') quote = TRUE;
+ else
+ now->fwid_optional.ch[j++] = ch;
+
+ /* Now store up to 7 more characters */
+ while((ch = getc(inf)) != EOF) {
+ now->fwid_optional.ch[j++] = ch;
+ if (j > 8) break;
+ if (quote && (ch == '"')) break;
+ }
+
+ /* Pad zero to 8 chacters if necessary */
+ for (j; j<8; ++j)
+ now->fwid_optional.ch[j] = '\0';
+ }
+ fclose(inf);
+ }
+ arg = arg + strlen(arg);
+ break;
+
+/*
+ * And now print usage and exit if we see an unrecognized switch.
+ */
+ default:
+ usage();
+ exit(0);
+ break;
+ }
+ }
+ } else {
+ fileinfo_t *new;
+ /*
+ * For each new filename supplied, create another file description
+ * block and put it into the file list. The last file is the output
+ * file.
+ */
+
+ now->file = arg;
+ new = allocate_fileinfo();
+ new->next = NULL;
+ now->next = new;
+ last = now;
+ now = new;
+ now->fwid_ptr = NULL;
+ }
+ }
+/*
+ * As a result of the algorithm that I've used for parsing the
+ * filenames and arguments into file information blocks. "last"
+ * points at an entry that has a pointer to an invalid (empty)
+ * fileinfo block. Decrement the file count also.
+ */
+
+ last->next = NULL;
+ fcount--;
+/*
+ * If the world wants to know, then tell it.
+ */
+ if _OPTION('v') {
+ fprintf(stderr, "makerom [V2.0]\n");
+ }
+/*
+ * Check that at least two files have been specified.
+ */
+ if (fcount < 2) {
+ fprintf(stderr, "ERROR: insufficient filenames supplied\n");
+ exit(0);
+ }
+
+/*
+ * find the output file and open it.
+ */
+ output = files;
+ while (output->next != NULL) {
+ if (output->outputfile)
+ break;
+ output = output->next;
+ }
+
+ if (!(output->outputfile)) {
+ fprintf(stderr, "ERROR: no output file specified\n");
+ exit(0);
+ }
+ out = fopen(output->file, "wb");
+ if (out == NULL) {
+ fprintf(stderr, "ERROR: failed to open output file %s\n",
+ output->file);
+ exit(0);
+ }
+/*
+ * Now, for every file, open it, add a header and output the result
+ * to the output file.
+ */
+ if _OPTION('v')
+ fprintf(stderr, "...Output file is %s\n\n", last->file);
+ now = files;
+ while (now->next != NULL) {
+ if (!(now->outputfile))
+ process_file(now, out);
+ now = now->next;
+ }
+ /*
+ * close the output file and return.
+ */
+ fclose(out);
+ return 0;
+} /* end of main() */
+
+void process_file(fileinfo_t *ifile, FILE *out)
+{
+ FILE *in;
+ char *ptr;
+ int32 i;
+ int c;
+/*
+ * Open the input file.
+ * Get its size.
+ * Output its header.
+ * Output the input file's contents.
+ */
+
+ if _OPTION('v')
+ fprintf(stderr, "...processing input file %s\n", ifile->file);
+
+ in = fopen(ifile->file, "rb");
+ if (in == NULL) {
+ fprintf(stderr, "ERROR: failed to open input file %s\n",
+ ifile->file);
+ exit(0);
+ }
+
+ /* Load file to get it's size */
+ ifile->size = fsize(in);
+
+/*
+ * Start to build the header.
+ */
+ head.romh.V0.signature = ROM_H_SIGNATURE; /* pattern for data path */
+ head.romh.V0.csignature = (ui) ~ROM_H_SIGNATURE; /* comp pattern for data path */
+ head.romh.V0.decomp = ifile->compress; /* decompression algorithm */
+ head.romh.V0.hsize = /* header size */
+ (ui) (((unsigned long) &head.romh.hchecksum
+ - (unsigned long) &head) + sizeof(head.romh.hchecksum));
+
+ head.romh.V0.destination.high = ifile->load.high;
+ head.romh.V0.destination.low = ifile->load.low;
+
+ head.romh.V1.hversion = (char) ROM_H_REVISION;
+ head.romh.V0.checksum = 0; /* Initialize ROM image checksum */
+ head.romh.hchecksum = 0; /* Initialize header checksum */
+ head.romh.V1.rimage_size = 0; /* Initialize ROM image size */
+
+ /* Set FW ID optional field */
+ head.romh.V1.fwoptid.id_S.high = ifile->fwid_optional.data.high;
+ head.romh.V1.fwoptid.id_S.low = ifile->fwid_optional.data.low;
+
+ head.romh.V1.fw_id =
+ (char) ((ifile->fwid_ptr != NULL) ? ifile->fwid_ptr->firmware_id : ifile->fwid_alt);
+
+ /*
+ * Make a pass on the input file to compute the ROM image checksum.
+ */
+ output_enable = FALSE; /* <-FALSE, Compute checksum only */
+ if (ifile->compress) { /* Do we compress this file? */
+ head.romh.V1.rimage_size = compress(in, out);
+ head.romh.V0.size = ifile->size; /* Uncompressed size */
+ }
+ else {
+ for (i = 0; i < ifile->size; ++i) {
+ if ((c = getc(in)) == EOF)
+ abort();
+ COMPUTE_CHECKSUM(c,head.romh.V0.checksum);
+ ++head.romh.V1.rimage_size; /* Write out the ROM image size */
+ }
+ ifile->padding = 0;
+ while(((ifile->size+ifile->padding)%4) != 0) {
+ ++ifile->padding;
+ COMPUTE_CHECKSUM('\0',head.romh.V0.checksum);
+ ++head.romh.V1.rimage_size; /* Write out the ROM image size */
+ }
+
+ if (ifile->padding)
+ printf(" Image padded by %d bytes\n", ifile->padding);
+
+ head.romh.V0.size = head.romh.V1.rimage_size; /* Same size, No compression */
+ }
+
+ rewind(in); /* Back to the start of the input file. */
+
+/*
+ * Compute the header checksum.
+ */
+ head.romh.hchecksum = compute_romh_chksum(&head);
+
+/*
+ * Now write out the header.
+ */
+ ptr = (char *) &head;
+ for (i = 0; i < (int) head.romh.V0.hsize; i++)
+ fputc(*ptr++, out);
+
+/*
+ * print out header summary.
+ */
+ if _OPTION('v') dumpHeader(&head);
+
+/*
+ * Second pass. The checksums have been computed and the header
+ * has already been written out so produce the output file this time.
+ */
+ output_enable = TRUE; /* <-TRUE, Output file this time */
+ if (ifile->compress) /* Do we compress this file? */
+ compress(in, out);
+ else {
+/*
+ * Now read in the input file again and output it.
+ */
+ for (i = 0; i < ifile->size; ++i) {
+ if ((c = getc(in)) == EOF)
+ abort();
+ fputc(c, out);
+ }
+ /* Pad to longword align the end of the file */
+ for (i=0; i<ifile->padding; ++i)
+ fputc('\0', out);
+ }
+
+/*
+ * Finally, close the input file.
+ */
+ fclose(in);
+}
+void usage()
+{
+ printf("\nmakerom [options] [<input-file-options>]<input-file>...-o <output-file>\n\n");
+ printf("Builds a rom image by adding headers to the input files.\n");
+ printf("The input files and headers and concatenated and written\n");
+ printf("to the output file. Optionally, those input files may also be\n");
+ printf("compressed\n\n");
+ printf("Where each input file is preceded by options:\n");
+ printf("\t-l,L<address> = load address in memory of the image\n");
+ printf("\t-c,C = compress this file (the SROM code decompresses\n");
+ printf("\t\tthe image). The default is no compression\n");
+ printf("\t-x,X<hex value> = Sets optional firmware ID field.\n");
+ printf("\t-s,S<8 char string> = Sets optional firmware ID field.\n");
+ printf("\t-f,F<file> = Sets optional firmware ID field.\n");
+ printf("\t\tWhere the file contains either a hex value or\n");
+ printf("\t\ta \"quoted\" ASCII string.\n\n");
+ printf("\t-i,I<fw_id> = Firmware ID string or number.\n");
+ printf("\t\tThe following pre-defined values can also be used...\n");
+
+ fwid_dump("\t\t ");
+
+ printf("\nOptional flags are:\n");
+ printf("\t-v,V = verbose mode\n");
+ printf("\t-h,H = print this help text\n");
+ printf("\nExample:\n");
+ printf("\tmakerom -v -l200000 eb66_rom.img -o eb66_rom.rom\n");
+
+}
+
+
+int32 fsize(FILE *fp)
+{
+ int c;
+ int32 size = 0;
+
+ fseek(fp, 0, 0);
+ while ((c = getc(fp)) != EOF)
+ size++;
+ fseek(fp, 0, 0);
+ return size;
+}
