"Eric W. Biederman" wrote: > > Well I'm convinced the SIS730 chipset is a whole different animal > then the AMD760 chipset. On the AMD760 chipset I can't even access > memory without setting processor specific registers that Ollie's code > doesn't even touch. > > The EV6 bus has both memory mapped memory cycles and memory mapped i/o > cycles, and until I find out otherwise I'm convinced Ollies code is > doing all memory mapped i/o cycles to access memory on the SIS730 > chipset. Which probably accounts for the weird speed anomolies. > I agree. There are many K7 specific MSR which is about S2K (EV6 bus ??) that I did not program at all. The SiS730 code was done in a hurry to be showed off in Extreme Linux and after the conference I was busy doing 550 stuff. Does anyone has more idea about these MRS better than me (no idea) ?? Ollie
