"Eric W. Biederman" wrote:
>
> Ollie Lho <[EMAIL PROTECTED]> writes:
>
> > Actually, it is pretty standard for ACPI BIOS to reboot/halt system this
> > way. BTW, what the hell is port 0xcf9 ?? Is that just 0xcf8 for PCI
> > config
> > space ??
>
> No. But it is the isa io port you write to on the AMD766, and the
> PIIXE to hard reboot your system. At first glance I thought it might
> be as general as io port 0x92 that you can use to enable and disable
> address line 20. I did a quick compare of the legacy ports on the
> AMD766 and the SiS730 and the only port difference (I spotted) was the
> SiS730 didn't support 0xcf9 :(
>
> That is right in the middle of the PCI io port space wild. That is a
> trick I hadn't realized.
>
Does it not conflict with usual PCI IO transaction ?? I remember you
can do single byte PCI Config Space byte read/write these byte aligned
IO ports.
> Since watchdog timers are becomming more common place I suspect they
> will take over eventually. So the easy to write code for the linux
> kernel is to see if there is a non software watchdog timer device
> connected to the system modify the reboot code to trigger the
> watchdog timer to reboot.
>
> Does ACPI require a watchdog timer?
>
I dunno. But it seems all SiS chipset uses this way to support software
reboot/halt.
Ollie